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/linux/drivers/soc/qcom/
H A Dice.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2013-2019, The Linux Foundation. All rights reserved.
83 writel((val), (engine)->base + (reg))
86 readl((engine)->base + (reg))
95 void __iomem *base; member
105 struct device *dev = ice->dev; in qcom_ice_check_supported()
130 * Check for HWKM support and decide whether to use it or not. ICE in qcom_ice_check_supported()
140 * ICE-capable storage driver(s) need to know early on whether to in qcom_ice_check_supported()
149 ice->use_hwkm = true; in qcom_ice_check_supported()
186 * Wait until the ICE BIST (built-in self-test) has completed.
[all …]
/linux/Documentation/devicetree/bindings/net/dsa/
H A Dmediatek,mt7530.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Landen Chao <Landen.Chao@mediatek.com>
12 - DENG Qingfang <dqfext@gmail.com>
13 - Sean Wang <sean.wang@mediatek.com>
14 - Daniel Golle <daniel@makrotopia.org>
17 There are three versions of MT7530, standalone, in a multi-chip module and
18 built-into a SoC.
[all …]
/linux/drivers/edac/
H A Dsynopsys_edac.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2012 - 2014 Xilinx, Inc.
268 * struct ecc_error_info - ECC error log information.
288 * struct synps_ecc_status - ECC status information to report.
302 * struct synps_edac_priv - DDR memory controller private instance data.
303 * @baseaddr: Base address of the DDR controller.
342 * struct synps_platform_data - synps platform data structure.
353 enum mem_type (*get_mtype)(const void __iomem *base);
354 enum dev_type (*get_dtype)(const void __iomem *base);
362 * zynq_get_error_info - Get the current ECC error info.
[all …]
/linux/drivers/gpu/drm/lima/
H A Dlima_sched.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /* Copyright 2017-2019 Qiang Yu <yuq825@gmail.com> */
5 #include <linux/iosys-map.h>
21 struct dma_fence base; member
35 return -ENOMEM; in lima_sched_slab_init()
44 if (!--lima_fence_slab_refcnt) { in lima_sched_slab_fini()
52 return container_of(fence, struct lima_fence, base); in to_lima_fence()
64 return f->pipe->base.name; in lima_fence_get_timeline_name()
79 call_rcu(&f->base.rcu, lima_fence_release_rcu); in lima_fence_release()
96 fence->pipe = pipe; in lima_fence_create()
[all …]
/linux/scripts/
H A DMakefile.dtbs1 # SPDX-License-Identifier: GPL-2.0-only
3 # If CONFIG_OF_ALL_DTBS is enabled, all DT blobs are built
4 dtb-$(CONFIG_OF_ALL_DTBS) += $(dtb-)
7 multi-dtb-y := $(call multi-searc
[all...]
/linux/Documentation/arch/arm64/
H A Darm-acpi.rst6 the BSA (Arm Base System Architecture) [0] and BBR (Arm
7 Base Boot Requirements) [1] specifications. Both BSA and BBR are publicly
10 of rules defined in SBSA (Server Base System Architecture) [2].
23 industry-standard Arm systems, they also apply to more than one operating
25 ACPI and Linux only, on an Arm system -- that is, what Linux expects of
30 ----------------
33 exist in Linux for describing non-enumerable hardware, after all. In this
40 - ACPI’s byte code (AML) allows the platform to encode hardware behavior,
41 while DT explicitly does not support this. For hardware vendors, being
45 - ACPI’s OSPM defines a power management model that constrains what the
[all …]
/linux/drivers/net/ethernet/hisilicon/
H A Dhns_mdio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 2014-2015 Hisilicon Limited.
23 #define MDIO_DRV_NAME "Hi-HNS_MDIO"
38 u8 __iomem *vbase; /* mdio reg base address */
95 static void mdio_write_reg(u8 __iomem *base, u32 reg, u32 value) in mdio_write_reg() argument
97 writel_relaxed(value, base + reg); in mdio_write_reg()
101 mdio_write_reg((a)->vbase, (reg), (value))
103 static u32 mdio_read_reg(u8 __iomem *base, u32 reg) in mdio_read_reg() argument
105 return readl_relaxed(base + reg); in mdio_read_reg()
116 static void mdio_set_reg_field(u8 __iomem *base, u32 reg, u32 mask, u32 shift, in mdio_set_reg_field() argument
[all …]
/linux/drivers/spi/
H A Dspi-davinci.c1 // SPDX-License-Identifier: GPL-2.0-or-later
16 #include <linux/dma-mapping.h>
22 #include <linux/platform_data/spi-davinci.h>
110 void __iomem *base; member
136 if (dspi->rx) { in davinci_spi_rx_buf_u8()
137 u8 *rx = dspi->rx; in davinci_spi_rx_buf_u8()
139 dspi->rx = rx; in davinci_spi_rx_buf_u8()
145 if (dspi->rx) { in davinci_spi_rx_buf_u16()
146 u16 *rx = dspi->rx; in davinci_spi_rx_buf_u16()
148 dspi->rx = rx; in davinci_spi_rx_buf_u16()
[all …]
/linux/drivers/comedi/drivers/
H A Ddt3000.c1 // SPDX-License-Identifier: GPL-2.0+
6 * COMEDI - Linux Control and Measurement Device Interface
13 * Devices: [Data Translation] DT3001 (dt3000), DT3001-PGL, DT3002, DT3003,
14 * DT3003-PGL, DT3004, DT3005, DT3004-200
29 * since each board has an on-board DSP (Texas Instruments TMS320C52).
31 * bus-mastering DMA, which eliminates them from serious work.
49 * PCI BAR0 - dual-ported RAM location definitions (dev->mmio)
176 .name = "dt3001-pgl",
196 .name = "dt3003-pgl",
211 .name = "dt3005", /* a.k.a. 3004-200 */
[all …]
/linux/drivers/perf/
H A Darm-ccn.c1 // SPDX-License-Identifier: GPL-2.0-only
112 #define CCN_TYPE_RND_1P 0x18 /* RN-D = RN-I + DVM */
120 #define CCN_NUM_XP_WATCHPOINTS 2 /* See DT.dbg_id.num_watchpoints */
121 #define CCN_NUM_PMU_EVENT_COUNTERS 8 /* See DT.dbg_id.num_pmucntr */
131 void __iomem *base; member
143 struct arm_ccn_dt, pmu), struct arm_ccn, dt)
147 void __iomem *base; member
171 void __iomem *base; member
183 struct arm_ccn_dt dt; member
223 static CCN_FORMAT_ATTR(node, "config:0-7");
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/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dmediatek,smi-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-common.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Yong Wu <yong.wu@mediatek.com>
14 The hardware block diagram please check bindings/iommu/mediatek,iommu.yaml
22 register which control the iommu port is at each larb's register base. But
23 for generation 1, the register is at smi ao base(smi always on register
24 base). Besides that, the smi async clock should be prepared and enabled for
31 - enum:
[all …]
/linux/drivers/mfd/
H A Dsyscon.c1 // SPDX-License-Identifier: GPL-2.0-or-later
44 void __iomem *base; in of_syscon_register() local
56 return ERR_PTR(-ENOMEM); in of_syscon_register()
59 return ERR_PTR(-ENOMEM); in of_syscon_register()
61 base = of_iomap(np, 0); in of_syscon_register()
62 if (!base) in of_syscon_register()
63 return ERR_PTR(-ENOMEM); in of_syscon_register()
65 /* Parse the device's DT node for an endianness specification */ in of_syscon_register()
66 if (of_property_read_bool(np, "big-endian")) in of_syscon_register()
68 else if (of_property_read_bool(np, "little-endian")) in of_syscon_register()
[all …]
/linux/drivers/of/
H A Dfdt.c1 // SPDX-License-Identifier: GPL-2.0
43 * of_fdt_limit_memory - limit the number of regions in the /memory node
105 pprev = &np->properties; in populate_properties()
133 * ePAPR-style "phandle" properties, or the in populate_properties()
140 if (!np->phandle) in populate_properties()
141 np->phandle = be32_to_cpup(val); in populate_properties()
149 np->phandle = be32_to_cpup(val); in populate_properties()
151 pp->name = (char *)pname; in populate_properties()
152 pp->length = sz; in populate_properties()
153 pp->value = (__be32 *)val; in populate_properties()
[all …]
H A Dof_reserved_mem.c1 // SPDX-License-Identifier: GPL-2.0+
28 #include <linux/dma-map-ops.h>
41 phys_addr_t base; in early_init_dt_alloc_reserved_memory_arch() local
46 base = memblock_phys_alloc_range(size, align, start, end); in early_init_dt_alloc_reserved_memory_arch()
47 if (!base) in early_init_dt_alloc_reserved_memory_arch()
48 return -ENOMEM; in early_init_dt_alloc_reserved_memory_arch()
50 *res_base = base; in early_init_dt_alloc_reserved_memory_arch()
52 err = memblock_mark_nomap(base, size); in early_init_dt_alloc_reserved_memory_arch()
54 memblock_phys_free(base, size); in early_init_dt_alloc_reserved_memory_arch()
58 kmemleak_ignore_phys(base); in early_init_dt_alloc_reserved_memory_arch()
[all …]
/linux/drivers/irqchip/
H A Dirq-mvebu-icu.c5 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
23 #include <linux/irqchip/irq-msi-lib.h>
25 #include <dt-bindings/interrupt-controller/mvebu-icu.h>
55 void __iomem *base; member
71 struct msi_domain_info *info = d->host_data; in mvebu_icu_translate()
72 struct mvebu_icu_msi_data *msi_data = info->chip_data; in mvebu_icu_translate()
73 struct mvebu_icu *icu = msi_data->icu; in mvebu_icu_translate()
75 /* Check the count of the parameters in dt */ in mvebu_icu_translate()
76 if (WARN_ON(fwspec->param_count != param_count)) { in mvebu_icu_translate()
77 dev_err(icu->dev, "wrong ICU parameter count %d\n", in mvebu_icu_translate()
[all …]
H A Dirq-stm32mp-exti.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) STMicroelectronics 2017-2024
22 #include <dt-bindings/interrupt-controller/arm-gic.h>
70 void __iomem *base; member
75 /* skip internal desc_irqs array and get it from DT */
131 __diag_ignore_all("-Woverride-init",
136 [0 ... (STM32MP_DESC_IRQ_SIZE - 1)] = EXTI_INVALID_IRQ,
185 [0 ... (STM32MP_DESC_IRQ_SIZE - 1)] = EXTI_INVALID_IRQ,
244 u32 mask = BIT(d->hwirq % IRQS_PER_BANK); in stm32mp_exti_convert_type()
260 return -EINVAL; in stm32mp_exti_convert_type()
[all …]
H A Dirq-renesas-rza1.c1 // SPDX-License-Identifier: GPL-2.0
19 #include <dt-bindings/interrupt-controller/arm-gic.h>
43 void __iomem *base; member
51 return data->domain->host_data; in irq_data_to_priv()
60 tmp = readw_relaxed(priv->base + IRQRR); in rza1_irqc_eoi()
62 writew_relaxed(GENMASK(IRQC_NUM_IRQ - 1, 0) & ~bit, in rza1_irqc_eoi()
63 priv->base + IRQRR); in rza1_irqc_eoi()
92 return -EINVAL; in rza1_irqc_set_type()
95 tmp = readw_relaxed(priv->base + ICR1); in rza1_irqc_set_type()
98 writew_relaxed(tmp, priv->base + ICR1); in rza1_irqc_set_type()
[all …]
/linux/drivers/pci/
H A Dof.c1 // SPDX-License-Identifier: GPL-2.0+
3 * PCI <-> OF mapping helpers
22 * pci_set_of_node - Find and set device's DT device_node
26 * DT. Returns -ENODEV if the device is present, but disabled in the DT.
30 if (!dev->bus->dev.of_node) in pci_set_of_node()
34 of_pci_find_child_device(dev->bus->dev.of_node, dev->devfn); in pci_set_of_node()
41 dev->bus->dev.of_node_reused = true; in pci_set_of_node()
43 device_set_node(&dev->dev, of_fwnode_handle(no_free_ptr(node))); in pci_set_of_node()
49 of_node_put(dev->dev.of_node); in pci_release_of_node()
50 device_set_node(&dev->dev, NULL); in pci_release_of_node()
[all …]
/linux/drivers/reset/
H A Dreset-ti-syscon.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/
15 #include <linux/reset-controller.h>
17 #include <dt-bindings/reset/ti-syscon.h>
20 * struct ti_syscon_reset_control - reset control structure
21 * @assert_offset: reset assert control register offset from syscon base
23 * @deassert_offset: reset deassert control register offset from syscon base
25 * @status_offset: reset status register offset from syscon base
40 * struct ti_syscon_reset_data - reset controller information structure
42 * @regmap: regmap handle containing the memory-mapped reset registers
[all …]
/linux/arch/arc/kernel/
H A Dsetup.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
31 #include <asm/dsp-impl.h>
38 /* Part of U-boot ABI: see head.S */
51 unsigned long base; member
100 if (info->arcver < 0x34) in arcompact_mumbojumbo()
105 n += scnprintf(buf + n, len - n, "processor [%d]\t: %s (%s ISA) %s%s%s\n", in arcompact_mumbojumbo()
108 IS_AVAIL1(be, "[Big-Endian]")); in arcompact_mumbojumbo()
114 n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n", in arcompact_mumbojumbo()
120 bpu_cache = 256 << (bpu.ent - 1); in arcompact_mumbojumbo()
[all …]
/linux/lib/
H A Ddynamic_debug.c78 …"( 0 = off (default), 1 = module add/rm, 2 = >control summary, 3 = parsing, 4 = per-site changes)"…
83 int skip = strlen(__FILE__) - strlen("lib/dynamic_debug.c"); in trim_prefix()
106 char *p = fb->buf; in ddebug_describe_flags()
112 if (p == fb->buf) in ddebug_describe_flags()
116 return fb->buf; in ddebug_describe_flags()
135 if (query->format) { in vpr_info_dq()
136 fmtlen = strlen(query->format); in vpr_info_dq()
137 while (fmtlen && query->format[fmtlen - 1] == '\n') in vpr_info_dq()
138 fmtlen--; in vpr_info_dq()
141 v3pr_info("%s: func=\"%s\" file=\"%s\" module=\"%s\" format=\"%.*s\" lineno=%u-%u class=%s\n", in vpr_info_dq()
[all …]
/linux/drivers/clk/qcom/
H A Dipq-cmn-pll.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
7 * CMN PLL block expects the reference clock from on-board Wi-Fi block,
23 * +---------+
25 * +--+---+--+
28 * +-------+---+------+
29 * | +-------------> eth0-50mhz
31 * -------->+ +-------------> eth1-50mhz
33 * | +-------------> eth2-50mhz
35 * +----+----+----+---+-------------> eth-25mhz
[all …]
/linux/drivers/mtd/nand/raw/ingenic/
H A Dingenic_ecc.c1 // SPDX-License-Identifier: GPL-2.0
19 * ingenic_ecc_calculate() - calculate ECC for a data buffer
25 * Return: 0 on success, -ETIMEDOUT if timed out while waiting for ECC
32 return ecc->ops->calculate(ecc, params, buf, ecc_code); in ingenic_ecc_calculate()
36 * ingenic_ecc_correct() - detect and correct bit errors
45 * Return: the number of bit errors corrected, -EBADMSG if there are too many
46 * errors to correct or -ETIMEDOUT if we timed out waiting for the controller.
52 return ecc->ops->correct(ecc, params, buf, ecc_code); in ingenic_ecc_correct()
56 * ingenic_ecc_get() - get the ECC controller device
64 * PTR_ERR(-EPROBE_DEFER) if the device hasn't been initialised yet.
[all …]
/linux/drivers/pinctrl/freescale/
H A Dpinctrl-mxs.c1 // SPDX-License-Identifier: GPL-2.0+
20 #include "pinctrl-mxs.h"
27 void __iomem *base; member
35 return d->soc->ngroups; in mxs_get_groups_count()
43 return d->soc->groups[group].name; in mxs_get_group_name()
51 *pins = d->soc->groups[group].pins; in mxs_get_group_pins()
52 *num_pins = d->soc->groups[group].npins; in mxs_get_group_pins()
60 seq_printf(s, " %s", dev_name(pctldev->dev)); in mxs_pin_dbg_show()
72 int length = strlen(np->name) + SUFFIX_LEN; in mxs_dt_node_to_map()
77 /* Check for pin config node which has no 'reg' property */ in mxs_dt_node_to_map()
[all …]
/linux/drivers/phy/freescale/
H A Dphy-fsl-imx8m-pcie.c1 // SPDX-License-Identifier: GPL-2.0+
12 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
20 #include <dt-bindings/phy/phy-imx8-pcie.h>
60 void __iomem *base; member
79 pad_mode = imx8_phy->refclk_pad_mode; in imx8_pcie_phy_power_on()
80 switch (imx8_phy->drvdata->variant) { in imx8_pcie_phy_power_on()
82 reset_control_assert(imx8_phy->reset); in imx8_pcie_phy_power_on()
84 /* Tune PHY de-emphasis setting to pass PCIe compliance. */ in imx8_pcie_phy_power_on()
85 if (imx8_phy->tx_deemph_gen1) in imx8_pcie_phy_power_on()
86 writel(imx8_phy->tx_deemph_gen1, in imx8_pcie_phy_power_on()
[all …]

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