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Searched +full:dsi +full:- +full:phy +full:- +full:14 +full:nm (Results 1 – 22 of 22) sorted by relevance

/linux/Documentation/devicetree/bindings/display/msm/
H A Ddsi-phy-14nm.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-14nm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DSI 14nm PHY
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
13 - $ref: dsi-phy-common.yaml#
18 - qcom,dsi-phy-14nm
19 - qcom,dsi-phy-14nm-2290
20 - qcom,dsi-phy-14nm-660
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H A Dqcom,mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
11 - Rob Clark <robdclark@gmail.com>
15 encapsulates sub-blocks like MDP5, DSI, HDMI, eDP, etc.
19 pattern: "^display-subsystem@[0-9a-f]+$"
23 - qcom,mdss
29 reg-names:
32 - const: mdss_phys
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H A Dqcom,qcm2290-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,qcm2290-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Loic Poulain <loic.poulain@linaro.org>
14 sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS
17 $ref: /schemas/display/msm/mdss-common.yaml#
21 const: qcom,qcm2290-mdss
25 - description: Display AHB clock from gcc
26 - description: Display AXI clock
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H A Dqcom,sm6125-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6125-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marijn Suijten <marijn.suijten@somainline.org>
13 SM6125 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks
14 like DPU display controller, DSI and DP interfaces etc.
16 $ref: /schemas/display/msm/mdss-common.yaml#
20 const: qcom,sm6125-mdss
24 - description: Display AHB clock from gcc
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H A Dqcom,sm6115-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6115-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
14 sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS
17 $ref: /schemas/display/msm/mdss-common.yaml#
21 const: qcom,sm6115-mdss
25 - description: Display AHB clock from gcc
26 - description: Display AXI clock
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H A Dqcom,sm6150-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6150-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Abhinav Kumar <quic_abhinavk@quicinc.com>
11 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
15 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
18 $ref: /schemas/display/msm/mdss-common.yaml#
23 - const: qcom,sm6150-mdss
27 - description: Display AHB clock from gcc
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H A Dqcom,sc7280-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sc7280-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
17 $ref: /schemas/display/msm/mdss-common.yaml#
21 const: qcom,sc7280-mdss
25 - description: Display AHB clock from gcc
26 - description: Display AHB clock from dispcc
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/linux/drivers/gpu/drm/msm/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
64 depends on $(success,$(PYTHON3) -c "import lxml")
66 Validate XML files with register definitions against rules-fd schema.
115 bool "Enable DSI support in MSM DRM driver"
122 Choose this option if you have a need for MIPI DSI connector
126 bool "Enable DSI 28nm PHY driver in MSM DRM"
130 Choose this option if the 28nm DSI PHY is used on the platform.
133 bool "Enable DSI 20nm PHY driver in MSM DRM"
137 Choose this option if the 20nm DSI PHY is used on the platform.
140 bool "Enable DSI 28nm 8960 PHY driver in MSM DRM"
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/linux/drivers/gpu/drm/msm/dsi/phy/
H A Ddsi_phy.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
8 #include <dt-bindings/phy/phy.h>
13 (((n) >= 0) ? (((n) + (d) - 1) / (d)) : (((n) - (d) + 1) / (d)))
20 v = (tmax - tmin) * percent; in linear_inter()
23 return max_t(s32, min_result, v - 1); in linear_inter()
35 temp = 300 * coeff - ((timing->clk_prepare >> 1) + 1) * 2 * ui; in dsi_dphy_timing_calc_clk_zero()
36 tmin = S_DIV_ROUND_UP(temp, ui) - 2; in dsi_dphy_timing_calc_clk_zero()
46 temp = (timing->hs_rqst + timing->clk_prepare + clk_z) & 0x7; in dsi_dphy_timing_calc_clk_zero()
47 timing->clk_zero = clk_z + 8 - temp; in dsi_dphy_timing_calc_clk_zero()
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H A Ddsi_phy_10nm.c2 * SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
11 #include "dsi.xml.h"
15 * DSI PLL 10nm - clock diagram (eg: DSI0):
20 * +---------+ | +----------+ | +----+
21 * dsi0vco_clk ---| out_div |--o--| divl_3_0 |--o--| /8 |-- dsi0_phy_pll_out_byteclk
22 * +---------+ | +----------+ | +----+
26 * | | +----+ | |\ dsi0_pclk_mux
27 * | |--| /2 |--o--| \ |
28 * | | +----+ | \ | +---------+
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H A Ddsi_phy_28nm.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
10 #include "dsi.xml.h"
14 * DSI PLL 28nm - clock diagram (eg: DSI0):
19 * +------+ | +----+ | |\ dsi0byte_mux
20 * dsi0vco_clk --o--| DIV1 |--o--| /2 |--o--| \ |
21 * | +------+ +----+ | m| | +----+
22 * | | u|--o--| /4 |-- dsi0pllbyte
23 * | | x| +----+
24 * o--------------------------| /
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H A Ddsi_phy_7nm.c2 * SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
11 #include "dsi.xml.h"
15 * DSI PLL 7nm - clock diagram (eg: DSI0): TODO: updated CPHY diagram
20 * +---------+ | +----------+ | +----+
21 * dsi0vco_clk ---| out_div |--o--| divl_3_0 |--o--| /8 |-- dsi0_phy_pll_out_byteclk
22 * +---------+ | +----------+ | +----+
26 * | | +----+ | |\ dsi0_pclk_mux
27 * | |--| /2 |--o--| \ |
28 * | | +----+ | \ | +---------+
[all …]
H A Ddsi_phy_14nm.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
11 #include "dsi.xml.h"
17 * DSI PLL 14nm - clock diagram (eg: DSI0):
22 * +----+ | +----+
23 * dsi0vco_clk ---| n1 |--o--| /8 |-- dsi0pllbyte
24 * +----+ | +----+
26 * | +----+ |
27 * o---| /2 |--o--|\
28 * | +----+ | \ +----+
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/linux/arch/arm/boot/dts/qcom/
H A Dqcom-apq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
5 #include <dt-bindings/clock/qcom,lcc-msm8960.h>
6 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/soc/qcom,gsbi.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
[all …]
H A Dqcom-msm8974.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interconnect/qcom,msm8974.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
[all …]
H A Dqcom-msm8226.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
10 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
11 #include <dt-bindings/clock/qcom,rpmcc.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
14 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
15 #include <dt-bindings/thermal/thermal.h>
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/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8976.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2016-2022, AngeloGioacchino Del Regno
9 #include <dt-bindings/clock/qcom,gcc-msm8976.h>
10 #include <dt-bindings/clock/qcom,rpmcc.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
17 interrupt-parent = <&intc>;
18 #address-cells = <2>;
[all …]
H A Dmsm8953.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
4 #include <dt-bindings/clock/qcom,gcc-msm8953.h>
5 #include <dt-bindings/clock/qcom,rpmcc.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/power/qcom-rpmpd.h>
9 #include <dt-bindings/soc/qcom,apr.h>
10 #include <dt-bindings/sound/qcom,q6afe.h>
11 #include <dt-bindings/sound/qcom,q6asm.h>
12 #include <dt-bindings/thermal/thermal.h>
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H A Dmsm8998.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
6 #include <dt-bindings/clock/qcom,gpucc-msm8998.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/firmware/qcom,scm.h>
10 #include <dt-bindings/power/qcom-rpmpd.h>
11 #include <dt-bindings/gpio/gpio.h>
14 interrupt-parent = <&intc>;
[all …]
H A Dqcm2290.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/clock/qcom,dispcc-qcm2290.h>
9 #include <dt-bindings/clock/qcom,gcc-qcm2290.h>
10 #include <dt-bindings/clock/qcom,qcm2290-gpucc.h>
11 #include <dt-bindings/clock/qcom,rpmcc.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/firmware/qcom,scm.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #include <dt-bindings/interconnect/qcom,qcm2290.h>
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H A Dsdm845.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
12 #include <dt-bindings/clock/qcom,lpass-sdm845.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sdm845.h>
15 #include <dt-bindings/dma/qcom-gpi.h>
16 #include <dt-bindings/firmware/qcom,scm.h>
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/linux/
H A DCREDITS1 This is at least a partial credits-file of people that have
4 scripts. The fields are: name (N), email (E), web-address
6 snail-mail address (S).
10 ----------
51 D: in-kernel DRM Maintainer
76 E: tim_alpaerts@toyota-motor-europe.com
80 S: B-2610 Wilrijk-Antwerpen
85 W: http://www-stu.christs.cam.ac.uk/~aia21/
106 D: Maintainer of ide-cd and Uniform CD-ROM driver,
107 D: ATAPI CD-Changer support, Major 2.1.x CD-ROM update.
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