/freebsd/sys/contrib/device-tree/Bindings/display/msm/ |
H A D | dsi-controller-main.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/dsi [all...] |
H A D | dsi.txt | 1 Qualcomm Technologies Inc. adreno/snapdragon DSI output 3 DSI Controller: 5 - compatible: 6 * "qcom,mdss-dsi-ctrl" 7 - reg: Physical base address and length of the registers of controller 8 - reg-names: The names of register regions. The following regions are required: 10 - interrupts: The interrupt signal from the DSI block. 11 - power-domains: Should be <&mmcc MDSS_GDSC>. 12 - clocks: Phandles to device clocks. 13 - clock-names: the following clocks are required: [all …]
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H A D | qcom,sdm845-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sdm845-mds [all...] |
H A D | qcom,mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schema [all...] |
H A D | qcom,msm8998-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,msm8998-mds [all...] |
H A D | qcom,sm6375-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6375-mds [all...] |
H A D | qcom,sm6350-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6350-mds [all...] |
H A D | qcom,sm6115-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6115-mds [all...] |
H A D | qcom,sm8450-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8450-mds [all...] |
H A D | qcom,sm8150-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8150-mds [all...] |
H A D | qcom,sm8250-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8250-mds [all...] |
H A D | qcom,sm8550-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8550-mds [all...] |
H A D | qcom,sc7180-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sc7180-mds [all...] |
/freebsd/sys/contrib/device-tree/Bindings/display/tegra/ |
H A D | nvidia,tegra20-dsi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dsi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 16 - enum: 17 - nvidia,tegra20-dsi 18 - nvidia,tegra30-dsi 19 - nvidia,tegra114-dsi [all …]
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/freebsd/sys/contrib/device-tree/Bindings/display/bridge/ |
H A D | nwl-dsi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/nwl-dsi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Northwest Logic MIPI-DSI controller on i.MX SoCs 10 - Guido Gúnther <agx@sigxcpu.org> 11 - Robert Chiras <robert.chiras@nxp.com> 14 NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for 15 the SOCs NWL MIPI-DSI host controller. 18 - $ref: ../dsi-controller.yaml# [all …]
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H A D | samsung,mipi-dsim.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/samsung,mipi-dsim.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung MIPI DSIM bridge controller 10 - Inki Dae <inki.dae@samsung.com> 11 - Jagan Teki <jagan@amarulasolutions.com> 12 - Marek Szyprowski <m.szyprowski@samsung.com> 15 Samsung MIPI DSIM bridge controller can be found it on Exynos 21 - enum: [all …]
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/freebsd/sys/contrib/device-tree/Bindings/display/ |
H A D | st,stm32-dsi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/st,stm32-dsi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 DSI host controller 10 - Philippe Cornu <philippe.cornu@foss.st.com> 11 - Yannick Fertre <yannick.fertre@foss.st.com> 14 The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI-DSI host controller. 17 - $ref: dsi-controller.yaml# 21 const: st,stm32-dsi [all …]
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H A D | brcm,bcm-vc4.txt | 8 - compatible: Should be "brcm,bcm2835-vc4" or "brcm,cygnus-vc4" 11 - compatible: Should be one of "brcm,bcm2835-pixelvalve0", 12 "brcm,bcm2835-pixelvalve1", or "brcm,bcm2835-pixelvalve2" 13 - reg: Physical base address and length of the PV's registers 14 - interrupts: The interrupt number 15 See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt 18 - compatible: Should be "brcm,bcm2835-hvs" 19 - reg: Physical base address and length of the HVS's registers 20 - interrupts: The interrupt number 21 See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt [all …]
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H A D | amlogic,meson-g12a-dw-mipi-dsi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/display/amlogic,meson-g12a-dw-mipi-dsi.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Amlogic specific extensions to the Synopsys Designware MIPI DSI Host Controller 11 - Neil Armstrong <neil.armstrong@linaro.org> 15 - A Synopsys DesignWare MIPI DSI Host Controller IP 16 - A TOP control block controlling the Clocks & Resets of the IP 19 - $ref: dsi-controller.yaml# 24 - amlogic,meson-g12a-dw-mipi-dsi [all …]
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H A D | allwinner,sun6i-a31-mipi-dsi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/allwinner,sun6i-a31-mipi-dsi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Allwinner A31 MIPI-DSI Controller 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 16 - enum: 17 - allwinner,sun6i-a31-mipi-dsi 18 - allwinner,sun50i-a64-mipi-dsi [all …]
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H A D | ste,mcde.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ST-Ericsson Multi Channel Display Engine MCDE 10 - Linus Walleij <linus.walleij@linaro.org> 25 - description: MCDECLK (main MCDE clock) 26 - description: LCDCLK (LCD clock) 27 - description: PLLDSI (HDMI clock) 29 clock-names: 31 - const: mcde [all …]
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H A D | brcm,bcm2835-dsi0.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/brcm,bcm2835-dsi0.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Broadcom VC4 (VideoCore4) DSI Controller 10 - Eric Anholt <eric@anholt.net> 13 - $ref: dsi-controller.yaml# 16 "#clock-cells": 21 - brcm,bcm2711-dsi1 22 - brcm,bcm2835-dsi0 [all …]
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/freebsd/sys/contrib/device-tree/Bindings/display/mediatek/ |
H A D | mediatek,dsi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,dsi [all...] |
/freebsd/sys/contrib/device-tree/Bindings/display/hisilicon/ |
H A D | dw-dsi.txt | 1 Device-Tree bindings for DesignWare DSI Host Controller v1.20a driver 3 A DSI Host Controller resides in the middle of display controller and external 7 - compatible: value should be "hisilicon,hi6220-dsi". 8 - reg: physical base address and length of dsi controller's registers. 9 - clocks: contains APB clock phandle + clock-specifier pair. 10 - clock-names: should be "pclk". 11 - ports: contains DSI controller input and output sub port. 21 dsi: dsi@f4107800 { 22 compatible = "hisilicon,hi6220-dsi"; 25 clock-names = "pclk"; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/display/rockchip/ |
H A D | dw_mipi_dsi_rockchip.txt | 1 Rockchip specific extensions to the Synopsys Designware MIPI DSI 5 - #address-cells: Should be <1>. 6 - #size-cells: Should be <0>. 7 - compatible: one of 8 "rockchip,px30-mipi-dsi", "snps,dw-mipi-dsi" 9 "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi" 10 "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi" 11 "rockchip,rk3568-mipi-dsi", "snps,dw-mipi-dsi" 12 - reg: Represent the physical address range of the controller. 13 - interrupts: Represent the controller's interrupt to the CPU(s). [all …]
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