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/linux/arch/arm/boot/dts/nuvoton/
H A Dnuvoton-npcm730-gsj-gpio.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 gpio0pp_pins: gpio0pp-pins {
8 bias-disable;
9 drive-push-pull;
11 gpio1pp_pins: gpio1pp-pins {
13 bias-disable;
14 drive-push-pull;
16 gpio2pp_pins: gpio2pp-pins {
18 bias-disable;
19 drive-push-pull;
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Ds32gxxxa-evb.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
11 can0_pins: can0-pins {
12 can0-grp0 {
14 output-enable;
15 slew-rate = <133>;
18 can0-grp1 {
20 input-enable;
21 slew-rate = <133>;
24 can0-grp2 {
29 can2_pins: can2-pins {
[all …]
H A Ds32gxxxa-rdb.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
11 can0_pins: can0-pins {
12 can0-grp0 {
14 output-enable;
15 slew-rate = <133>;
18 can0-grp1 {
20 input-enable;
21 slew-rate = <133>;
24 can0-grp2 {
29 can1_pins: can1-pins {
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dnvidia,tegra-pinmux-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra-pinmux-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
14 Please refer to pinctrl-bindings.txt in this directory for details of the
22 pin configuration parameters, such as pull-up, tristate, drive strength,
46 $ref: /schemas/types.yaml#/definitions/string-array
57 description: Pull-down/up setting to apply to the pin.
[all …]
H A Dpincfg-node.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pincfg-node.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
21 bias-disable:
25 bias-high-impedance:
27 description: high impedance mode ("third-state", "floating")
29 bias-bus-hold:
33 bias-pull-up:
[all …]
H A Dpinctrl-palmas.txt4 the configuration for Pull UP/DOWN, open drain etc.
7 - compatible: It must be one of following:
8 - "ti,palmas-pinctrl" for Palma series of the pincontrol.
9 - "ti,tps65913-pinctrl" for Palma series device TPS65913.
10 - "ti,tps80036-pinctrl" for Palma series device TPS80036.
12 Please refer to pinctrl-bindings.txt in this directory for details of the
19 those pin(s), and various pin configuration parameters, such as pull-up,
20 open drain.
32 - ti,palmas-enable-dvfs1: Enable DVFS1. Configure pins for DVFS1 mode.
35 - ti,palmas-enable-dvfs2: Enable DVFS2. Configure pins for DVFS2 mode.
[all …]
H A Dawinic,aw9523-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/awinic,aw9523-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
13 The Awinic AW9523/AW9523B I2C GPIO Expander featuring 16 multi-function
18 const: awinic,aw9523-pinctrl
23 '#gpio-cells':
26 include/dt-bindings/gpio/gpio.h
29 gpio-controller: true
[all …]
H A Dsemtech,sx1501q.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Neil Armstrong <neil.armstrong@linaro.org>
16 - semtech,sx1501q
17 - semtech,sx1502q
18 - semtech,sx1503q
19 - semtech,sx1504q
20 - semtech,sx1505q
21 - semtech,sx1506q
[all …]
H A Dnvidia,tegra210-pinmux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra210-pinmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 const: nvidia,tegra210-pinmux
19 - description: APB_MISC_GP_*_PADCTRL register (pad control)
20 - description: PINMUX_AUX_* registers (pinmux)
23 "^pinmux(-[a-z0-9-_]+)?$":
[all …]
H A Dcypress,cy8c95x0.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Patrick Rudolph <patrick.rudolph@9elements.com>
14 Pin function configuration is performed on a per-pin basis.
19 - cypress,cy8c9520
20 - cypress,cy8c9540
21 - cypress,cy8c9560
26 gpio-controller: true
28 '#gpio-cells':
[all …]
H A Dintel,lgm-io.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/intel,lgm-io.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rahul Tanwar <rahul.tanwar@linux.intel.com>
18 const: intel,lgm-io
25 '-pins$':
30 $ref: pinmux-node.yaml#
37 bias-pull-up: true
38 bias-pull-down: true
[all …]
/linux/arch/arm/boot/dts/st/
H A Dstm32f7-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
7 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
8 #include <dt-bindings/mfd/stm32f7-rcc.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
16 interrupt-parent = <&exti>;
20 gpio-controller;
21 #gpio-cells = <2>;
22 interrupt-controller;
[all …]
H A Dstm32h7-pinctrl.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
47 i2c1_pins_a: i2c1-0 {
51 bias-disable;
52 drive-open-drain;
53 slew-rate = <0>;
57 ethernet_rmii: rmii-0 {
68 slew-rate = <2>;
72 sdmmc1_b4_pins_a: sdmmc1-b4-0 {
[all …]
H A Dstm32mp15-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
9 /omit-if-no-ref/
10 adc1_ain_pins_a: adc1-ain-0 {
21 /omit-if-no-ref/
22 adc1_in6_pins_a: adc1-in6-0 {
28 /omit-if-no-ref/
29 adc1_in10_pins_a: adc1-in10-0 {
35 /omit-if-no-ref/
[all …]
H A Dstm32mp157c-ultra-fly-sbc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) Ultratronik GmbH 2024-2025 - All Rights Reserved
6 /dts-v1/;
9 #include "stm32mp15-pinctrl.dtsi"
10 #include "stm32mp15xxac-pinctrl.dtsi"
11 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
12 #include <dt-bindings/mfd/st,stpmic1.h>
13 #include <dt-bindings/gpio/gpio.h>
17 compatible = "ultratronik,stm32mp157c-ultra-fly-sbc", "st,stm32mp157";
28 stdout-path = "serial0:115200n8";
[all …]
/linux/arch/arm64/boot/dts/airoha/
H A Den7581-evb.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 /dts-v1/;
11 compatible = "airoha,en7581-evb", "airoha,en7581";
18 stdout-path = "serial0:115200n8";
19 linux,usable-memory-range = <0x0 0x80200000 0x0 0x1fe00000>;
30 compatible = "fixed-partitions";
31 #address-cells = <1>;
32 #size-cells = <1>;
37 read-only;
63 read-only;
[all …]
/linux/arch/arm64/boot/dts/st/
H A Dstm32mp25-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
9 eth2_rgmii_pins_a: eth2-rgmii-0 {
16 bias-disable;
17 drive-push-pull;
18 slew-rate = <3>;
24 bias-disable;
25 drive-push-pull;
26 slew-rate = <3>;
[all …]
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra210-p2894.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/mfd/max77620.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
16 stdout-path = "serial0:115200n8";
26 pinctrl-names = "boot";
27 pinctrl-0 = <&state_boot>;
35 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
36 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
[all …]
/linux/Documentation/devicetree/bindings/iio/
H A Dst,st-sensors.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/st,st-sensors.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
9 description: The STMicroelectronics sensor devices are pretty straight-forward
16 - Denis Ciocca <denis.ciocca@st.com>
17 - Linus Walleij <linus.walleij@linaro.org>
22 - description: STMicroelectronics Accelerometers
24 - st,h3lis331dl-accel
25 - st,lis2de12
[all …]
/linux/drivers/gpio/
H A Dgpio-tc3589x.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) ST-Ericsson SA 2010
5 * Author: Hanumath Prasad <hanumath.prasad@stericsson.com> for ST-Ericsson
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
40 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; in tc3589x_gpio_get()
55 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; in tc3589x_gpio_set()
67 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; in tc3589x_gpio_direction_output()
80 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; in tc3589x_gpio_direction_input()
91 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; in tc3589x_gpio_get_direction()
110 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; in tc3589x_gpio_set_config()
[all …]
/linux/Documentation/devicetree/bindings/iio/humidity/
H A Dst,hts221.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Bianconi <lorenzo@kernel.org>
23 drive-open-drain:
26 The interrupt/data ready line will be configured as open drain, which
29 vdd-supply: true
35 - compatible
36 - reg
41 - |
[all …]
/linux/Documentation/driver-api/gpio/
H A Ddriver.rst26 between 0 and n-1, n being the number of GPIOs managed by the chip.
29 example if a system uses a memory-mapped set of I/O-registers where 32 GPIO
30 lines are handled by one bit per line in a 32-bit register, it makes sense to
44 So for example one platform could use global numbers 32-159 for GPIOs, with a
46 global numbers 0..63 with one set of GPIO controllers, 64-79 with another type
47 of GPIO controller, and on one particular board 80-95 with an FPGA. The legacy
49 2000-2063 to identify GPIO lines in a bank of I2C GPIO expanders.
60 - methods to establish GPIO line direction
61 - methods used to access GPIO line values
62 - method to set electrical configuration for a given GPIO line
[all …]
/linux/Documentation/devicetree/bindings/iio/gyroscope/
H A Dnxp,fxas21002c.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rui Miguel Silva <rmfrfs@gmail.com>
14 http://www.nxp.com/products/sensors/gyroscopes/3-axis-digital-gyroscope:FXAS21002C
23 vdd-supply:
26 vddio-supply:
29 reset-gpios:
38 interrupt-names:
43 - INT1
[all …]
/linux/drivers/pinctrl/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
80 will be called pinctrl-apple-gpio.
83 bool "Axis ARTPEC-6 pin controller driver"
88 This is the driver for the Axis ARTPEC-6 pin controller. This driver
89 supports pin function multiplexing as well as pin bias and drive
91 found in Documentation/devicetree/bindings/pinctrl/axis,artpec6-pinctrl.txt
100 functionality. This driver supports the pinmux, push-pull and
101 open drain configuration for the GPIO pins of AS3722 devices. It also
129 tristate "X-Powers AXP209 PMIC pinctrl and GPIO Support"
153 The Awinic AW9523/AW9523B is a multi-function I2C GPIO
[all …]
/linux/Documentation/devicetree/bindings/iio/imu/
H A Dst,lsm6dsx.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STM 6-axis (acc + gyro) IMU Mems sensors
10 - Lorenzo Bianconi <lorenzo@kernel.org>
18 - enum:
19 - st,lsm6ds3
20 - st,lsm6ds3h
21 - st,lsm6dsl
22 - st,lsm6dsm
[all …]

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