Home
last modified time | relevance | path

Searched full:dp (Results 1 – 25 of 1092) sorted by relevance

12345678910>>...44

/linux/drivers/gpu/drm/rockchip/
H A Dcdn-dp-core.c27 #include "cdn-dp-core.h"
28 #include "cdn-dp-reg.h"
63 { .compatible = "rockchip,rk3399-cdn-dp",
70 static int cdn_dp_grf_write(struct cdn_dp_device *dp, in cdn_dp_grf_write() argument
75 ret = clk_prepare_enable(dp->grf_clk); in cdn_dp_grf_write()
77 DRM_DEV_ERROR(dp->dev, "Failed to prepare_enable grf clock\n"); in cdn_dp_grf_write()
81 ret = regmap_write(dp->grf, reg, val); in cdn_dp_grf_write()
83 DRM_DEV_ERROR(dp->dev, "Could not write to GRF: %d\n", ret); in cdn_dp_grf_write()
84 clk_disable_unprepare(dp->grf_clk); in cdn_dp_grf_write()
88 clk_disable_unprepare(dp->grf_clk); in cdn_dp_grf_write()
[all …]
H A Dcdn-dp-reg.c14 #include "cdn-dp-core.h"
15 #include "cdn-dp-reg.h"
24 void cdn_dp_set_fw_clk(struct cdn_dp_device *dp, unsigned long clk) in cdn_dp_set_fw_clk() argument
26 writel(clk / 1000000, dp->regs + SW_CLK_H); in cdn_dp_set_fw_clk()
29 void cdn_dp_clock_reset(struct cdn_dp_device *dp) in cdn_dp_clock_reset() argument
45 writel(val, dp->regs + SOURCE_DPTX_CAR); in cdn_dp_clock_reset()
48 writel(val, dp->regs + SOURCE_PHY_CAR); in cdn_dp_clock_reset()
54 writel(val, dp->regs + SOURCE_PKT_CAR); in cdn_dp_clock_reset()
62 writel(val, dp->regs + SOURCE_AIF_CAR); in cdn_dp_clock_reset()
68 writel(val, dp->regs + SOURCE_CIPHER_CAR); in cdn_dp_clock_reset()
[all …]
/linux/drivers/gpu/drm/hisilicon/hibmc/dp/
H A Ddp_link.c12 static inline int hibmc_dp_get_serdes_rate_cfg(struct hibmc_dp_dev *dp) in hibmc_dp_get_serdes_rate_cfg() argument
14 switch (dp->link.cap.link_rate) { in hibmc_dp_get_serdes_rate_cfg()
28 static int hibmc_dp_link_training_configure(struct hibmc_dp_dev *dp) in hibmc_dp_link_training_configure() argument
33 /* DP 2 lane */ in hibmc_dp_link_training_configure()
34 hibmc_dp_reg_write_field(dp, HIBMC_DP_PHYIF_CTRL0, HIBMC_DP_CFG_LANE_DATA_EN, in hibmc_dp_link_training_configure()
35 dp->link.cap.lanes == 0x2 ? 0x3 : 0x1); in hibmc_dp_link_training_configure()
36 hibmc_dp_reg_write_field(dp, HIBMC_DP_DPTX_GCTL0, HIBMC_DP_CFG_PHY_LANE_NUM, in hibmc_dp_link_training_configure()
37 dp->link.cap.lanes == 0x2 ? 0x1 : 0); in hibmc_dp_link_training_configure()
40 hibmc_dp_reg_write_field(dp, HIBMC_DP_VIDEO_CTRL, HIBMC_DP_CFG_STREAM_FRAME_MODE, 0x1); in hibmc_dp_link_training_configure()
43 buf[0] = dp->link.cap.link_rate; in hibmc_dp_link_training_configure()
[all …]
/linux/drivers/gpu/drm/bridge/analogix/
H A Danalogix_dp_core.c3 * Analogix DP (Display Port) core interface driver.
40 static void analogix_dp_init_dp(struct analogix_dp_device *dp) in analogix_dp_init_dp() argument
42 analogix_dp_reset(dp); in analogix_dp_init_dp()
44 analogix_dp_swreset(dp); in analogix_dp_init_dp()
46 analogix_dp_init_analog_param(dp); in analogix_dp_init_dp()
47 analogix_dp_init_interrupt(dp); in analogix_dp_init_dp()
50 analogix_dp_enable_sw_function(dp); in analogix_dp_init_dp()
52 analogix_dp_config_interrupt(dp); in analogix_dp_init_dp()
54 analogix_dp_init_hpd(dp); in analogix_dp_init_dp()
55 analogix_dp_init_aux(dp); in analogix_dp_init_dp()
[all …]
/linux/drivers/usb/typec/altmodes/
H A Ddisplayport.c30 /* Pin assignments that use USB3.1 Gen2 signaling to carry DP protocol */
34 /* Pin assignments that use DP v1.3 signaling to carry DP protocol */
40 /* DP only pin assignments */
84 static int dp_altmode_notify(struct dp_altmode *dp) in dp_altmode_notify() argument
89 if (dp->data.conf) { in dp_altmode_notify()
90 state = get_count_order(DP_CONF_GET_PIN_ASSIGN(dp->data.conf)); in dp_altmode_notify()
96 return typec_altmode_notify(dp->alt, conf, &dp->data); in dp_altmode_notify()
99 static int dp_altmode_configure(struct dp_altmode *dp, u8 con) in dp_altmode_configure() argument
104 /* DP Signalling */ in dp_altmode_configure()
105 conf = (dp->data.conf & DP_CONF_SIGNALLING_MASK) >> DP_CONF_SIGNALLING_SHIFT; in dp_altmode_configure()
[all …]
/linux/drivers/gpu/drm/msm/dp/
H A Ddp_display.c33 MODULE_PARM_DESC(psr_enabled, "enable PSR for eDP and DP displays");
190 { .compatible = "qcom,sa8775p-dp", .data = &msm_dp_desc_sa8775p },
191 { .compatible = "qcom,sc7180-dp", .data = &msm_dp_desc_sc7180 },
192 { .compatible = "qcom,sc7280-dp", .data = &msm_dp_desc_sc7280 },
194 { .compatible = "qcom,sc8180x-dp", .data = &msm_dp_desc_sc8180x },
196 { .compatible = "qcom,sc8280xp-dp", .data = &msm_dp_desc_sc8280xp },
198 { .compatible = "qcom,sdm845-dp", .data = &msm_dp_desc_sdm845 },
199 { .compatible = "qcom,sm8350-dp", .data = &msm_dp_desc_sc7180 },
200 { .compatible = "qcom,sm8650-dp", .data = &msm_dp_desc_sm8650 },
201 { .compatible = "qcom,x1e80100-dp", .data = &msm_dp_desc_x1e80100 },
[all …]
/linux/drivers/gpu/drm/xlnx/
H A Dzynqmp_dp.c42 MODULE_PARM_DESC(aux_timeout_ms, "DP aux timeout value in msec (default: 50)");
49 MODULE_PARM_DESC(power_on_delay_ms, "DP power on delay in msec (default: 4)");
274 * @misc0: misc0 configuration (per DP v1.2 spec)
275 * @misc1: misc1 configuration (per DP v1.2 spec)
339 * @dp: DisplayPort IP core structure
343 struct zynqmp_dp *dp; member
355 * @bridge: DRM bridge for the DP encoder
362 * @phy: PHY handles for DP lanes
369 * @dpcd: DP configuration data from currently connected sink device
416 static void zynqmp_dp_write(struct zynqmp_dp *dp, int offset, u32 val) in zynqmp_dp_write() argument
[all …]
/linux/drivers/usb/typec/ucsi/
H A Ddisplayport.c50 struct ucsi_dp *dp = typec_altmode_get_drvdata(alt); in ucsi_displayport_enter() local
51 struct ucsi *ucsi = dp->con->ucsi; in ucsi_displayport_enter()
57 if (!ucsi_con_mutex_lock(dp->con)) in ucsi_displayport_enter()
60 if (!dp->override && dp->initialized) { in ucsi_displayport_enter()
69 command = UCSI_GET_CURRENT_CAM | UCSI_CONNECTOR_NUMBER(dp->con->num); in ucsi_displayport_enter()
78 ret = dp->con->port_altmode[cur] == alt ? 0 : -EBUSY; in ucsi_displayport_enter()
94 dp->header = VDO(USB_TYPEC_DP_SID, 1, svdm_version, CMD_ENTER_MODE); in ucsi_displayport_enter()
95 dp->header |= VDO_OPOS(USB_TYPEC_DP_MODE); in ucsi_displayport_enter()
96 dp->header |= VDO_CMDT(CMDT_RSP_ACK); in ucsi_displayport_enter()
98 dp->vdo_data = NULL; in ucsi_displayport_enter()
[all …]
/linux/sound/core/seq/oss/
H A Dseq_oss_init.c42 static int create_port(struct seq_oss_devinfo *dp);
43 static int delete_port(struct seq_oss_devinfo *dp);
44 static int alloc_seq_queue(struct seq_oss_devinfo *dp);
169 struct seq_oss_devinfo *dp; in snd_seq_oss_open() local
171 dp = kzalloc(sizeof(*dp), GFP_KERNEL); in snd_seq_oss_open()
172 if (!dp) in snd_seq_oss_open()
175 dp->cseq = system_client; in snd_seq_oss_open()
176 dp->port = -1; in snd_seq_oss_open()
177 dp->queue = -1; in snd_seq_oss_open()
184 dp->index = i; in snd_seq_oss_open()
[all …]
H A Dseq_oss_ioctl.c18 static int snd_seq_oss_synth_info_user(struct seq_oss_devinfo *dp, void __user *arg) in snd_seq_oss_synth_info_user() argument
24 if (snd_seq_oss_synth_make_info(dp, info.device, &info) < 0) in snd_seq_oss_synth_info_user()
31 static int snd_seq_oss_midi_info_user(struct seq_oss_devinfo *dp, void __user *arg) in snd_seq_oss_midi_info_user() argument
37 if (snd_seq_oss_midi_make_info(dp, info.device, &info) < 0) in snd_seq_oss_midi_info_user()
44 static int snd_seq_oss_oob_user(struct seq_oss_devinfo *dp, void __user *arg) in snd_seq_oss_oob_user() argument
52 snd_seq_oss_fill_addr(dp, &tmpev, dp->addr.client, dp->addr.port); in snd_seq_oss_oob_user()
54 if (! snd_seq_oss_process_event(dp, (union evrec *)ev, &tmpev)) { in snd_seq_oss_oob_user()
55 snd_seq_oss_dispatch(dp, &tmpev, 0, 0); in snd_seq_oss_oob_user()
61 snd_seq_oss_ioctl(struct seq_oss_devinfo *dp, unsigned int cmd, unsigned long carg) in snd_seq_oss_ioctl() argument
77 return snd_seq_oss_timer_ioctl(dp->timer, cmd, arg); in snd_seq_oss_ioctl()
[all …]
H A Dseq_oss_synth.c66 static struct seq_oss_synth *get_synthdev(struct seq_oss_devinfo *dp, int dev);
193 snd_seq_oss_synth_setup(struct seq_oss_devinfo *dp) in snd_seq_oss_synth_setup() argument
199 dp->max_synthdev = max_synth_devs; in snd_seq_oss_synth_setup()
200 dp->synth_opened = 0; in snd_seq_oss_synth_setup()
201 memset(dp->synths, 0, sizeof(dp->synths)); in snd_seq_oss_synth_setup()
202 for (i = 0; i < dp->max_synthdev; i++) { in snd_seq_oss_synth_setup()
210 info = &dp->synths[i]; in snd_seq_oss_synth_setup()
211 info->arg.app_index = dp->port; in snd_seq_oss_synth_setup()
212 info->arg.file_mode = dp->file_mode; in snd_seq_oss_synth_setup()
213 info->arg.seq_mode = dp->seq_mode; in snd_seq_oss_synth_setup()
[all …]
/linux/net/dsa/
H A Dport.h18 bool dsa_port_supports_hwtstamp(struct dsa_port *dp);
21 int dsa_port_set_state(struct dsa_port *dp, u8 state, bool do_fast_age);
22 int dsa_port_set_mst_state(struct dsa_port *dp,
25 int dsa_port_enable_rt(struct dsa_port *dp, struct phy_device *phy);
26 int dsa_port_enable(struct dsa_port *dp, struct phy_device *phy);
27 void dsa_port_disable_rt(struct dsa_port *dp);
28 void dsa_port_disable(struct dsa_port *dp);
29 int dsa_port_bridge_join(struct dsa_port *dp, struct net_device *br,
31 void dsa_port_pre_bridge_leave(struct dsa_port *dp, struct net_device *br);
32 void dsa_port_bridge_leave(struct dsa_port *dp, struct net_device *br);
[all …]
H A Dswitch.c26 struct dsa_port *dp; in dsa_switch_fastest_ageing_time() local
28 dsa_switch_for_each_port(dp, ds) in dsa_switch_fastest_ageing_time()
29 if (dp->ageing_time && dp->ageing_time < ageing_time) in dsa_switch_fastest_ageing_time()
30 ageing_time = dp->ageing_time; in dsa_switch_fastest_ageing_time()
55 static bool dsa_port_mtu_match(struct dsa_port *dp, in dsa_port_mtu_match() argument
58 return dp == info->dp || dsa_port_is_dsa(dp) || dsa_port_is_cpu(dp); in dsa_port_mtu_match()
64 struct dsa_port *dp; in dsa_switch_mtu() local
70 dsa_switch_for_each_port(dp, ds) { in dsa_switch_mtu()
71 if (dsa_port_mtu_match(dp, info)) { in dsa_switch_mtu()
72 ret = ds->ops->port_change_mtu(ds, dp->index, in dsa_switch_mtu()
[all …]
H A Ddsa.c107 struct dsa_port *dp; in dsa_tree_lag_find() local
109 list_for_each_entry(dp, &dst->ports, list) in dsa_tree_lag_find()
110 if (dsa_port_lag_dev_get(dp) == lag_dev) in dsa_tree_lag_find()
111 return dp->lag; in dsa_tree_lag_find()
119 struct dsa_port *dp; in dsa_tree_bridge_find() local
121 list_for_each_entry(dp, &dst->ports, list) in dsa_tree_bridge_find()
122 if (dsa_port_bridge_dev_get(dp) == br) in dsa_tree_bridge_find()
123 return dp->bridge; in dsa_tree_bridge_find()
182 struct dsa_port *dp; in dsa_switch_find() local
188 list_for_each_entry(dp, &dst->ports, list) { in dsa_switch_find()
[all …]
H A Duser.c88 struct dsa_port *dp = dsa_user_to_port(dev); in dsa_user_standalone_event_work() local
90 struct dsa_switch *ds = dp->ds; in dsa_user_standalone_event_work()
96 err = dsa_port_standalone_host_fdb_add(dp, addr, vid); in dsa_user_standalone_event_work()
100 dp->index, addr, vid, err); in dsa_user_standalone_event_work()
106 err = dsa_port_standalone_host_fdb_del(dp, addr, vid); in dsa_user_standalone_event_work()
110 dp->index, addr, vid, err); in dsa_user_standalone_event_work()
118 err = dsa_port_standalone_host_mdb_add(dp, &mdb); in dsa_user_standalone_event_work()
122 dp->index, addr, vid, err); in dsa_user_standalone_event_work()
130 err = dsa_port_standalone_host_mdb_del(dp, &mdb); in dsa_user_standalone_event_work()
134 dp->index, addr, vid, err); in dsa_user_standalone_event_work()
[all …]
H A Dtrace.h22 const char *dsa_port_kind(const struct dsa_port *dp);
26 TP_PROTO(const struct dsa_port *dp, const unsigned char *addr, u16 vid,
29 TP_ARGS(dp, addr, vid, db, err),
32 __string(dev, dev_name(dp->ds->dev))
33 __string(kind, dsa_port_kind(dp))
44 __entry->port = dp->index;
61 TP_PROTO(const struct dsa_port *dp, const unsigned char *addr,
63 TP_ARGS(dp, addr, vid, db, err));
66 TP_PROTO(const struct dsa_port *dp, const unsigned char *addr,
68 TP_ARGS(dp, add
[all...]
/linux/sound/hda/codecs/hdmi/
H A Dnvhdmi.c145 HDA_CODEC_ID_MODEL(0x10de0008, "GPU 08 HDMI/DP", MODEL_LEGACY),
146 HDA_CODEC_ID_MODEL(0x10de0009, "GPU 09 HDMI/DP", MODEL_LEGACY),
147 HDA_CODEC_ID_MODEL(0x10de000a, "GPU 0a HDMI/DP", MODEL_LEGACY),
148 HDA_CODEC_ID_MODEL(0x10de000b, "GPU 0b HDMI/DP", MODEL_LEGACY),
150 HDA_CODEC_ID_MODEL(0x10de000d, "GPU 0d HDMI/DP", MODEL_LEGACY),
151 HDA_CODEC_ID_MODEL(0x10de0010, "GPU 10 HDMI/DP", MODEL_LEGACY),
152 HDA_CODEC_ID_MODEL(0x10de0011, "GPU 11 HDMI/DP", MODEL_LEGACY),
153 HDA_CODEC_ID_MODEL(0x10de0012, "GPU 12 HDMI/DP", MODEL_LEGACY),
154 HDA_CODEC_ID_MODEL(0x10de0013, "GPU 13 HDMI/DP", MODEL_LEGACY),
155 HDA_CODEC_ID_MODEL(0x10de0014, "GPU 14 HDMI/DP", MODEL_LEGACY),
[all …]
/linux/drivers/net/ethernet/netronome/nfp/
H A Dnfp_net_dp.c10 * @dp: NFP Net data path struct
17 void *nfp_net_rx_alloc_one(struct nfp_net_dp *dp, dma_addr_t *dma_addr) in nfp_net_rx_alloc_one() argument
21 if (!dp->xdp_prog) { in nfp_net_rx_alloc_one()
22 frag = netdev_alloc_frag(dp->fl_bufsz); in nfp_net_rx_alloc_one()
30 nn_dp_warn(dp, "Failed to alloc receive page frag\n"); in nfp_net_rx_alloc_one()
34 *dma_addr = nfp_net_dma_map_rx(dp, frag); in nfp_net_rx_alloc_one()
35 if (dma_mapping_error(dp->dev, *dma_addr)) { in nfp_net_rx_alloc_one()
36 nfp_net_free_frag(frag, dp->xdp_prog); in nfp_net_rx_alloc_one()
37 nn_dp_warn(dp, "Failed to map DMA RX buffer\n"); in nfp_net_rx_alloc_one()
47 * @dp: NFP Net data path struct
[all …]
H A Dnfp_net_dp.h9 static inline dma_addr_t nfp_net_dma_map_rx(struct nfp_net_dp *dp, void *frag) in nfp_net_dma_map_rx() argument
11 return dma_map_single_attrs(dp->dev, frag + NFP_NET_RX_BUF_HEADROOM, in nfp_net_dma_map_rx()
12 dp->fl_bufsz - NFP_NET_RX_BUF_NON_DATA, in nfp_net_dma_map_rx()
13 dp->rx_dma_dir, DMA_ATTR_SKIP_CPU_SYNC); in nfp_net_dma_map_rx()
17 nfp_net_dma_sync_dev_rx(const struct nfp_net_dp *dp, dma_addr_t dma_addr) in nfp_net_dma_sync_dev_rx() argument
19 dma_sync_single_for_device(dp->dev, dma_addr, in nfp_net_dma_sync_dev_rx()
20 dp->fl_bufsz - NFP_NET_RX_BUF_NON_DATA, in nfp_net_dma_sync_dev_rx()
21 dp->rx_dma_dir); in nfp_net_dma_sync_dev_rx()
24 static inline void nfp_net_dma_unmap_rx(struct nfp_net_dp *dp, in nfp_net_dma_unmap_rx() argument
27 dma_unmap_single_attrs(dp->dev, dma_addr, in nfp_net_dma_unmap_rx()
[all …]
H A Dnfp_net_common.c407 struct nfp_net_dp *dp = &nn->dp; in nfp_net_irqs_assign() local
410 dp->num_r_vecs = nn->max_r_vecs; in nfp_net_irqs_assign()
414 if (dp->num_rx_rings > dp->num_r_vecs || in nfp_net_irqs_assign()
415 dp->num_tx_rings > dp->num_r_vecs) in nfp_net_irqs_assign()
416 dev_warn(nn->dp.dev, "More rings (%d,%d) than vectors (%d).\n", in nfp_net_irqs_assign()
417 dp->num_rx_rings, dp->num_tx_rings, in nfp_net_irqs_assign()
418 dp->num_r_vecs); in nfp_net_irqs_assign()
420 dp->num_rx_rings = min(dp->num_r_vecs, dp->num_rx_rings); in nfp_net_irqs_assign()
421 dp->num_tx_rings = min(dp->num_r_vecs, dp->num_tx_rings); in nfp_net_irqs_assign()
422 dp->num_stack_tx_rings = dp->num_tx_rings; in nfp_net_irqs_assign()
[all …]
/linux/drivers/gpu/drm/exynos/
H A Dexynos_dp.c3 * Samsung SoC DP (Display Port) interface driver.
51 struct exynos_dp_device *dp = to_dp(plat_data); in exynos_dp_crtc_clock_enable() local
52 struct drm_encoder *encoder = &dp->encoder; in exynos_dp_crtc_clock_enable()
75 struct exynos_dp_device *dp = to_dp(plat_data); in exynos_dp_get_modes() local
78 if (dp->plat_data.panel) in exynos_dp_get_modes()
83 DRM_DEV_ERROR(dp->dev, in exynos_dp_get_modes()
88 drm_display_mode_from_videomode(&dp->vm, mode); in exynos_dp_get_modes()
103 struct exynos_dp_device *dp = to_dp(plat_data); in exynos_dp_bridge_attach() local
106 dp->connector = connector; in exynos_dp_bridge_attach()
108 /* Pre-empt DP connector creation if there's a bridge */ in exynos_dp_bridge_attach()
[all …]
/linux/drivers/net/wireless/ath/ath12k/
H A Ddp.c33 /* TODO: Any other peer specific DP cleanup */ in ath12k_dp_peer_cleanup()
63 reo_dest = ar->dp.mac_id + 1; in ath12k_dp_peer_setup()
208 ret = ath12k_hif_get_user_msi_vector(ab, "DP", in ath12k_dp_srng_msi_setup()
325 ath12k_warn(ab, "Not a valid ring type in dp :%d\n", type); in ath12k_dp_srng_setup()
387 struct ath12k_dp *dp) in ath12k_dp_tx_get_bank_profile() argument
397 spin_lock_bh(&dp->tx_bank_lock); in ath12k_dp_tx_get_bank_profile()
399 for (i = 0; i < dp->num_bank_profiles; i++) { in ath12k_dp_tx_get_bank_profile()
400 if (dp->bank_profiles[i].is_configured && in ath12k_dp_tx_get_bank_profile()
401 (dp->bank_profiles[i].bank_config ^ bank_config) == 0) { in ath12k_dp_tx_get_bank_profile()
405 if (!dp->bank_profiles[i].is_configured || in ath12k_dp_tx_get_bank_profile()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_link_encoder.h54 SRI(DP_CONFIG, DP, id), \
55 SRI(DP_DPHY_CNTL, DP, id), \
56 SRI(DP_DPHY_PRBS_CNTL, DP, id), \
57 SRI(DP_DPHY_SCRAM_CNTL, DP, id),\
58 SRI(DP_DPHY_SYM0, DP, id), \
59 SRI(DP_DPHY_SYM1, DP, id), \
60 SRI(DP_DPHY_SYM2, DP, id), \
61 SRI(DP_DPHY_TRAINING_PATTERN_SEL, DP, id), \
62 SRI(DP_LINK_CNTL, DP, id), \
63 SRI(DP_LINK_FRAMING_CNTL, DP, id), \
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Ddp.c24 #include "dp.h"
60 int ret = nvkm_i2c_aux_acquire(outp->dp.aux); in nvkm_dp_aux_xfer()
65 ret = nvkm_i2c_aux_xfer(outp->dp.aux, false, type, addr, data, size); in nvkm_dp_aux_xfer()
66 nvkm_i2c_aux_release(outp->dp.aux); in nvkm_dp_aux_xfer()
73 outp->dp.enabled = pu; in nvkm_dp_aux_pwr()
74 nvkm_dp_enable(outp, outp->dp.enabled); in nvkm_dp_aux_pwr()
105 ret = nvkm_rdaux(outp->dp.aux, addr, &lt->stat[0], 3); in nvkm_dp_train_sense()
114 ret = nvkm_rdaux(outp->dp.aux, addr, &lt->stat[4], 2); in nvkm_dp_train_sense()
119 ret = nvkm_rdaux(outp->dp.aux, DPCD_LS0C, &lt->pc2stat, 1); in nvkm_dp_train_sense()
144 for (i = 0; i < ior->dp.nr; i++) { in nvkm_dp_train_drive()
[all …]
/linux/arch/sparc/kernel/
H A Dds.c135 void (*data)(struct ds_info *dp,
147 static void md_update_data(struct ds_info *dp, struct ds_cap_state *cp,
149 static void domain_shutdown_data(struct ds_info *dp,
152 static void domain_panic_data(struct ds_info *dp,
156 static void dr_cpu_data(struct ds_info *dp,
160 static void ds_pri_data(struct ds_info *dp,
163 static void ds_var_data(struct ds_info *dp,
221 static struct ds_cap_state *find_cap(struct ds_info *dp, u64 handle) in find_cap() argument
225 if (index >= dp->num_ds_states) in find_cap()
227 return &dp->ds_states[index]; in find_cap()
[all …]

12345678910>>...44