Lines Matching full:dp
33 /* TODO: Any other peer specific DP cleanup */ in ath12k_dp_peer_cleanup()
63 reo_dest = ar->dp.mac_id + 1; in ath12k_dp_peer_setup()
208 ret = ath12k_hif_get_user_msi_vector(ab, "DP", in ath12k_dp_srng_msi_setup()
325 ath12k_warn(ab, "Not a valid ring type in dp :%d\n", type); in ath12k_dp_srng_setup()
387 struct ath12k_dp *dp) in ath12k_dp_tx_get_bank_profile() argument
397 spin_lock_bh(&dp->tx_bank_lock); in ath12k_dp_tx_get_bank_profile()
399 for (i = 0; i < dp->num_bank_profiles; i++) { in ath12k_dp_tx_get_bank_profile()
400 if (dp->bank_profiles[i].is_configured && in ath12k_dp_tx_get_bank_profile()
401 (dp->bank_profiles[i].bank_config ^ bank_config) == 0) { in ath12k_dp_tx_get_bank_profile()
405 if (!dp->bank_profiles[i].is_configured || in ath12k_dp_tx_get_bank_profile()
406 !dp->bank_profiles[i].num_users) { in ath12k_dp_tx_get_bank_profile()
413 spin_unlock_bh(&dp->tx_bank_lock); in ath12k_dp_tx_get_bank_profile()
419 dp->bank_profiles[bank_id].is_configured = true; in ath12k_dp_tx_get_bank_profile()
420 dp->bank_profiles[bank_id].bank_config = bank_config; in ath12k_dp_tx_get_bank_profile()
423 dp->bank_profiles[bank_id].num_users++; in ath12k_dp_tx_get_bank_profile()
424 spin_unlock_bh(&dp->tx_bank_lock); in ath12k_dp_tx_get_bank_profile()
430 bank_id, bank_config, dp->bank_profiles[bank_id].bank_config, in ath12k_dp_tx_get_bank_profile()
431 dp->bank_profiles[bank_id].num_users); in ath12k_dp_tx_get_bank_profile()
436 void ath12k_dp_tx_put_bank_profile(struct ath12k_dp *dp, u8 bank_id) in ath12k_dp_tx_put_bank_profile() argument
438 spin_lock_bh(&dp->tx_bank_lock); in ath12k_dp_tx_put_bank_profile()
439 dp->bank_profiles[bank_id].num_users--; in ath12k_dp_tx_put_bank_profile()
440 spin_unlock_bh(&dp->tx_bank_lock); in ath12k_dp_tx_put_bank_profile()
445 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_deinit_bank_profiles() local
447 kfree(dp->bank_profiles); in ath12k_dp_deinit_bank_profiles()
448 dp->bank_profiles = NULL; in ath12k_dp_deinit_bank_profiles()
453 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_init_bank_profiles() local
457 dp->num_bank_profiles = num_tcl_banks; in ath12k_dp_init_bank_profiles()
458 dp->bank_profiles = kmalloc_array(num_tcl_banks, in ath12k_dp_init_bank_profiles()
461 if (!dp->bank_profiles) in ath12k_dp_init_bank_profiles()
464 spin_lock_init(&dp->tx_bank_lock); in ath12k_dp_init_bank_profiles()
467 dp->bank_profiles[i].is_configured = false; in ath12k_dp_init_bank_profiles()
468 dp->bank_profiles[i].num_users = 0; in ath12k_dp_init_bank_profiles()
476 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_srng_common_cleanup() local
479 ath12k_dp_srng_cleanup(ab, &dp->reo_status_ring); in ath12k_dp_srng_common_cleanup()
480 ath12k_dp_srng_cleanup(ab, &dp->reo_cmd_ring); in ath12k_dp_srng_common_cleanup()
481 ath12k_dp_srng_cleanup(ab, &dp->reo_except_ring); in ath12k_dp_srng_common_cleanup()
482 ath12k_dp_srng_cleanup(ab, &dp->rx_rel_ring); in ath12k_dp_srng_common_cleanup()
483 ath12k_dp_srng_cleanup(ab, &dp->reo_reinject_ring); in ath12k_dp_srng_common_cleanup()
485 ath12k_dp_srng_cleanup(ab, &dp->tx_ring[i].tcl_comp_ring); in ath12k_dp_srng_common_cleanup()
486 ath12k_dp_srng_cleanup(ab, &dp->tx_ring[i].tcl_data_ring); in ath12k_dp_srng_common_cleanup()
488 ath12k_dp_srng_cleanup(ab, &dp->wbm_desc_rel_ring); in ath12k_dp_srng_common_cleanup()
493 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_srng_common_setup() local
499 ret = ath12k_dp_srng_setup(ab, &dp->wbm_desc_rel_ring, in ath12k_dp_srng_common_setup()
512 ret = ath12k_dp_srng_setup(ab, &dp->tx_ring[i].tcl_data_ring, in ath12k_dp_srng_common_setup()
521 ret = ath12k_dp_srng_setup(ab, &dp->tx_ring[i].tcl_comp_ring, in ath12k_dp_srng_common_setup()
531 ret = ath12k_dp_srng_setup(ab, &dp->reo_reinject_ring, HAL_REO_REINJECT, in ath12k_dp_srng_common_setup()
539 ret = ath12k_dp_srng_setup(ab, &dp->rx_rel_ring, HAL_WBM2SW_RELEASE, in ath12k_dp_srng_common_setup()
547 ret = ath12k_dp_srng_setup(ab, &dp->reo_except_ring, HAL_REO_EXCEPTION, in ath12k_dp_srng_common_setup()
555 ret = ath12k_dp_srng_setup(ab, &dp->reo_cmd_ring, HAL_REO_CMD, in ath12k_dp_srng_common_setup()
562 srng = &ab->hal.srng_list[dp->reo_cmd_ring.ring_id]; in ath12k_dp_srng_common_setup()
565 ret = ath12k_dp_srng_setup(ab, &dp->reo_status_ring, HAL_REO_STATUS, in ath12k_dp_srng_common_setup()
599 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_scatter_idle_link_desc_cleanup() local
600 struct hal_wbm_idle_scatter_list *slist = dp->scatter_list; in ath12k_dp_scatter_idle_link_desc_cleanup()
619 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_scatter_idle_link_desc_setup() local
620 struct dp_link_desc_bank *link_desc_banks = dp->link_desc_banks; in ath12k_dp_scatter_idle_link_desc_setup()
621 struct hal_wbm_idle_scatter_list *slist = dp->scatter_list; in ath12k_dp_scatter_idle_link_desc_setup()
631 enum hal_rx_buf_return_buf_manager rbm = dp->idle_link_rbm; in ath12k_dp_scatter_idle_link_desc_setup()
713 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_link_desc_bank_alloc() local
742 ath12k_dp_link_desc_bank_free(ab, dp->link_desc_banks); in ath12k_dp_link_desc_bank_alloc()
761 struct ath12k_dp *dp = &ab->dp; in ath12k_wbm_idle_ring_setup() local
786 ret = ath12k_dp_srng_setup(ab, &dp->wbm_idle_ring, in ath12k_wbm_idle_ring_setup()
807 enum hal_rx_buf_return_buf_manager rbm = ab->dp.idle_link_rbm; in ath12k_dp_link_desc_setup()
997 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_service_srng() local
998 struct dp_rxdma_ring *rx_ring = &dp->rx_refill_buf_ring; in ath12k_dp_service_srng()
1020 struct ath12k_pdev_dp *dp = &ar->dp; in ath12k_dp_pdev_pre_alloc() local
1022 dp->mac_id = ar->pdev_idx; in ath12k_dp_pdev_pre_alloc()
1023 atomic_set(&dp->num_tx_pending, 0); in ath12k_dp_pdev_pre_alloc()
1024 init_waitqueue_head(&dp->tx_empty_waitq); in ath12k_dp_pdev_pre_alloc()
1084 int ath12k_dp_htt_connect(struct ath12k_dp *dp) in ath12k_dp_htt_connect() argument
1096 status = ath12k_htc_connect_service(&dp->ab->htc, &conn_req, in ath12k_dp_htt_connect()
1102 dp->eid = conn_resp.eid; in ath12k_dp_htt_connect()
1140 arvif->bank_id = ath12k_dp_tx_get_bank_profile(ab, arvif, &ab->dp); in ath12k_dp_vdev_tx_attach()
1144 ath12k_err(ar->ab, "Failed to initialize DP TX Banks"); in ath12k_dp_vdev_tx_attach()
1153 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_cc_cleanup() local
1160 if (!dp->spt_info) in ath12k_dp_cc_cleanup()
1164 spin_lock_bh(&dp->rx_desc_lock); in ath12k_dp_cc_cleanup()
1166 if (dp->rxbaddr) { in ath12k_dp_cc_cleanup()
1168 if (!dp->rxbaddr[i]) in ath12k_dp_cc_cleanup()
1171 desc_info = dp->rxbaddr[i]; in ath12k_dp_cc_cleanup()
1190 kfree(dp->rxbaddr[i]); in ath12k_dp_cc_cleanup()
1191 dp->rxbaddr[i] = NULL; in ath12k_dp_cc_cleanup()
1194 kfree(dp->rxbaddr); in ath12k_dp_cc_cleanup()
1195 dp->rxbaddr = NULL; in ath12k_dp_cc_cleanup()
1198 spin_unlock_bh(&dp->rx_desc_lock); in ath12k_dp_cc_cleanup()
1202 spin_lock_bh(&dp->tx_desc_lock[i]); in ath12k_dp_cc_cleanup()
1205 &dp->tx_desc_used_list[i], list) { in ath12k_dp_cc_cleanup()
1227 if (atomic_dec_and_test(&ar->dp.num_tx_pending)) in ath12k_dp_cc_cleanup()
1228 wake_up(&ar->dp.tx_empty_waitq); in ath12k_dp_cc_cleanup()
1236 spin_unlock_bh(&dp->tx_desc_lock[i]); in ath12k_dp_cc_cleanup()
1239 if (dp->txbaddr) { in ath12k_dp_cc_cleanup()
1241 spin_lock_bh(&dp->tx_desc_lock[pool_id]); in ath12k_dp_cc_cleanup()
1246 if (!dp->txbaddr[tx_spt_page]) in ath12k_dp_cc_cleanup()
1249 kfree(dp->txbaddr[tx_spt_page]); in ath12k_dp_cc_cleanup()
1250 dp->txbaddr[tx_spt_page] = NULL; in ath12k_dp_cc_cleanup()
1253 spin_unlock_bh(&dp->tx_desc_lock[pool_id]); in ath12k_dp_cc_cleanup()
1256 kfree(dp->txbaddr); in ath12k_dp_cc_cleanup()
1257 dp->txbaddr = NULL; in ath12k_dp_cc_cleanup()
1261 for (i = 0; i < dp->num_spt_pages; i++) { in ath12k_dp_cc_cleanup()
1262 if (!dp->spt_info[i].vaddr) in ath12k_dp_cc_cleanup()
1266 dp->spt_info[i].vaddr, dp->spt_info[i].paddr); in ath12k_dp_cc_cleanup()
1267 dp->spt_info[i].vaddr = NULL; in ath12k_dp_cc_cleanup()
1270 kfree(dp->spt_info); in ath12k_dp_cc_cleanup()
1271 dp->spt_info = NULL; in ath12k_dp_cc_cleanup()
1276 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_reoq_lut_cleanup() local
1281 if (dp->reoq_lut.vaddr_unaligned) { in ath12k_dp_reoq_lut_cleanup()
1285 dma_free_coherent(ab->dev, dp->reoq_lut.size, in ath12k_dp_reoq_lut_cleanup()
1286 dp->reoq_lut.vaddr_unaligned, in ath12k_dp_reoq_lut_cleanup()
1287 dp->reoq_lut.paddr_unaligned); in ath12k_dp_reoq_lut_cleanup()
1288 dp->reoq_lut.vaddr_unaligned = NULL; in ath12k_dp_reoq_lut_cleanup()
1291 if (dp->ml_reoq_lut.vaddr_unaligned) { in ath12k_dp_reoq_lut_cleanup()
1295 dma_free_coherent(ab->dev, dp->ml_reoq_lut.size, in ath12k_dp_reoq_lut_cleanup()
1296 dp->ml_reoq_lut.vaddr_unaligned, in ath12k_dp_reoq_lut_cleanup()
1297 dp->ml_reoq_lut.paddr_unaligned); in ath12k_dp_reoq_lut_cleanup()
1298 dp->ml_reoq_lut.vaddr_unaligned = NULL; in ath12k_dp_reoq_lut_cleanup()
1304 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_free() local
1307 if (!dp->ab) in ath12k_dp_free()
1310 ath12k_dp_link_desc_cleanup(ab, dp->link_desc_banks, in ath12k_dp_free()
1311 HAL_WBM_IDLE_LINK, &dp->wbm_idle_ring); in ath12k_dp_free()
1321 kfree(dp->tx_ring[i].tx_status); in ath12k_dp_free()
1322 dp->tx_ring[i].tx_status = NULL; in ath12k_dp_free()
1327 dp->ab = NULL; in ath12k_dp_free()
1391 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_cc_get_desc_addr_ptr() local
1393 return dp->spt_info[ppt_idx].vaddr + spt_idx; in ath12k_dp_cc_get_desc_addr_ptr()
1399 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_get_rx_desc() local
1406 start_ppt_idx = dp->rx_ppt_base + ATH12K_RX_SPT_PAGE_OFFSET(ab); in ath12k_dp_get_rx_desc()
1414 ppt_idx = ppt_idx - dp->rx_ppt_base; in ath12k_dp_get_rx_desc()
1445 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_cc_desc_init() local
1452 spin_lock_bh(&dp->rx_desc_lock); in ath12k_dp_cc_desc_init()
1454 dp->rxbaddr = kcalloc(num_rx_spt_pages, in ath12k_dp_cc_desc_init()
1457 if (!dp->rxbaddr) { in ath12k_dp_cc_desc_init()
1458 spin_unlock_bh(&dp->rx_desc_lock); in ath12k_dp_cc_desc_init()
1470 spin_unlock_bh(&dp->rx_desc_lock); in ath12k_dp_cc_desc_init()
1475 cookie_ppt_idx = dp->rx_ppt_base + ppt_idx; in ath12k_dp_cc_desc_init()
1476 dp->rxbaddr[i] = &rx_descs[0]; in ath12k_dp_cc_desc_init()
1482 list_add_tail(&rx_descs[j].list, &dp->rx_desc_free_list); in ath12k_dp_cc_desc_init()
1490 spin_unlock_bh(&dp->rx_desc_lock); in ath12k_dp_cc_desc_init()
1492 dp->txbaddr = kcalloc(ATH12K_NUM_TX_SPT_PAGES(ab), in ath12k_dp_cc_desc_init()
1495 if (!dp->txbaddr) in ath12k_dp_cc_desc_init()
1499 spin_lock_bh(&dp->tx_desc_lock[pool_id]); in ath12k_dp_cc_desc_init()
1505 spin_unlock_bh(&dp->tx_desc_lock[pool_id]); in ath12k_dp_cc_desc_init()
1514 dp->txbaddr[tx_spt_page] = &tx_descs[0]; in ath12k_dp_cc_desc_init()
1520 &dp->tx_desc_free_list[pool_id]); in ath12k_dp_cc_desc_init()
1528 spin_unlock_bh(&dp->tx_desc_lock[pool_id]); in ath12k_dp_cc_desc_init()
1534 struct ath12k_dp *dp, in ath12k_dp_cmem_init() argument
1548 cmem_base += ATH12K_PPT_ADDR_OFFSET(dp->rx_ppt_base); in ath12k_dp_cmem_init()
1560 dp->spt_info[i].paddr >> ATH12K_SPT_4K_ALIGN_OFFSET); in ath12k_dp_cmem_init()
1574 ath12k_dp_cmem_init(ab, &ag->ab[i]->dp, ATH12K_DP_RX_DESC); in ath12k_dp_partner_cc_init()
1585 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_cc_init() local
1588 INIT_LIST_HEAD(&dp->rx_desc_free_list); in ath12k_dp_cc_init()
1589 spin_lock_init(&dp->rx_desc_lock); in ath12k_dp_cc_init()
1592 INIT_LIST_HEAD(&dp->tx_desc_free_list[i]); in ath12k_dp_cc_init()
1593 INIT_LIST_HEAD(&dp->tx_desc_used_list[i]); in ath12k_dp_cc_init()
1594 spin_lock_init(&dp->tx_desc_lock[i]); in ath12k_dp_cc_init()
1597 dp->num_spt_pages = ath12k_dp_get_num_spt_pages(ab); in ath12k_dp_cc_init()
1598 if (dp->num_spt_pages > ATH12K_MAX_PPT_ENTRIES) in ath12k_dp_cc_init()
1599 dp->num_spt_pages = ATH12K_MAX_PPT_ENTRIES; in ath12k_dp_cc_init()
1601 dp->spt_info = kcalloc(dp->num_spt_pages, sizeof(struct ath12k_spt_info), in ath12k_dp_cc_init()
1604 if (!dp->spt_info) { in ath12k_dp_cc_init()
1609 dp->rx_ppt_base = ab->device_id * ATH12K_NUM_RX_SPT_PAGES(ab); in ath12k_dp_cc_init()
1611 for (i = 0; i < dp->num_spt_pages; i++) { in ath12k_dp_cc_init()
1612 dp->spt_info[i].vaddr = dma_alloc_coherent(ab->dev, in ath12k_dp_cc_init()
1614 &dp->spt_info[i].paddr, in ath12k_dp_cc_init()
1617 if (!dp->spt_info[i].vaddr) { in ath12k_dp_cc_init()
1622 if (dp->spt_info[i].paddr & ATH12K_SPT_4K_ALIGN_CHECK) { in ath12k_dp_cc_init()
1629 ret = ath12k_dp_cmem_init(ab, dp, ATH12K_DP_TX_DESC); in ath12k_dp_cc_init()
1635 ret = ath12k_dp_cmem_init(ab, dp, ATH12K_DP_RX_DESC); in ath12k_dp_cc_init()
1671 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_reoq_lut_setup() local
1678 ret = ath12k_dp_alloc_reoq_lut(ab, &dp->reoq_lut); in ath12k_dp_reoq_lut_setup()
1684 ret = ath12k_dp_alloc_reoq_lut(ab, &dp->ml_reoq_lut); in ath12k_dp_reoq_lut_setup()
1687 dma_free_coherent(ab->dev, dp->reoq_lut.size, in ath12k_dp_reoq_lut_setup()
1688 dp->reoq_lut.vaddr_unaligned, in ath12k_dp_reoq_lut_setup()
1689 dp->reoq_lut.paddr_unaligned); in ath12k_dp_reoq_lut_setup()
1690 dp->reoq_lut.vaddr_unaligned = NULL; in ath12k_dp_reoq_lut_setup()
1701 dp->reoq_lut.paddr >> 8); in ath12k_dp_reoq_lut_setup()
1704 dp->ml_reoq_lut.paddr >> 8); in ath12k_dp_reoq_lut_setup()
1737 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_alloc() local
1744 dp->ab = ab; in ath12k_dp_alloc()
1746 INIT_LIST_HEAD(&dp->reo_cmd_list); in ath12k_dp_alloc()
1747 INIT_LIST_HEAD(&dp->reo_cmd_cache_flush_list); in ath12k_dp_alloc()
1748 spin_lock_init(&dp->reo_cmd_lock); in ath12k_dp_alloc()
1750 dp->reo_cmd_cache_flush_count = 0; in ath12k_dp_alloc()
1751 dp->idle_link_rbm = ath12k_dp_get_idle_link_rbm(ab); in ath12k_dp_alloc()
1759 srng = &ab->hal.srng_list[dp->wbm_idle_ring.ring_id]; in ath12k_dp_alloc()
1761 ret = ath12k_dp_link_desc_setup(ab, dp->link_desc_banks, in ath12k_dp_alloc()
1794 dp->tx_ring[i].tcl_data_ring_id = i; in ath12k_dp_alloc()
1796 dp->tx_ring[i].tx_status_head = 0; in ath12k_dp_alloc()
1797 dp->tx_ring[i].tx_status_tail = DP_TX_COMP_RING_SIZE(ab) - 1; in ath12k_dp_alloc()
1798 dp->tx_ring[i].tx_status = kmalloc(size, GFP_KERNEL); in ath12k_dp_alloc()
1799 if (!dp->tx_ring[i].tx_status) { in ath12k_dp_alloc()
1815 /* Init any SOC level resource for DP */ in ath12k_dp_alloc()
1835 ath12k_dp_link_desc_cleanup(ab, dp->link_desc_banks, in ath12k_dp_alloc()
1836 HAL_WBM_IDLE_LINK, &dp->wbm_idle_ring); in ath12k_dp_alloc()