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/linux/Documentation/devicetree/bindings/dma/
H A Drenesas,rcar-dmac.yaml4 $id: http://devicetree.org/schemas/dma/renesas,rcar-dmac.yaml#
20 - renesas,dmac-r8a7742 # RZ/G1H
21 - renesas,dmac-r8a7743 # RZ/G1M
22 - renesas,dmac-r8a7744 # RZ/G1N
23 - renesas,dmac-r8a7745 # RZ/G1E
24 - renesas,dmac-r8a77470 # RZ/G1C
25 - renesas,dmac-r8a774a1 # RZ/G2M
26 - renesas,dmac-r8a774b1 # RZ/G2N
27 - renesas,dmac-r8a774c0 # RZ/G2E
28 - renesas,dmac-r8a774e1 # RZ/G2H
[all …]
H A Drenesas,usb-dmac.yaml4 $id: http://devicetree.org/schemas/dma/renesas,usb-dmac.yaml#
19 - renesas,r8a7742-usb-dmac # RZ/G1H
20 - renesas,r8a7743-usb-dmac # RZ/G1M
21 - renesas,r8a7744-usb-dmac # RZ/G1N
22 - renesas,r8a7745-usb-dmac # RZ/G1E
23 - renesas,r8a77470-usb-dmac # RZ/G1C
24 - renesas,r8a774a1-usb-dmac # RZ/G2M
25 - renesas,r8a774b1-usb-dmac # RZ/G2N
26 - renesas,r8a774c0-usb-dmac # RZ/G2E
27 - renesas,r8a774e1-usb-dmac # RZ/G2H
[all …]
H A Drenesas,rz-dmac.yaml4 $id: http://devicetree.org/schemas/dma/renesas,rz-dmac.yaml#
19 - renesas,r9a07g043-dmac # RZ/G2UL and RZ/Five
20 - renesas,r9a07g044-dmac # RZ/G2{L,LC}
21 - renesas,r9a07g054-dmac # RZ/V2L
22 - renesas,r9a08g045-dmac # RZ/G3S
23 - const: renesas,rz-dmac
66 The cell specifies the encoded MID/RID values of the DMAC port
111 dmac: dma-controller@11820000 {
112 compatible = "renesas,r9a07g044-dmac",
113 "renesas,rz-dmac";
H A Dsocionext,uniphier-mio-dmac.yaml4 $id: http://devicetree.org/schemas/dma/socionext,uniphier-mio-dmac.yaml#
21 const: socionext,uniphier-mio-dmac
55 dmac: dma-controller@5a000000 {
56 compatible = "socionext,uniphier-mio-dmac";
/linux/drivers/dma/
H A Ddma-axi-dmac.c3 * Driver for the Analog Devices AXI-DMAC core
27 #include <dt-bindings/dma/axi-dmac.h>
33 * The AXI-DMAC is a soft IP core that is used in FPGA designs. The core has
229 struct axi_dmac *dmac = chan_to_axi_dmac(chan); in axi_dmac_start_transfer() local
237 val = axi_dmac_read(dmac, AXI_DMAC_REG_START_TRANSFER); in axi_dmac_start_transfer()
272 sg->hw->id = axi_dmac_read(dmac, AXI_DMAC_REG_TRANSFER_ID); in axi_dmac_start_transfer()
276 axi_dmac_write(dmac, AXI_DMAC_REG_DEST_ADDRESS, sg->hw->dest_addr); in axi_dmac_start_transfer()
277 axi_dmac_write(dmac, AXI_DMAC_REG_DEST_STRIDE, sg->hw->dst_stride); in axi_dmac_start_transfer()
281 axi_dmac_write(dmac, AXI_DMAC_REG_SRC_ADDRESS, sg->hw->src_addr); in axi_dmac_start_transfer()
282 axi_dmac_write(dmac, AXI_DMAC_REG_SRC_STRIDE, sg->hw->src_stride); in axi_dmac_start_transfer()
[all …]
H A Dpl330.c318 * One cycle of DMAC operation.
370 /* A DMAC Thread */
376 /* Parent DMAC */
377 struct pl330_dmac *dmac; member
393 /* In the DMAC pool */
433 /* Pointer to the DMAC that manages this channel,
435 * As the parent, this DMAC also provides descriptors
438 struct pl330_dmac *dmac; member
444 * Hardware channel thread of PL330 DMAC. NULL if the channel is
469 /* Pool of descriptors available for the DMAC's channels */
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/linux/drivers/dma/sh/
H A Drz-dmac.c175 static void rz_dmac_writel(struct rz_dmac *dmac, unsigned int val, in rz_dmac_writel() argument
178 writel(val, dmac->base + offset); in rz_dmac_writel()
181 static void rz_dmac_ext_writel(struct rz_dmac *dmac, unsigned int val, in rz_dmac_ext_writel() argument
184 writel(val, dmac->ext_base + offset); in rz_dmac_ext_writel()
187 static u32 rz_dmac_ext_readl(struct rz_dmac *dmac, unsigned int offset) in rz_dmac_ext_readl() argument
189 return readl(dmac->ext_base + offset); in rz_dmac_ext_readl()
256 struct rz_dmac *dmac = to_rz_dmac(chan->device); in rz_dmac_enable_hw() local
262 dev_dbg(dmac->dev, "%s channel %d\n", __func__, channel->index); in rz_dmac_enable_hw()
287 struct rz_dmac *dmac = to_rz_dmac(chan->device); in rz_dmac_disable_hw() local
290 dev_dbg(dmac->dev, "%s channel %d\n", __func__, channel->index); in rz_dmac_disable_hw()
[all …]
H A Dusb-dmac.c7 * based on rcar-dmac.c
46 * @residue: residue after the DMAC completed a transfer
48 * @done_cookie: cookie after the DMAC completed a transfer
74 * @desc_freed: freed descriptors after the DMAC completed a transfer
95 * @channels: array of DMAC channels
151 static void usb_dmac_write(struct usb_dmac *dmac, u32 reg, u32 data) in usb_dmac_write() argument
153 writel(data, dmac->iomem + reg); in usb_dmac_write()
156 static u32 usb_dmac_read(struct usb_dmac *dmac, u32 reg) in usb_dmac_read() argument
158 return readl(dmac->iomem + reg); in usb_dmac_read()
244 static int usb_dmac_init(struct usb_dmac *dmac) in usb_dmac_init() argument
[all …]
H A Drcar-dmac.c195 * @channels: array of DMAC channels
214 #define for_each_rcar_dmac_chan(i, dmac, chan) \ argument
215 for (i = 0, chan = &(dmac)->channels[0]; i < (dmac)->n_channels; i++, chan++) \
216 if (!((dmac)->channels_mask & BIT(i))) continue; else
220 * @chan_offset_base: DMAC channels base offset
221 * @chan_offset_stride: DMAC channels offset stride
312 static void rcar_dmac_write(struct rcar_dmac *dmac, u32 reg, u32 data) in rcar_dmac_write() argument
315 writew(data, dmac->dmac_base + reg); in rcar_dmac_write()
317 writel(data, dmac->dmac_base + reg); in rcar_dmac_write()
320 static u32 rcar_dmac_read(struct rcar_dmac *dmac, u32 reg) in rcar_dmac_read() argument
[all …]
H A DMakefile16 obj-$(CONFIG_RCAR_DMAC) += rcar-dmac.o
17 obj-$(CONFIG_RENESAS_USB_DMAC) += usb-dmac.o
18 obj-$(CONFIG_RZ_DMAC) += rz-dmac.o
/linux/tools/testing/selftests/net/forwarding/
H A Dtc_flower_l2_miss.sh73 local dmac=00:01:02:03:04:05
81 flower indev $swp1 l2_miss 1 dst_mac $dmac src_ip $sip \
85 flower indev $swp1 l2_miss 0 dst_mac $dmac src_ip $sip \
89 $MZ $h1 -a own -b $dmac -t ip -A $sip -B $dip -c 1 -p 100 -q
98 bridge fdb replace $dmac dev $swp2 master static
100 $MZ $h1 -a own -b $dmac -t ip -A $sip -B $dip -c 1 -p 100 -q
109 bridge fdb del $dmac dev $swp2 master static
111 $MZ $h1 -a own -b $dmac -t ip -A $sip -B $dip -c 1 -p 100 -q
130 local dmac=$1; shift
146 $MZ $mode $h1 -a own -b $dmac -t ip -A $sip -B $dip -c 1 -p 100 -q
[all …]
H A Dno_forwarding.sh35 local dmac=$3
37 $MZ -q $if_name "$dmac $smac $NON_IP_PKT"
43 local dmac=$2
45 ip neigh add $H2_IPV4 lladdr $dmac dev $if_name
60 local dmac=$2
62 ip -6 neigh add $H2_IPV6 lladdr $dmac dev $if_name
94 local dmac=$(mac_get $h2)
102 send_non_ip $h1 $smac $dmac
105 send_uc_ipv4 $h1 $dmac
107 send_uc_ipv6 $h1 $dmac
[all …]
H A Dtc_flower_port_range.sh83 local dmac=$(mac_get $h2)
105 $MZ $mode $h1 -c 1 -q -p 100 -a $smac -b $dmac -A $sip -B $dip \
112 $MZ $mode $h1 -c 1 -q -p 100 -a $smac -b $dmac -A $sip -B $dip \
119 $MZ $mode $h1 -c 1 -q -p 100 -a $smac -b $dmac -A $sip -B $dip \
128 $MZ $mode $h1 -c 1 -q -p 100 -a $smac -b $dmac -A $sip -B $dip \
130 $MZ $mode $h1 -c 1 -q -p 100 -a $smac -b $dmac -A $sip -B $dip \
132 $MZ $mode $h1 -c 1 -q -p 100 -a $smac -b $dmac -A $sip -B $dip \
134 $MZ $mode $h1 -c 1 -q -p 100 -a $smac -b $dmac -A $sip -B $dip \
136 $MZ $mode $h1 -c 1 -q -p 100 -a $smac -b $dmac -A $sip -B $dip \
/linux/sound/soc/sh/rcar/
H A Ddma.c3 // Renesas R-Car Audio DMAC support
14 * Audio DMAC peri peri register
66 * Audio DMAC
150 * in case of monaural data writing or reading through Audio-DMAC in rsnd_dmaen_start()
224 struct rsnd_dma_ctrl *dmac = rsnd_priv_to_dmac(priv); in rsnd_dmaen_attach() local
252 dmac->dmaen_num++; in rsnd_dmaen_attach()
277 * Audio DMAC peri peri
366 #define rsnd_dmapp_addr(dmac, dma, reg) \ argument
367 (dmac->ppbase + 0x20 + reg + \
373 struct rsnd_dma_ctrl *dmac = rsnd_priv_to_dmac(priv); in rsnd_dmapp_write() local
[all …]
/linux/arch/sh/kernel/cpu/sh4/
H A Dsetup-sh7750.c182 HUDI, GPIOI, DMAC, enumerator
208 { 0xffd0000c, 0, 16, 4, /* IPRC */ { GPIOI, DMAC, SCIF, HUDI } },
224 INTC_VECT(DMAC, 0x640), INTC_VECT(DMAC, 0x660),
225 INTC_VECT(DMAC, 0x680), INTC_VECT(DMAC, 0x6a0),
226 INTC_VECT(DMAC, 0x6c0),
237 INTC_VECT(DMAC, 0x640), INTC_VECT(DMAC, 0x660),
238 INTC_VECT(DMAC, 0x680), INTC_VECT(DMAC, 0x6a0),
239 INTC_VECT(DMAC, 0x780), INTC_VECT(DMAC, 0x7a0),
240 INTC_VECT(DMAC, 0x7c0), INTC_VECT(DMAC, 0x7e0),
241 INTC_VECT(DMAC, 0x6c0),
H A Dsetup-sh7760.c21 HUDI, GPIOI, DMAC, enumerator
45 INTC_VECT(DMAC, 0x640), INTC_VECT(DMAC, 0x660),
46 INTC_VECT(DMAC, 0x680), INTC_VECT(DMAC, 0x6a0),
47 INTC_VECT(DMAC, 0x780), INTC_VECT(DMAC, 0x7a0),
48 INTC_VECT(DMAC, 0x7c0), INTC_VECT(DMAC, 0x7e0),
49 INTC_VECT(DMAC, 0x6c0),
106 { 0xffd0000c, 0, 16, 4, /* IPRC */ { GPIOI, DMAC, 0, HUDI } },
/linux/tools/testing/selftests/drivers/net/mlxsw/
H A Ddevlink_trap_l2_drops.sh120 local dmac=de:ad:be:ef:13:37
129 flower dst_mac $dmac action drop
131 $MZ $h1 "$opt" -c 0 -p 100 -a own -b $dmac -t ip -d 1msec -q &
180 local dmac=de:ad:be:ef:13:37
189 flower dst_mac $dmac action drop
191 $MZ $h1 -Q $vid -c 0 -p 100 -a own -b $dmac -t ip -d 1msec -q &
222 local dmac=de:ad:be:ef:13:37
232 flower dst_mac $dmac action drop
234 $MZ $h1 -Q $vid -c 0 -p 100 -a own -b $dmac -t ip -d 1msec -q &
291 local dmac=de:ad:be:ef:13:37
[all …]
/linux/tools/testing/selftests/net/
H A Dtest_bridge_backup_port.sh247 local dmac=00:11:22:33:44:55
255 … replace dev swp1 egress pref 1 handle 101 proto ip flower src_mac $smac dst_mac $dmac action pass"
258 …r replace dev vx0 egress pref 1 handle 101 proto ip flower src_mac $smac dst_mac $dmac action pass"
260 run_cmd "bridge -n $sw1 fdb replace $dmac dev swp1 master static vlan 10"
265 …run_cmd "ip netns exec $sw1 mausezahn br0.10 -a $smac -b $dmac -A 198.51.100.1 -B 198.51.100.2 -t …
275 …run_cmd "ip netns exec $sw1 mausezahn br0.10 -a $smac -b $dmac -A 198.51.100.1 -B 198.51.100.2 -t …
292 …run_cmd "ip netns exec $sw1 mausezahn br0.10 -a $smac -b $dmac -A 198.51.100.1 -B 198.51.100.2 -t …
302 …run_cmd "ip netns exec $sw1 mausezahn br0.10 -a $smac -b $dmac -A 198.51.100.1 -B 198.51.100.2 -t …
312 …run_cmd "ip netns exec $sw1 mausezahn br0.10 -a $smac -b $dmac -A 198.51.100.1 -B 198.51.100.2 -t …
324 …run_cmd "ip netns exec $sw1 mausezahn br0.10 -a $smac -b $dmac -A 198.51.100.1 -B 198.51.100.2 -t …
[all …]
/linux/drivers/rapidio/devices/
H A Dtsi721_dma.c75 tsi_debug(DMA, &bdma_chan->dchan.dev->device, "DMAC%d", bdma_chan->id); in tsi721_bdma_ch_init()
92 "DMAC%d descriptors @ %p (phys = %pad)", in tsi721_bdma_ch_init()
116 "DMAC%d desc status FIFO @ %p (phys = %pad) size=0x%x", in tsi721_bdma_ch_init()
157 "Unable to get MSI-X for DMAC%d-DONE", in tsi721_bdma_ch_init()
169 "Unable to get MSI-X for DMAC%d-INT", in tsi721_bdma_ch_init()
309 "DMAC%d Attempt to start non-idle channel", in tsi721_start_dma()
316 "DMAC%d Attempt to start DMA with no BDs ready %d", in tsi721_start_dma()
321 tsi_debug(DMA, &bdma_chan->dchan.dev->device, "DMAC%d (wrc=%d) %d", in tsi721_start_dma()
428 tsi_err(ch_dev, "DMAC%d ERR: Attempt to use non-idle channel", in tsi721_submit_sg()
452 tsi_debug(DMA, ch_dev, "DMAC%d BD ring status: rdi=%d wri=%d", in tsi721_submit_sg()
[all …]
/linux/tools/testing/selftests/bpf/prog_tests/
H A Dfib_lookup.c40 #define DMAC "11:11:11:11:11:11" macro
53 __u8 dmac[6]; member
62 .dmac = DMAC_INIT, },
70 .dmac = DMAC_INIT, },
81 .dmac = DMAC_INIT2, },
89 .dmac = DMAC_INIT2, },
165 SYS(fail, "ip neigh add %s dev veth1 lladdr %s nud stale", IPV6_NUD_STALE_ADDR, DMAC); in setup_netns()
169 SYS(fail, "ip neigh add %s dev veth1 lladdr %s nud stale", IPV4_NUD_STALE_ADDR, DMAC); in setup_netns()
355 ret = memcmp(tests[i].dmac, fib_params->dmac, sizeof(tests[i].dmac)); in test_fib_lookup()
356 if (!ASSERT_EQ(ret, 0, "dmac not match")) { in test_fib_lookup()
[all …]
/linux/include/linux/
H A Dsh_dma.h34 * struct sh_dmae_channel - DMAC channel platform data
50 * struct sh_dmae_pdata - DMAC platform data
66 * @no_dmars: DMAC has no DMARS registers
67 * @chclr_present: DMAC has one or several CHCLR registers
69 * @slave_only: DMAC cannot be used for MEMCPY
99 /* Definitions for the SuperH DMAC */
/linux/arch/sh/drivers/dma/
H A Ddmabrg.c20 * from the traditional SH DMAC (although it blocks usage of DMAC 0)
162 /* request DMAC channel 0 before anyone else can get it */ in dmabrg_init()
163 ret = request_dma(0, "DMAC 0 (DMABRG)"); in dmabrg_init()
165 printk(KERN_INFO "DMABRG: DMAC ch0 not reserved!\n"); in dmabrg_init()
170 __raw_writel(0x94000000, DMARSRA); /* enable DMABRG in DMAC 0 */ in dmabrg_init()
172 /* enable DMABRG mode, enable the DMAC */ in dmabrg_init()
H A DKconfig6 bool "SuperH on-chip DMA controller (DMAC) support"
41 DMAC supports. This will be 4 for SH7709/SH7750/SH7750S/SH7751/SH7091,
54 tristate "PowerVR 2 DMAC support"
58 As this chains off of the on-chip DMAC, that must also be
/linux/arch/sh/include/asm/
H A Ddma.h18 * channel configuration. Consult your DMAC documentation and module
28 * DMAC (dma_info) flags
42 * Transfer end interrupt, inherited from DMAC.
62 char dev_id[16]; /* unique name per DMAC of channel */
64 unsigned int chan; /* DMAC channel number */
/linux/drivers/gpu/drm/nouveau/dispnv50/
H A Ddisp.c123 nv50_dmac_destroy(struct nv50_dmac *dmac) in nv50_dmac_destroy() argument
125 nvif_object_dtor(&dmac->vram); in nv50_dmac_destroy()
126 nvif_object_dtor(&dmac->sync); in nv50_dmac_destroy()
128 nv50_chan_destroy(&dmac->base); in nv50_dmac_destroy()
130 nvif_mem_dtor(&dmac->push.mem); in nv50_dmac_destroy()
136 struct nv50_dmac *dmac = container_of(push, typeof(*dmac), push); in nv50_dmac_kick() local
138 dmac->cur = push->cur - (u32 __iomem *)dmac->push.mem.object.map.ptr; in nv50_dmac_kick()
139 if (dmac->put != dmac->cur) { in nv50_dmac_kick()
143 if (dmac->push.mem.type & NVIF_MEM_VRAM) { in nv50_dmac_kick()
144 struct nvif_device *device = dmac->base.device; in nv50_dmac_kick()
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