Lines Matching full:dmac
277 /* M1553 Southbridge DMAC 8237 support routines */
2575 * gains the mutex, ecpp_isr() will have a _reset_ DMAC. Most in ecpp_flush()
2576 * significantly, the DMAC will be reset after ecpp_isr() was in ecpp_flush()
2579 * ecpp_isr() notes a dma_cancelled, it will ignore the DMAC csr in ecpp_flush()
2932 /* prepare DMAC for a transfer */ in ecpp_init_dma_xfer()
3165 ecpp_error(pp->dip, "ecpp_isr: DMAC ERROR bcr=%d\n", bcr); in ecpp_isr()
3540 * shut down the DMAC
3661 * If DMAC fails to shut off, continue anyways and attempt in ecpp_xfer_timeout()
4528 * on Grover, we can`t access DMAC registers while DMA is in flight, in ecp_peripheral2host()
5406 if (ddi_regs_map_setup(pp->dip, 2, (caddr_t *)&pp->uh.ebus.dmac, 0, in pc87332_map_regs()
5409 ecpp_error(pp->dip, "pc87332_map_regs: failed dmac\n"); in pc87332_map_regs()
5656 &pp->uh.ebus.dmac->csr, ~DCSR_INT_EN); in cheerio_mask_intr()
5664 &pp->uh.ebus.dmac->csr, DCSR_INT_EN | DCSR_TCI_DIS); in cheerio_unmask_intr()
5694 AND_SET_LONG_R(pp->uh.ebus.d_handle, &pp->uh.ebus.dmac->csr, in cheerio_dma_stop()
5698 OR_SET_LONG_R(pp->uh.ebus.d_handle, &pp->uh.ebus.dmac->csr, in cheerio_dma_stop()
5755 * Southbridge contains an Intel 8237 DMAC onboard which is used