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/linux/Documentation/devicetree/bindings/dma/
H A Dintel,ldma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/intel,ldma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Lightning Mountain centralized DMA controllers.
10 - chuanhua.lei@intel.com
11 - mallikarjunax.reddy@intel.com
14 - $ref: dma-controller.yaml#
19 - intel,lgm-cdma
20 - intel,lgm-dma2tx
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/linux/drivers/net/ethernet/freescale/dpaa2/
H A Ddpni.h1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright 2013-2016 Freescale Semiconductor Inc.
20 * DPNI_MAX_TC - Maximum number of traffic classes
24 * DPNI_MAX_DPBP - Maximum number of buffer pools per DPNI
29 * DPNI_ALL_TCS - All traffic classes considered; see dpni_set_queue()
31 #define DPNI_ALL_TCS (u8)(-1)
33 * DPNI_ALL_TC_FLOWS - All flows within traffic class considered; see
36 #define DPNI_ALL_TC_FLOWS (u16)(-1)
38 * DPNI_NEW_FLOW_ID - Generate new flow ID; see dpni_set_queue()
40 #define DPNI_NEW_FLOW_ID (u16)(-1)
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H A Ddpni-cmd.h1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright 2013-2016 Freescale Semiconductor Inc.
105 /* Macros for accessing command fields smaller than 1byte */
107 GENMASK(DPNI_##field##_SHIFT + DPNI_##field##_SIZE - 1, \
413 /* dpni_set_rx_tc_dist extension (structure of the DMA-able memory at
682 u8 en; member
/linux/drivers/scsi/arm/
H A Dfas216.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1997-2000 Russell King
95 #define IS_MSGBYTESENT 0x01 /* One byte message sent*/
116 #define CNTL1_PERE (1 << 4) /* Parity enable reporting en. */
123 #define CLKF_F37MHZ 0x00 /* 35.01 - 40 MHz */
125 #define CLKF_F12MHZ 0x03 /* 10.01 - 15 MHz */
126 #define CLKF_F17MHZ 0x04 /* 15.01 - 20 MHz */
127 #define CLKF_F22MHZ 0x05 /* 20.01 - 25 MHz */
128 #define CLKF_F27MHZ 0x06 /* 25.01 - 30 MHz */
129 #define CLKF_F32MHZ 0x07 /* 30.01 - 35 MHz */
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H A Dfas216.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 1997-2003 Russell King
20 * 30-08-1997 RMK Created
21 * 14-09-1997 RMK Started disconnect support
22 * 08-02-1998 RMK Corrected real DMA support
23 * 15-02-1998 RMK Started sync xfer support
24 * 06-04-1998 RMK Tightened conditions for printing incomplete
26 * 02-05-1998 RMK Added extra checks in fas216_reset
27 * 24-05-1998 RMK Fixed synchronous transfers with period >= 200ns
28 * 27-06-1998 RMK Changed asm/delay.h to linux/delay.h
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H A Dacornscsi.c1 // SPDX-License-Identifier: GPL-2.0-only
14 * 26-Sep-1997 RMK Re-jigged to use the queue module.
15 * Re-coded state machine to be based on driver
19 * 05-Oct-1997 RMK Implemented writing to SCSI devices.
20 * 06-Oct-1997 RMK Corrected small (non-serious) bug with the connect/
22 * 12-Oct-1997 RMK Added catch for re-entering interrupt routine.
23 * 15-Oct-1997 RMK Improved handling of commands.
24 * 27-Jun-1998 RMK Changed asm/delay.h to linux/delay.h.
25 * 13-Dec-1998 RMK Better abort code and command handling. Extra state
45 * SCSI-II Tagged queue support.
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/linux/Documentation/iio/
H A Dad7606.rst1 .. SPDX-License-Identifier: GPL-2.0-only
15 * `AD7605 <https://www.analog.com/en/products/ad7605.html>`_
16 * `AD7606 <https://www.analog.com/en/products/ad7606.html>`_
17 * `AD7606B <https://www.analog.com/en/products/ad7606b.html>`_
18 * `AD7616 <https://www.analog.com/en/products/ad7616.html>`_
24 ----------------
30 ------------------
33 .. code-block::
35 +-------------+ +-------------+
36 | BUSY |-------->| TRIGGER |
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/linux/arch/mips/cavium-octeon/
H A Docteon-platform.c6 * Copyright (C) 2004-2017 Cavium, Inc.
19 #include <asm/octeon/cvmx-helper-board.h>
25 #include <asm/octeon/cvmx-uctlx-defs.h>
79 if (dev->of_node) { in octeon2_usb_clocks_start()
83 uctl_node = of_get_parent(dev->of_node); in octeon2_usb_clocks_start()
89 "refclk-frequency", &clock_rate); in octeon2_usb_clocks_start()
91 dev_err(dev, "No UCTL \"refclk-frequency\"\n"); in octeon2_usb_clocks_start()
96 "refclk-type", &clock_type); in octeon2_usb_clocks_start()
106 * Step 2: Enable SCLK of UCTL by writing UCTL0_IF_ENA[EN] = 1 in octeon2_usb_clocks_start()
109 if_ena.s.en = 1; in octeon2_usb_clocks_start()
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/linux/include/uapi/linux/
H A Dhdreg.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
17 #define IDE_DRIVE_TASK_INVALID -1
137 * 0x01->0x02 Reserved
141 * 0x04->0x07 Reserved
146 * 0x09->0x0F Reserved
151 * 0x10->0x1F Reserved
153 #define WIN_READ 0x20 /* 28-Bit */
154 #define WIN_READ_ONCE 0x21 /* 28-Bit without retries */
155 #define WIN_READ_LONG 0x22 /* 28-Bit */
156 #define WIN_READ_LONG_ONCE 0x23 /* 28-Bit without retries */
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H A Dvfio.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
29 * IOMMU enforces DMA cache coherence (ex. PCIe NoSnoop stripping). This
37 /* Two-stage IOMMU */
43 * The No-IOMMU IOMMU offers no translation or isolation for devices and
44 * supports no ioctls outside of VFIO_CHECK_EXTENSION. Use of VFIO's No-IOMMU
53 * Supports the vaddr flag for DMA map and unmap. Not supported for mediated
100 /* -------- IOCTLs for VFIO file descriptor (/dev/vfio/vfio) -------- */
103 * VFIO_GET_API_VERSION - _IO(VFIO_TYPE, VFIO_BASE + 0)
114 * VFIO_CHECK_EXTENSION - _IOW(VFIO_TYPE, VFIO_BASE + 1, __u32)
123 * VFIO_SET_IOMMU - _IOW(VFIO_TYPE, VFIO_BASE + 2, __s32)
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/linux/arch/m68k/include/asm/
H A Damigahw.h2 ** asm-m68k/amigahw.h -- This header defines some macros and pointers for
21 #include <asm/bootinfo-amiga.h>
207 * DMA register bits
244 #define ZTWO_PADDR(x) (((unsigned long)(x))-zTwoBase)
270 amiga_custom.beamcon0 = 0x4390; /* HARDDIS, VAR{BEAM,VSY,HSY,CSY}EN */ in amifb_video_off()
292 unsigned int :28, cntrl1:4; /* control-byte 1 */
293 unsigned int :28, cntrl2:4; /* control-byte 2 */
294 unsigned int :28, cntrl3:4; /* control-byte 3 */
314 unsigned int :28, cntrl1:4; /* control-byte 1 */
315 unsigned int :28, cntrl2:4; /* control-byte 2 */
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/linux/drivers/spi/
H A Dspi-ep93xx.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2010-2011 Mika Westerberg
7 * Explicit FIFO handling code was inspired by amba-pl022 driver.
9 * Chip select support using other than built-in GPIOs by H. Hartley Sweeten.
13 * https://www.cirrus.com/en/pubs/manual/EP93xx_Users_Guide_UM1.pdf
21 #include <linux/dma-direction.h>
22 #include <linux/dma-mapping.h>
69 * struct ep93xx_spi - EP93xx SPI controller structure
73 * @tx: current byte in transfer to transmit
74 * @rx: current byte in transfer to receive
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H A Dspi-cadence-quadspi.c1 // SPDX-License-Identifier: GPL-2.0-only
5 // Copyright Altera Corporation (C) 2012-2014. All rights reserved.
6 // Copyright Intel Corporation (C) 2019-2020. All rights reserved.
7 // Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com
12 #include <linux/dma-mapping.h>
16 #include <linux/firmware/xlnx-zynqmp.h>
30 #include <linux/spi/spi-mem.h>
33 #define CQSPI_NAME "cadence-qspi"
324 if (ret != -ETIMEDOUT) in cqspi_wait_for_bit()
327 timeout_us -= CQSPI_BUSYWAIT_TIMEOUT_US; in cqspi_wait_for_bit()
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/linux/drivers/ata/
H A Dpata_octeon_cf.c8 * Copyright (C) 2005 - 2012 Cavium Inc.
31 * -- 8 bits no irq, no DMA
32 * -- 16 bits no irq, no DMA
33 * -- 16 bits True IDE mode with DMA, but no irq.
35 * In the last case the DMA engine can generate an interrupt when the
69 "Enable use of DMA on interfaces that support it (0=no dma [default], 1=use dma)");
112 reg_cfg.s.en = 1; /* Enable this region */ in octeon_cf_set_boot_reg_cfg()
128 struct octeon_cf_port *cf_port = ap->private_data; in octeon_cf_set_piomode()
150 BUG_ON(ata_timing_compute(dev, dev->pio_mode, &timing, T, T)); in octeon_cf_set_piomode()
154 t2--; in octeon_cf_set_piomode()
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H A Dpata_it821x.c2 * pata_it821x.c - IT821x PATA for new ATA layer
19 * http://www.ite.com.tw/EN/products_more.aspx?CategoryID=3&ID=5,91
25 * as an IDE controller. Smart mode only understands DMA read/write and
30 * o Rev 0x10 also requires master/slave hold the same DMA timings and
41 * - In pass through mode we do all the work you would expect
42 * - In smart mode the clocking set up is done by the controller generally
44 * - There are a few extra vendor commands that actually talk to the
55 * is a raid volume. Even more cute - the controller can do automated
63 * matters in smart mode. ATAPI DMA is not currently supported.
68 * - ATAPI and other speed filtering
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/linux/sound/soc/fsl/
H A Dfsl_ssi.c1 // SPDX-License-Identifier: GPL-2.0
7 // Copyright 2007-2010 Freescale Semiconductor, Inc.
9 // Some notes why imx-pcm-fiq is used instead of DMA on some boards:
16 // we receive in our (PCM-) data stream. The only chance we have is to
43 #include <linux/dma/imx-dma.h>
53 #include "imx-pcm.h"
55 /* Define RX and TX to index ssi->regvals array; Can be 0 or 1 only */
62 * The SSI has a limitation in that the samples must be in the same byte
66 * (bit-endianness must match byte-endianness). Processors typically write
67 * the bits within a byte in the same order that the bytes of a word are
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/linux/drivers/memstick/host/
H A Dr592.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2010 - Maxim Levitsky
44 * memstick_debug_get_tpc_name - debug helper that returns string for
49 return tpc_names[tpc-1]; in memstick_debug_get_tpc_name()
55 u32 value = readl(dev->mmio + address); in r592_read_reg()
64 dbg_reg("reg #%02d <- 0x%08x", address, value); in r592_write_reg()
65 writel(value, dev->mmio + address); in r592_write_reg()
71 u32 value = __raw_readl(dev->mmio + address); in r592_read_reg_raw_be()
80 dbg_reg("reg #%02d <- 0x%08x", address, value); in r592_write_reg_raw_be()
81 __raw_writel(cpu_to_be32(value), dev->mmio + address); in r592_write_reg_raw_be()
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/linux/drivers/dma/stm32/
H A Dstm32-dma3.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/dma-mapping.h>
24 #include "../virt-dma.h"
53 /* SECCFGR DMA secure configuration register */
56 /* MISR DMA non-secure/secure masked interrupt status register */
59 /* CxLBAR DMA channel x linked_list base address register */
62 /* CxCIDCFGR DMA channel x CID register */
76 /* CxSEMCR DMA channel x semaphore control register */
80 /* CxFCR DMA channel x flag clear register */
88 /* CxSR DMA channel x status register */
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/linux/arch/mips/ath25/
H A Dar2315_regs.h11 * Copyright (C) 2006-2008 Felix Fietkau <nbd@openwrt.org>
81 #define AR2315_RESET_MPEGTS_RSVD 0x00000004 /* warm reset MPEG-TS */
82 #define AR2315_RESET_PCIDMA 0x00000008 /* warm reset PCI ahb/dma */
97 #define AR2315_ARB_MPEGTS_RSVD 0x00000004 /* MPEG-TS */
106 #define AR2315_CONFIG_AHB 0x00000001 /* EC-AHB bridge endian */
108 #define AR2315_CONFIG_MPEGTS_RSVD 0x00000004 /* MPEG-TS byteswap */
128 /* Revision Register - Initial value is 0x3010 (WMAC 3.0, AR231X 1.0). */
172 #define AR2315_GISR_MPEGTS_RSVD 0x00000004 /* MPEG-TS */
303 * - No read or write buffers are included.
323 #define AR2315_LBCONF_OE 0x00000001 /* =1 OE is low-true */
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/linux/drivers/video/fbdev/
H A Dsh7760fb.c1 // SPDX-License-Identifier: GPL-2.0
5 * (c) 2006-2008 MSC Vertriebsges.m.b.H.,
11 * Thanks to Siegfried Schaefer <s.schaefer at schaefer-edv.de>
19 #include <linux/dma-mapping.h>
56 /* wait_for_lps - wait until power supply has reached a certain state. */
60 while (--i && ((ioread16(par->base + LDPMMR) & 3) != val)) in wait_for_lps()
64 return -ETIMEDOUT; in wait_for_lps()
69 /* en/disable the LCDC */
72 struct sh7760fb_par *par = info->par; in sh7760fb_blank()
73 struct sh7760fb_platdata *pd = par->pd; in sh7760fb_blank()
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/linux/drivers/net/ethernet/intel/idpf/
H A Didpf_txrx.h1 /* SPDX-License-Identifier: GPL-2.0-only */
88 #define IDPF_RX_BUFQ_WORKING_SET(rxq) ((rxq)->desc_count - 1)
92 if (unlikely(++(ntc) == (rxq)->desc_count)) { \
100 if (unlikely(++(idx) == (q)->desc_count)) \
122 ((((txq)->next_to_clean > (txq)->next_to_use) ? 0 : (txq)->desc_count) + \
123 (txq)->next_to_clean - (txq)->next_to_use - 1)
125 #define IDPF_TX_COMPLQ_OVERFLOW_THRESH(txcq) ((txcq)->desc_count >> 1)
130 (((txq)->num_completions_pending >= (txq)->complq->num_completions ? \
132 (txq)->num_completions_pending - (txq)->complq->num_completions)
154 * struct idpf_tx_offload_params - Offload parameters for a given packet
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/linux/drivers/infiniband/hw/vmw_pvrdma/
H A Dpvrdma_dev_api.h2 * Copyright (c) 2012-2016 VMware, Inc. All rights reserved.
7 * 2-Clause License. This program is distributed in the hope that it
11 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html.
17 * The BSD 2-Clause License
23 * - Redistributions of source code must retain the above
27 * - Redistributions in binary form must reproduce the above
68 * Masks and accessors for page directory, which is a two-level lookup:
69 * page directory -> page table -> page. Only one directory for now, but we
83 * Max MSI-X vectors.
101 #define PVRDMA_CQ_FLAG_ARMED_SOL BIT(0) /* Armed for solicited-only. */
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/linux/drivers/usb/serial/
H A Dark3116.c1 // SPDX-License-Identifier: GPL-2.0+
9 * - implements a driver for the arkmicro ark3116 chipset (vendor=0x6547,
10 * productid=0x0232) (used in a datacable called KQ-U8A)
52 struct usb_device *dev = serial->dev; in is_irda()
53 if (le16_to_cpu(dev->descriptor.idVendor) == 0x18ec && in is_irda()
54 le16_to_cpu(dev->descriptor.idProduct) == 0x3118) in is_irda()
82 result = usb_control_msg(serial->dev, in ark3116_write_reg()
83 usb_sndctrlpipe(serial->dev, 0), in ark3116_write_reg()
97 result = usb_control_msg(serial->dev, in ark3116_read_reg()
98 usb_rcvctrlpipe(serial->dev, 0), in ark3116_read_reg()
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/linux/Documentation/translations/it_IT/process/
H A Ddeprecated.rst1 .. SPDX-License-Identifier: GPL-2.0
3 .. include:: ../disclaimer-ita.rst
26 ------------
38 ----------------
50 <https://lore.kernel.org/lkml/CA+55aFy6jNLsywVYdGp83AMrXBo_P-pkjkphPGrO=82SPKCpLQ@mail.gmail.com/>`…
52 <https://lore.kernel.org/lkml/CAHk-=whDHsbK3HTOpTF=ue_o04onRwTEaK_ZoJp_fjbqq4+=Jw@mail.gmail.com/>`_
65 ----------------------------------------------------
87 le funzioni del tipo *saturate-on-overflow*::
89 bar = dma_alloc_coherent(dev, array_size(count, size), &dma, GFP_KERNEL);
94 header = kzalloc(sizeof(*header) + count * sizeof(*header->item),
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/linux/Documentation/hid/
H A Dintel-ish-hid.rst6 processing to a dedicated low power co-processor. This allows the core
11 Sensor usage tables. These may be found in tablets, 2-in-1 convertible laptops
27 ----------------- ----------------------
28 | USB HID | --> | ISH HID |
29 ----------------- ----------------------
30 ----------------- ----------------------
31 | USB protocol | --> | ISH Transport |
32 ----------------- ----------------------
33 ----------------- ----------------------
34 | EHCI/XHCI | --> | ISH IPC |
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