Lines Matching +full:dma +full:- +full:byte +full:- +full:en
1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
19 #include <linux/dma/mxs-dma.h>
20 #include "gpmi-nand.h"
21 #include "gpmi-regs.h"
22 #include "bch-regs.h"
25 #define GPMI_NAND_GPMI_REGS_ADDR_RES_NAME "gpmi-nand"
53 while ((readl(addr) & mask) && --timeout) in clear_poll_bit()
72 * You will see a DMA timeout in this case. The bug has been fixed
97 while ((!(readl(reset_addr) & MODULE_CLKGATE)) && --timeout) in gpmi_reset_block()
117 return -ETIMEDOUT; in gpmi_reset_block()
127 clk = this->resources.clock[i]; in __gpmi_enable_clk()
142 for (; i > 0; i--) in __gpmi_enable_clk()
143 clk_disable_unprepare(this->resources.clock[i - 1]); in __gpmi_enable_clk()
149 struct resources *r = &this->resources; in gpmi_init()
152 ret = pm_runtime_resume_and_get(this->dev); in gpmi_init()
156 ret = gpmi_reset_block(r->gpmi_regs, false); in gpmi_init()
164 ret = gpmi_reset_block(r->bch_regs, GPMI_IS_MXS(this)); in gpmi_init()
169 writel(BM_GPMI_CTRL1_GPMI_MODE, r->gpmi_regs + HW_GPMI_CTRL1_CLR); in gpmi_init()
173 r->gpmi_regs + HW_GPMI_CTRL1_SET); in gpmi_init()
175 /* Disable Write-Protection. */ in gpmi_init()
176 writel(BM_GPMI_CTRL1_DEV_RESET, r->gpmi_regs + HW_GPMI_CTRL1_SET); in gpmi_init()
179 writel(BM_GPMI_CTRL1_BCH_MODE, r->gpmi_regs + HW_GPMI_CTRL1_SET); in gpmi_init()
182 * Decouple the chip select from dma channel. We use dma0 for all in gpmi_init()
187 r->gpmi_regs + HW_GPMI_CTRL1_SET); in gpmi_init()
190 pm_runtime_mark_last_busy(this->dev); in gpmi_init()
191 pm_runtime_put_autosuspend(this->dev); in gpmi_init()
198 struct resources *r = &this->resources; in gpmi_dump_info()
199 struct bch_geometry *geo = &this->bch_geometry; in gpmi_dump_info()
203 dev_err(this->dev, "Show GPMI registers :\n"); in gpmi_dump_info()
205 reg = readl(r->gpmi_regs + i * 0x10); in gpmi_dump_info()
206 dev_err(this->dev, "offset 0x%.3x : 0x%.8x\n", i * 0x10, reg); in gpmi_dump_info()
210 dev_err(this->dev, "Show BCH registers :\n"); in gpmi_dump_info()
212 reg = readl(r->bch_regs + i * 0x10); in gpmi_dump_info()
213 dev_err(this->dev, "offset 0x%.3x : 0x%.8x\n", i * 0x10, reg); in gpmi_dump_info()
215 dev_err(this->dev, "BCH Geometry :\n" in gpmi_dump_info()
226 "Block Mark Byte Offset : %u\n" in gpmi_dump_info()
228 geo->gf_len, in gpmi_dump_info()
229 geo->ecc_strength, in gpmi_dump_info()
230 geo->page_size, in gpmi_dump_info()
231 geo->metadata_size, in gpmi_dump_info()
232 geo->ecc0_chunk_size, in gpmi_dump_info()
233 geo->eccn_chunk_size, in gpmi_dump_info()
234 geo->ecc_chunk_count, in gpmi_dump_info()
235 geo->payload_size, in gpmi_dump_info()
236 geo->auxiliary_size, in gpmi_dump_info()
237 geo->auxiliary_status_offset, in gpmi_dump_info()
238 geo->block_mark_byte_offset, in gpmi_dump_info()
239 geo->block_mark_bit_offset); in gpmi_dump_info()
244 struct nand_chip *chip = &this->nand; in gpmi_check_ecc()
245 struct bch_geometry *geo = &this->bch_geometry; in gpmi_check_ecc()
246 struct nand_device *nand = &chip->base; in gpmi_check_ecc()
247 struct nand_ecc_props *conf = &nand->ecc.ctx.conf; in gpmi_check_ecc()
249 conf->step_size = geo->eccn_chunk_size; in gpmi_check_ecc()
250 conf->strength = geo->ecc_strength; in gpmi_check_ecc()
255 if (geo->gf_len == 14) in gpmi_check_ecc()
259 if (geo->ecc_strength > this->devdata->bch_max_ecc_strength) in gpmi_check_ecc()
272 struct bch_geometry *geo = &this->bch_geometry; in bbm_in_data_chunk()
273 struct nand_chip *chip = &this->nand; in bbm_in_data_chunk()
277 if (geo->ecc0_chunk_size != geo->eccn_chunk_size) { in bbm_in_data_chunk()
278 dev_err(this->dev, in bbm_in_data_chunk()
283 i = (mtd->writesize * 8 - geo->metadata_size * 8) / in bbm_in_data_chunk()
284 (geo->gf_len * geo->ecc_strength + in bbm_in_data_chunk()
285 geo->eccn_chunk_size * 8); in bbm_in_data_chunk()
287 j = (mtd->writesize * 8 - geo->metadata_size * 8) - in bbm_in_data_chunk()
288 (geo->gf_len * geo->ecc_strength + in bbm_in_data_chunk()
289 geo->eccn_chunk_size * 8) * i; in bbm_in_data_chunk()
291 if (j < geo->eccn_chunk_size * 8) { in bbm_in_data_chunk()
293 dev_dbg(this->dev, "Set ecc to %d and bbm in chunk %d\n", in bbm_in_data_chunk()
294 geo->ecc_strength, *chunk_num); in bbm_in_data_chunk()
311 struct bch_geometry *geo = &this->bch_geometry; in set_geometry_by_ecc_info()
312 struct nand_chip *chip = &this->nand; in set_geometry_by_ecc_info()
318 geo->gf_len = 13; in set_geometry_by_ecc_info()
321 geo->gf_len = 14; in set_geometry_by_ecc_info()
324 dev_err(this->dev, in set_geometry_by_ecc_info()
326 nanddev_get_ecc_requirements(&chip->base)->strength, in set_geometry_by_ecc_info()
327 nanddev_get_ecc_requirements(&chip->base)->step_size); in set_geometry_by_ecc_info()
328 return -EINVAL; in set_geometry_by_ecc_info()
330 geo->ecc0_chunk_size = ecc_step; in set_geometry_by_ecc_info()
331 geo->eccn_chunk_size = ecc_step; in set_geometry_by_ecc_info()
332 geo->ecc_strength = round_up(ecc_strength, 2); in set_geometry_by_ecc_info()
334 return -EINVAL; in set_geometry_by_ecc_info()
337 if (geo->eccn_chunk_size < mtd->oobsize) { in set_geometry_by_ecc_info()
338 dev_err(this->dev, in set_geometry_by_ecc_info()
340 ecc_step, mtd->oobsize); in set_geometry_by_ecc_info()
341 return -EINVAL; in set_geometry_by_ecc_info()
345 geo->metadata_size = 10; in set_geometry_by_ecc_info()
347 geo->ecc_chunk_count = mtd->writesize / geo->eccn_chunk_size; in set_geometry_by_ecc_info()
350 * Now, the NAND chip with 2K page(data chunk is 512byte) shows below: in set_geometry_by_ecc_info()
353 * |<----------------------------------------------------->| in set_geometry_by_ecc_info()
357 * |<-------------------------------------------->| D | | O' | in set_geometry_by_ecc_info()
358 * | |<---->| |<--->| in set_geometry_by_ecc_info()
360 * +---+----------+-+----------+-+----------+-+----------+-+-----+ in set_geometry_by_ecc_info()
362 * +---+----------+-+----------+-+----------+-+----------+-+-----+ in set_geometry_by_ecc_info()
365 * |<------------>| in set_geometry_by_ecc_info()
381 * P = ------------ + P' + M in set_geometry_by_ecc_info()
384 * The position of block mark moves forward in the ECC-based view in set_geometry_by_ecc_info()
387 * E * G * (N - 1) in set_geometry_by_ecc_info()
388 * D = (---------------- + M) in set_geometry_by_ecc_info()
393 * So the bit position of the physical block mark within the ECC-based in set_geometry_by_ecc_info()
395 * (P' - D) * 8 in set_geometry_by_ecc_info()
397 geo->page_size = mtd->writesize + geo->metadata_size + in set_geometry_by_ecc_info()
398 (geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) / 8; in set_geometry_by_ecc_info()
400 geo->payload_size = mtd->writesize; in set_geometry_by_ecc_info()
402 geo->auxiliary_status_offset = ALIGN(geo->metadata_size, 4); in set_geometry_by_ecc_info()
403 geo->auxiliary_size = ALIGN(geo->metadata_size, 4) in set_geometry_by_ecc_info()
404 + ALIGN(geo->ecc_chunk_count, 4); in set_geometry_by_ecc_info()
406 if (!this->swap_block_mark) in set_geometry_by_ecc_info()
410 block_mark_bit_offset = mtd->writesize * 8 - in set_geometry_by_ecc_info()
411 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1) in set_geometry_by_ecc_info()
412 + geo->metadata_size * 8); in set_geometry_by_ecc_info()
414 geo->block_mark_byte_offset = block_mark_bit_offset / 8; in set_geometry_by_ecc_info()
415 geo->block_mark_bit_offset = block_mark_bit_offset % 8; in set_geometry_by_ecc_info()
429 * ------------ <= (O - M)
433 * (O - M) * 8
434 * E <= -------------
439 struct bch_geometry *geo = &this->bch_geometry; in get_ecc_strength()
440 struct mtd_info *mtd = nand_to_mtd(&this->nand); in get_ecc_strength()
443 ecc_strength = ((mtd->oobsize - geo->metadata_size) * 8) in get_ecc_strength()
444 / (geo->gf_len * geo->ecc_chunk_count); in get_ecc_strength()
452 struct bch_geometry *geo = &this->bch_geometry; in set_geometry_for_large_oob()
453 struct nand_chip *chip = &this->nand; in set_geometry_for_large_oob()
456 nanddev_get_ecc_requirements(&chip->base); in set_geometry_for_large_oob()
463 if (!(requirements->strength > 0 && in set_geometry_for_large_oob()
464 requirements->step_size > 0)) in set_geometry_for_large_oob()
465 return -EINVAL; in set_geometry_for_large_oob()
466 geo->ecc_strength = requirements->strength; in set_geometry_for_large_oob()
470 dev_err(this->dev, in set_geometry_for_large_oob()
472 geo->ecc_strength); in set_geometry_for_large_oob()
473 return -EINVAL; in set_geometry_for_large_oob()
477 geo->metadata_size = 10; in set_geometry_for_large_oob()
478 geo->gf_len = 14; in set_geometry_for_large_oob()
479 geo->ecc0_chunk_size = 1024; in set_geometry_for_large_oob()
480 geo->eccn_chunk_size = 1024; in set_geometry_for_large_oob()
481 geo->ecc_chunk_count = mtd->writesize / geo->eccn_chunk_size; in set_geometry_for_large_oob()
483 this->devdata->bch_max_ecc_strength); in set_geometry_for_large_oob()
489 geo->ecc_strength = max_ecc; in set_geometry_for_large_oob()
490 while (!(geo->ecc_strength < requirements->strength)) { in set_geometry_for_large_oob()
493 geo->ecc_strength -= 2; in set_geometry_for_large_oob()
498 geo->ecc_strength = requirements->strength; in set_geometry_for_large_oob()
500 geo->ecc0_chunk_size = 0; in set_geometry_for_large_oob()
501 geo->ecc_chunk_count = (mtd->writesize / geo->eccn_chunk_size) + 1; in set_geometry_for_large_oob()
502 geo->ecc_for_meta = 1; in set_geometry_for_large_oob()
504 if (mtd->oobsize * 8 < geo->metadata_size * 8 + in set_geometry_for_large_oob()
505 geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) { in set_geometry_for_large_oob()
506 dev_err(this->dev, "unsupported NAND chip with new layout\n"); in set_geometry_for_large_oob()
507 return -EINVAL; in set_geometry_for_large_oob()
511 bbm_chunk = (mtd->writesize * 8 - geo->metadata_size * 8 - in set_geometry_for_large_oob()
512 geo->gf_len * geo->ecc_strength) / in set_geometry_for_large_oob()
513 (geo->gf_len * geo->ecc_strength + in set_geometry_for_large_oob()
514 geo->eccn_chunk_size * 8) + 1; in set_geometry_for_large_oob()
518 geo->page_size = mtd->writesize + geo->metadata_size + in set_geometry_for_large_oob()
519 (geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) / 8; in set_geometry_for_large_oob()
520 geo->payload_size = mtd->writesize; in set_geometry_for_large_oob()
524 * metadata is padded to the nearest 32-bit boundary. The ECC status in set_geometry_for_large_oob()
525 * contains one byte for every ECC chunk, and is also padded to the in set_geometry_for_large_oob()
526 * nearest 32-bit boundary. in set_geometry_for_large_oob()
528 geo->auxiliary_status_offset = ALIGN(geo->metadata_size, 4); in set_geometry_for_large_oob()
529 geo->auxiliary_size = ALIGN(geo->metadata_size, 4) in set_geometry_for_large_oob()
530 + ALIGN(geo->ecc_chunk_count, 4); in set_geometry_for_large_oob()
532 if (!this->swap_block_mark) in set_geometry_for_large_oob()
536 i = (mtd->writesize / geo->eccn_chunk_size) - bbm_chunk + 1; in set_geometry_for_large_oob()
538 block_mark_bit_offset = mtd->writesize * 8 - in set_geometry_for_large_oob()
539 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - i) in set_geometry_for_large_oob()
540 + geo->metadata_size * 8); in set_geometry_for_large_oob()
542 geo->block_mark_byte_offset = block_mark_bit_offset / 8; in set_geometry_for_large_oob()
543 geo->block_mark_bit_offset = block_mark_bit_offset % 8; in set_geometry_for_large_oob()
545 dev_dbg(this->dev, "BCH Geometry :\n" in set_geometry_for_large_oob()
556 "Block Mark Byte Offset : %u\n" in set_geometry_for_large_oob()
560 geo->gf_len, in set_geometry_for_large_oob()
561 geo->ecc_strength, in set_geometry_for_large_oob()
562 geo->page_size, in set_geometry_for_large_oob()
563 geo->metadata_size, in set_geometry_for_large_oob()
564 geo->ecc0_chunk_size, in set_geometry_for_large_oob()
565 geo->eccn_chunk_size, in set_geometry_for_large_oob()
566 geo->ecc_chunk_count, in set_geometry_for_large_oob()
567 geo->payload_size, in set_geometry_for_large_oob()
568 geo->auxiliary_size, in set_geometry_for_large_oob()
569 geo->auxiliary_status_offset, in set_geometry_for_large_oob()
570 geo->block_mark_byte_offset, in set_geometry_for_large_oob()
571 geo->block_mark_bit_offset, in set_geometry_for_large_oob()
573 geo->ecc_for_meta); in set_geometry_for_large_oob()
580 struct bch_geometry *geo = &this->bch_geometry; in legacy_set_geometry()
581 struct mtd_info *mtd = nand_to_mtd(&this->nand); in legacy_set_geometry()
591 geo->metadata_size = 10; in legacy_set_geometry()
594 geo->gf_len = 13; in legacy_set_geometry()
597 geo->ecc0_chunk_size = 512; in legacy_set_geometry()
598 geo->eccn_chunk_size = 512; in legacy_set_geometry()
599 while (geo->eccn_chunk_size < mtd->oobsize) { in legacy_set_geometry()
600 geo->ecc0_chunk_size *= 2; /* keep C >= O */ in legacy_set_geometry()
601 geo->eccn_chunk_size *= 2; /* keep C >= O */ in legacy_set_geometry()
602 geo->gf_len = 14; in legacy_set_geometry()
605 geo->ecc_chunk_count = mtd->writesize / geo->eccn_chunk_size; in legacy_set_geometry()
608 geo->ecc_strength = get_ecc_strength(this); in legacy_set_geometry()
610 dev_err(this->dev, in legacy_set_geometry()
613 geo->ecc_strength, in legacy_set_geometry()
614 this->devdata->bch_max_ecc_strength); in legacy_set_geometry()
615 return -EINVAL; in legacy_set_geometry()
618 geo->page_size = mtd->writesize + geo->metadata_size + in legacy_set_geometry()
619 (geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) / 8; in legacy_set_geometry()
620 geo->payload_size = mtd->writesize; in legacy_set_geometry()
624 * metadata is padded to the nearest 32-bit boundary. The ECC status in legacy_set_geometry()
625 * contains one byte for every ECC chunk, and is also padded to the in legacy_set_geometry()
626 * nearest 32-bit boundary. in legacy_set_geometry()
628 metadata_size = ALIGN(geo->metadata_size, 4); in legacy_set_geometry()
629 status_size = ALIGN(geo->ecc_chunk_count, 4); in legacy_set_geometry()
631 geo->auxiliary_size = metadata_size + status_size; in legacy_set_geometry()
632 geo->auxiliary_status_offset = metadata_size; in legacy_set_geometry()
634 if (!this->swap_block_mark) in legacy_set_geometry()
638 * We need to compute the byte and bit offsets of in legacy_set_geometry()
639 * the physical block mark within the ECC-based view of the page. in legacy_set_geometry()
645 * |<---->| in legacy_set_geometry()
647 * +---+----------+-+----------+-+----------+-+----------+-+ in legacy_set_geometry()
649 * +---+----------+-+----------+-+----------+-+----------+-+ in legacy_set_geometry()
651 * The position of block mark moves forward in the ECC-based view in legacy_set_geometry()
654 * E * G * (N - 1) in legacy_set_geometry()
655 * D = (---------------- + M) in legacy_set_geometry()
663 * E * G (O - M) C - M C - M in legacy_set_geometry()
664 * ----------- <= ------- <= -------- < --------- in legacy_set_geometry()
665 * 8 N N (N - 1) in legacy_set_geometry()
669 * E * G * (N - 1) in legacy_set_geometry()
670 * D = (---------------- + M) < C in legacy_set_geometry()
674 * within the ECC-based view of the page is still in the data chunk, in legacy_set_geometry()
678 * physical block mark within the ECC-based view of the page: in legacy_set_geometry()
679 * (page_size - D) * 8 in legacy_set_geometry()
681 * --Huang Shijie in legacy_set_geometry()
683 block_mark_bit_offset = mtd->writesize * 8 - in legacy_set_geometry()
684 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1) in legacy_set_geometry()
685 + geo->metadata_size * 8); in legacy_set_geometry()
687 geo->block_mark_byte_offset = block_mark_bit_offset / 8; in legacy_set_geometry()
688 geo->block_mark_bit_offset = block_mark_bit_offset % 8; in legacy_set_geometry()
694 struct nand_chip *chip = &this->nand; in common_nfc_set_geometry()
695 struct mtd_info *mtd = nand_to_mtd(&this->nand); in common_nfc_set_geometry()
697 nanddev_get_ecc_requirements(&chip->base); in common_nfc_set_geometry()
701 use_minimun_ecc = of_property_read_bool(this->dev->of_node, in common_nfc_set_geometry()
702 "fsl,use-minimum-ecc"); in common_nfc_set_geometry()
705 if ((!use_minimun_ecc && mtd->oobsize < 1024) || in common_nfc_set_geometry()
706 !(requirements->strength > 0 && requirements->step_size > 0)) { in common_nfc_set_geometry()
707 dev_dbg(this->dev, "use legacy bch geometry\n"); in common_nfc_set_geometry()
714 if (mtd->oobsize > 1024) { in common_nfc_set_geometry()
715 dev_dbg(this->dev, "use large oob bch geometry\n"); in common_nfc_set_geometry()
722 dev_dbg(this->dev, "use minimum ecc bch geometry\n"); in common_nfc_set_geometry()
723 err = set_geometry_by_ecc_info(this, requirements->strength, in common_nfc_set_geometry()
724 requirements->step_size); in common_nfc_set_geometry()
726 dev_err(this->dev, "none of the bch geometry setting works\n"); in common_nfc_set_geometry()
734 struct resources *r = &this->resources; in bch_set_geometry()
741 ret = pm_runtime_resume_and_get(this->dev); in bch_set_geometry()
751 ret = gpmi_reset_block(r->bch_regs, GPMI_IS_MXS(this)); in bch_set_geometry()
756 writel(0, r->bch_regs + HW_BCH_LAYOUTSELECT); in bch_set_geometry()
760 pm_runtime_mark_last_busy(this->dev); in bch_set_geometry()
761 pm_runtime_put_autosuspend(this->dev); in bch_set_geometry()
767 * <1> Firstly, we should know what's the GPMI-clock means.
768 * The GPMI-clock is the internal clock in the gpmi nand controller.
769 * If you set 100MHz to gpmi nand controller, the GPMI-clock's period
770 * is 10ns. Mark the GPMI-clock's period as GPMI-clock-period.
773 * The frequency on the nand chip pins is derived from the GPMI-clock.
792 * |<---tREA---->|
795 * |<--tRP-->| |
800 * /---------\
801 * Read Data --------------< >---------
802 * \---------/
804 * |<-D->|
814 * Delay = (tREA + C - tRP) {1}
819 * tRP = (GPMI-clock-period) * DATA_SETUP
825 * if (GPMI-clock-period > DLL_THRETHOLD)
826 * RP = GPMI-clock-period / 2;
828 * RP = GPMI-clock-period;
830 * Set the HW_GPMI_CTRL1:HALF_PERIOD if GPMI-clock-period
836 * (tREA + 4000 - tRP) * 8
837 * RDN_DELAY = ----------------------- {3}
843 struct gpmi_nfc_hardware_timing *hw = &this->hw; in gpmi_nfc_compute_timings()
844 struct resources *r = &this->resources; in gpmi_nfc_compute_timings()
845 unsigned int dll_threshold_ps = this->devdata->max_chain_delay; in gpmi_nfc_compute_timings()
856 if (sdr->tRC_min >= 30000) { in gpmi_nfc_compute_timings()
857 /* ONFI non-EDO modes [0-3] */ in gpmi_nfc_compute_timings()
858 hw->clk_rate = 22000000; in gpmi_nfc_compute_timings()
861 } else if (sdr->tRC_min >= 25000) { in gpmi_nfc_compute_timings()
863 hw->clk_rate = 80000000; in gpmi_nfc_compute_timings()
868 hw->clk_rate = 100000000; in gpmi_nfc_compute_timings()
873 clk_rate = clk_round_rate(r->clock[0], hw->clk_rate); in gpmi_nfc_compute_timings()
875 dev_err(this->dev, "clock setting: expected %ld, got %ld\n", in gpmi_nfc_compute_timings()
876 hw->clk_rate, clk_rate); in gpmi_nfc_compute_timings()
877 return -ENOTSUPP; in gpmi_nfc_compute_timings()
880 hw->clk_rate = clk_rate; in gpmi_nfc_compute_timings()
882 period_ps = div_u64((u64)NSEC_PER_SEC * 1000, hw->clk_rate); in gpmi_nfc_compute_timings()
884 addr_setup_cycles = TO_CYCLES(sdr->tALS_min, period_ps); in gpmi_nfc_compute_timings()
885 data_setup_cycles = TO_CYCLES(sdr->tDS_min, period_ps); in gpmi_nfc_compute_timings()
886 data_hold_cycles = TO_CYCLES(sdr->tDH_min, period_ps); in gpmi_nfc_compute_timings()
887 busy_timeout_ps = max(sdr->tBERS_max, sdr->tPROG_max); in gpmi_nfc_compute_timings()
890 hw->timing0 = BF_GPMI_TIMING0_ADDRESS_SETUP(addr_setup_cycles) | in gpmi_nfc_compute_timings()
893 hw->timing1 = BF_GPMI_TIMING1_BUSY_TIMEOUT(DIV_ROUND_UP(busy_timeout_cycles, 4096)); in gpmi_nfc_compute_timings()
898 * (tREA + 4000 - tRP) * 8 in gpmi_nfc_compute_timings()
899 * RDN_DELAY = ----------------------- in gpmi_nfc_compute_timings()
911 sample_delay_ps = (sdr->tREA_max + 4000 - tRP_ps) * 8; in gpmi_nfc_compute_timings()
917 hw->ctrl1n = BF_GPMI_CTRL1_WRN_DLY_SEL(wrn_dly_sel); in gpmi_nfc_compute_timings()
919 hw->ctrl1n |= BF_GPMI_CTRL1_RDN_DELAY(sample_delay_factor) | in gpmi_nfc_compute_timings()
927 struct gpmi_nfc_hardware_timing *hw = &this->hw; in gpmi_nfc_apply_timings()
928 struct resources *r = &this->resources; in gpmi_nfc_apply_timings()
929 void __iomem *gpmi_regs = r->gpmi_regs; in gpmi_nfc_apply_timings()
938 clk_disable_unprepare(r->clock[0]); in gpmi_nfc_apply_timings()
940 ret = clk_set_rate(r->clock[0], hw->clk_rate); in gpmi_nfc_apply_timings()
942 dev_err(this->dev, "cannot set clock rate to %lu Hz: %d\n", hw->clk_rate, ret); in gpmi_nfc_apply_timings()
947 ret = clk_prepare_enable(r->clock[0]); in gpmi_nfc_apply_timings()
952 writel(hw->timing0, gpmi_regs + HW_GPMI_TIMING0); in gpmi_nfc_apply_timings()
953 writel(hw->timing1, gpmi_regs + HW_GPMI_TIMING1); in gpmi_nfc_apply_timings()
960 writel(hw->ctrl1n, gpmi_regs + HW_GPMI_CTRL1_SET); in gpmi_nfc_apply_timings()
963 dll_wait_time_us = USEC_PER_SEC / hw->clk_rate * 64; in gpmi_nfc_apply_timings()
986 if (sdr->tRC_min <= 25000 && !this->devdata->support_edo_timing) in gpmi_setup_interface()
987 return -ENOTSUPP; in gpmi_setup_interface()
998 this->hw.must_apply_timings = true; in gpmi_setup_interface()
1006 struct resources *r = &this->resources; in gpmi_clear_bch()
1007 writel(BM_BCH_CTRL_COMPLETE_IRQ, r->bch_regs + HW_BCH_CTRL_CLR); in gpmi_clear_bch()
1012 /* We use the DMA channel 0 to access all the nand chips. */ in get_dma_chan()
1013 return this->dma_chans[0]; in get_dma_chan()
1016 /* This will be called after the DMA operation is finished. */
1020 struct completion *dma_c = &this->dma_done; in dma_irq_callback()
1030 complete(&this->bch_done); in bch_irq()
1040 if (this->bch) in gpmi_raw_len_to_len()
1041 return ALIGN_DOWN(raw_len, this->bch_geometry.eccn_chunk_size); in gpmi_raw_len_to_len()
1046 /* Can we use the upper's buffer directly for DMA? */
1057 ret = dma_map_sg(this->dev, sgl, 1, dr); in prepare_data_dma()
1065 /* We have to use our own DMA buffer. */ in prepare_data_dma()
1066 sg_init_one(sgl, this->data_buffer_dma, len); in prepare_data_dma()
1068 if (dr == DMA_TO_DEVICE && buf != this->data_buffer_dma) in prepare_data_dma()
1069 memcpy(this->data_buffer_dma, buf, len); in prepare_data_dma()
1071 dma_map_sg(this->dev, sgl, 1, dr); in prepare_data_dma()
1094 struct bch_geometry *geo = &this->bch_geometry; in gpmi_ooblayout_ecc()
1097 return -ERANGE; in gpmi_ooblayout_ecc()
1099 oobregion->offset = 0; in gpmi_ooblayout_ecc()
1100 oobregion->length = geo->page_size - mtd->writesize; in gpmi_ooblayout_ecc()
1110 struct bch_geometry *geo = &this->bch_geometry; in gpmi_ooblayout_free()
1113 return -ERANGE; in gpmi_ooblayout_free()
1116 if (geo->page_size < mtd->writesize + mtd->oobsize) { in gpmi_ooblayout_free()
1117 oobregion->offset = geo->page_size - mtd->writesize; in gpmi_ooblayout_free()
1118 oobregion->length = mtd->oobsize - oobregion->offset; in gpmi_ooblayout_free()
1201 struct platform_device *pdev = this->pdev; in acquire_register_block()
1202 struct resources *res = &this->resources; in acquire_register_block()
1210 res->gpmi_regs = p; in acquire_register_block()
1212 res->bch_regs = p; in acquire_register_block()
1214 dev_err(this->dev, "unknown resource name : %s\n", res_name); in acquire_register_block()
1221 struct platform_device *pdev = this->pdev; in acquire_bch_irq()
1229 err = devm_request_irq(this->dev, err, irq_h, 0, res_name, this); in acquire_bch_irq()
1231 dev_err(this->dev, "error requesting BCH IRQ\n"); in acquire_bch_irq()
1240 if (this->dma_chans[i]) { in release_dma_channels()
1241 dma_release_channel(this->dma_chans[i]); in release_dma_channels()
1242 this->dma_chans[i] = NULL; in release_dma_channels()
1248 struct platform_device *pdev = this->pdev; in acquire_dma_channels()
1252 /* request dma channel */ in acquire_dma_channels()
1253 dma_chan = dma_request_chan(&pdev->dev, "rx-tx"); in acquire_dma_channels()
1255 ret = dev_err_probe(this->dev, PTR_ERR(dma_chan), in acquire_dma_channels()
1256 "DMA channel request failed\n"); in acquire_dma_channels()
1259 this->dma_chans[0] = dma_chan; in acquire_dma_channels()
1267 struct resources *r = &this->resources; in gpmi_get_clks()
1271 for (i = 0; i < this->devdata->clks_count; i++) { in gpmi_get_clks()
1272 clk = devm_clk_get(this->dev, this->devdata->clks[i]); in gpmi_get_clks()
1278 r->clock[i] = clk; in gpmi_get_clks()
1284 dev_dbg(this->dev, "failed in finding the clocks.\n"); in gpmi_get_clks()
1326 struct device *dev = this->dev; in gpmi_free_dma_buffer()
1327 struct bch_geometry *geo = &this->bch_geometry; in gpmi_free_dma_buffer()
1329 if (this->auxiliary_virt && virt_addr_valid(this->auxiliary_virt)) in gpmi_free_dma_buffer()
1330 dma_free_coherent(dev, geo->auxiliary_size, in gpmi_free_dma_buffer()
1331 this->auxiliary_virt, in gpmi_free_dma_buffer()
1332 this->auxiliary_phys); in gpmi_free_dma_buffer()
1333 kfree(this->data_buffer_dma); in gpmi_free_dma_buffer()
1334 kfree(this->raw_buffer); in gpmi_free_dma_buffer()
1336 this->data_buffer_dma = NULL; in gpmi_free_dma_buffer()
1337 this->raw_buffer = NULL; in gpmi_free_dma_buffer()
1340 /* Allocate the DMA buffers */
1343 struct bch_geometry *geo = &this->bch_geometry; in gpmi_alloc_dma_buffer()
1344 struct device *dev = this->dev; in gpmi_alloc_dma_buffer()
1345 struct mtd_info *mtd = nand_to_mtd(&this->nand); in gpmi_alloc_dma_buffer()
1355 this->data_buffer_dma = kzalloc(mtd->writesize ?: PAGE_SIZE, in gpmi_alloc_dma_buffer()
1357 if (this->data_buffer_dma == NULL) in gpmi_alloc_dma_buffer()
1360 this->auxiliary_virt = dma_alloc_coherent(dev, geo->auxiliary_size, in gpmi_alloc_dma_buffer()
1361 &this->auxiliary_phys, GFP_DMA); in gpmi_alloc_dma_buffer()
1362 if (!this->auxiliary_virt) in gpmi_alloc_dma_buffer()
1365 this->raw_buffer = kzalloc((mtd->writesize ?: PAGE_SIZE) + mtd->oobsize, GFP_KERNEL); in gpmi_alloc_dma_buffer()
1366 if (!this->raw_buffer) in gpmi_alloc_dma_buffer()
1373 return -ENOMEM; in gpmi_alloc_dma_buffer()
1384 struct bch_geometry *nfc_geo = &this->bch_geometry; in block_mark_swapping()
1392 if (!this->swap_block_mark) in block_mark_swapping()
1399 bit = nfc_geo->block_mark_bit_offset; in block_mark_swapping()
1400 p = payload + nfc_geo->block_mark_byte_offset; in block_mark_swapping()
1404 * Get the byte from the data area that overlays the block mark. Since in block_mark_swapping()
1406 * physical block mark won't (in general) appear on a byte boundary in in block_mark_swapping()
1409 from_data = (p[0] >> bit) | (p[1] << (8 - bit)); in block_mark_swapping()
1411 /* Get the byte from the OOB. */ in block_mark_swapping()
1417 mask = (0x1 << bit) - 1; in block_mark_swapping()
1421 p[1] = (p[1] & mask) | (from_oob >> (8 - bit)); in block_mark_swapping()
1428 struct bch_geometry *nfc_geo = &this->bch_geometry; in gpmi_count_bitflips()
1435 status = this->auxiliary_virt + ALIGN(meta, 4); in gpmi_count_bitflips()
1442 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len; in gpmi_count_bitflips()
1443 u8 *eccbuf = this->raw_buffer; in gpmi_count_bitflips()
1449 offset = nfc_geo->metadata_size * 8; in gpmi_count_bitflips()
1450 offset += ((8 * nfc_geo->eccn_chunk_size) + eccbits) * (i + 1); in gpmi_count_bitflips()
1451 offset -= eccbits; in gpmi_count_bitflips()
1455 eccbytes -= offset; in gpmi_count_bitflips()
1460 * ECC data are not byte aligned and we may have in gpmi_count_bitflips()
1461 * in-band data in the first and last byte of in gpmi_count_bitflips()
1462 * eccbuf. Set non-eccbits to one so that in gpmi_count_bitflips()
1467 eccbuf[0] |= GENMASK(bitoffset - 1, 0); in gpmi_count_bitflips()
1471 eccbuf[eccbytes - 1] |= GENMASK(7, bitoffset); in gpmi_count_bitflips()
1487 buf + i * nfc_geo->eccn_chunk_size, in gpmi_count_bitflips()
1488 nfc_geo->eccn_chunk_size, in gpmi_count_bitflips()
1490 this->auxiliary_virt, in gpmi_count_bitflips()
1491 nfc_geo->metadata_size, in gpmi_count_bitflips()
1492 nfc_geo->ecc_strength); in gpmi_count_bitflips()
1495 buf + i * nfc_geo->eccn_chunk_size, in gpmi_count_bitflips()
1496 nfc_geo->eccn_chunk_size, in gpmi_count_bitflips()
1499 nfc_geo->ecc_strength); in gpmi_count_bitflips()
1505 mtd->ecc_stats.corrected += flips; in gpmi_count_bitflips()
1509 mtd->ecc_stats.failed++; in gpmi_count_bitflips()
1513 mtd->ecc_stats.corrected += *status; in gpmi_count_bitflips()
1522 struct bch_geometry *geo = &this->bch_geometry; in gpmi_bch_layout_std()
1523 unsigned int ecc_strength = geo->ecc_strength >> 1; in gpmi_bch_layout_std()
1524 unsigned int gf_len = geo->gf_len; in gpmi_bch_layout_std()
1525 unsigned int block0_size = geo->ecc0_chunk_size; in gpmi_bch_layout_std()
1526 unsigned int blockn_size = geo->eccn_chunk_size; in gpmi_bch_layout_std()
1528 this->bch_flashlayout0 = in gpmi_bch_layout_std()
1529 BF_BCH_FLASH0LAYOUT0_NBLOCKS(geo->ecc_chunk_count - 1) | in gpmi_bch_layout_std()
1530 BF_BCH_FLASH0LAYOUT0_META_SIZE(geo->metadata_size) | in gpmi_bch_layout_std()
1535 this->bch_flashlayout1 = in gpmi_bch_layout_std()
1536 BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(geo->page_size) | in gpmi_bch_layout_std()
1547 struct bch_geometry *geo = &this->bch_geometry; in gpmi_ecc_read_page()
1552 this->bch = true; in gpmi_ecc_read_page()
1554 ret = nand_read_page_op(chip, page, 0, buf, geo->page_size); in gpmi_ecc_read_page()
1559 geo->ecc_chunk_count, in gpmi_ecc_read_page()
1560 geo->auxiliary_status_offset); in gpmi_ecc_read_page()
1563 block_mark_swapping(this, buf, this->auxiliary_virt); in gpmi_ecc_read_page()
1573 * rely on the first byte of the auxiliary buffer to contain in gpmi_ecc_read_page()
1576 memset(chip->oob_poi, ~0, mtd->oobsize); in gpmi_ecc_read_page()
1577 chip->oob_poi[0] = ((uint8_t *)this->auxiliary_virt)[0]; in gpmi_ecc_read_page()
1588 struct bch_geometry *geo = &this->bch_geometry; in gpmi_ecc_read_subpage()
1589 int size = chip->ecc.size; /* ECC chunk size */ in gpmi_ecc_read_subpage()
1599 ecc_parity_size = geo->gf_len * geo->ecc_strength / 8; in gpmi_ecc_read_subpage()
1603 last = (offs + len - 1) / size; in gpmi_ecc_read_subpage()
1605 if (this->swap_block_mark) { in gpmi_ecc_read_subpage()
1613 marker_pos = geo->block_mark_byte_offset / size; in gpmi_ecc_read_subpage()
1615 dev_dbg(this->dev, in gpmi_ecc_read_subpage()
1624 * - need to add an extra ECC size when calculating col and page_size, in gpmi_ecc_read_subpage()
1626 * - ecc0_chunk size need to set to the same size as other chunks, in gpmi_ecc_read_subpage()
1630 meta = geo->metadata_size; in gpmi_ecc_read_subpage()
1632 if (geo->ecc_for_meta) in gpmi_ecc_read_subpage()
1642 ecc_parity_size = geo->gf_len * geo->ecc_strength / 8; in gpmi_ecc_read_subpage()
1643 n = last - first + 1; in gpmi_ecc_read_subpage()
1645 if (geo->ecc_for_meta && meta) in gpmi_ecc_read_subpage()
1651 ecc_strength = geo->ecc_strength >> 1; in gpmi_ecc_read_subpage()
1653 this->bch_flashlayout0 = BF_BCH_FLASH0LAYOUT0_NBLOCKS( in gpmi_ecc_read_subpage()
1654 (geo->ecc_for_meta ? n : n - 1)) | in gpmi_ecc_read_subpage()
1657 BF_BCH_FLASH0LAYOUT0_GF(geo->gf_len, this) | in gpmi_ecc_read_subpage()
1658 BF_BCH_FLASH0LAYOUT0_DATA0_SIZE((geo->ecc_for_meta ? in gpmi_ecc_read_subpage()
1659 0 : geo->ecc0_chunk_size), this); in gpmi_ecc_read_subpage()
1661 this->bch_flashlayout1 = BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(page_size) | in gpmi_ecc_read_subpage()
1663 BF_BCH_FLASH0LAYOUT1_GF(geo->gf_len, this) | in gpmi_ecc_read_subpage()
1664 BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(geo->eccn_chunk_size, this); in gpmi_ecc_read_subpage()
1666 this->bch = true; in gpmi_ecc_read_subpage()
1672 dev_dbg(this->dev, "page:%d(%d:%d)%d, chunk:(%d:%d), BCH PG size:%d\n", in gpmi_ecc_read_subpage()
1685 struct bch_geometry *nfc_geo = &this->bch_geometry; in gpmi_ecc_write_page()
1687 dev_dbg(this->dev, "ecc write page.\n"); in gpmi_ecc_write_page()
1690 this->bch = true; in gpmi_ecc_write_page()
1692 memcpy(this->auxiliary_virt, chip->oob_poi, nfc_geo->auxiliary_size); in gpmi_ecc_write_page()
1694 if (this->swap_block_mark) { in gpmi_ecc_write_page()
1699 memcpy(this->data_buffer_dma, buf, mtd->writesize); in gpmi_ecc_write_page()
1700 buf = this->data_buffer_dma; in gpmi_ecc_write_page()
1701 block_mark_swapping(this, this->data_buffer_dma, in gpmi_ecc_write_page()
1702 this->auxiliary_virt); in gpmi_ecc_write_page()
1705 return nand_prog_page_op(chip, page, 0, buf, nfc_geo->page_size); in gpmi_ecc_write_page()
1718 * 2) In read operations, the first byte of the OOB we return must reflect the
1722 * 3) ECC-based read operations return an OOB full of set bits (since we never
1723 * allow ECC-based writes to the OOB, it doesn't matter what ECC-based reads
1734 * 1) Are we doing a "raw" read, or an ECC-based read?
1740 * | Raw | ECC-based |
1741 * -------------+-------------------------+-------------------------+
1747 * -------------+-------------------------+ return it in a buffer |
1753 * | into the first byte of | |
1755 * -------------+-------------------------+-------------------------+
1762 * It turns out that knowing whether we want an "ECC-based" or "raw" read is not
1765 * ECC-based or raw view of the page is implicit in which function it calls
1766 * (there is a similar pair of ECC-based/raw functions for writing).
1775 memset(chip->oob_poi, ~0, mtd->oobsize); in gpmi_ecc_read_oob()
1778 ret = nand_read_page_op(chip, page, mtd->writesize, chip->oob_poi, in gpmi_ecc_read_oob()
1779 mtd->oobsize); in gpmi_ecc_read_oob()
1785 * non-transcribing case (!GPMI_IS_MX23()), we already have it. in gpmi_ecc_read_oob()
1789 /* Read the block mark into the first byte of the OOB buffer. */ in gpmi_ecc_read_oob()
1790 ret = nand_read_page_op(chip, page, 0, chip->oob_poi, 1); in gpmi_ecc_read_oob()
1806 return -EPERM; in gpmi_ecc_write_oob()
1809 return -EPERM; in gpmi_ecc_write_oob()
1811 return nand_prog_page_op(chip, page, mtd->writesize + of.offset, in gpmi_ecc_write_oob()
1812 chip->oob_poi + of.offset, of.length); in gpmi_ecc_write_oob()
1820 * byte boundaries.
1832 struct bch_geometry *nfc_geo = &this->bch_geometry; in gpmi_ecc_read_page_raw()
1833 int eccsize = nfc_geo->eccn_chunk_size; in gpmi_ecc_read_page_raw()
1834 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len; in gpmi_ecc_read_page_raw()
1835 u8 *tmp_buf = this->raw_buffer; in gpmi_ecc_read_page_raw()
1839 uint8_t *oob = chip->oob_poi; in gpmi_ecc_read_page_raw()
1844 mtd->writesize + mtd->oobsize); in gpmi_ecc_read_page_raw()
1855 if (this->swap_block_mark) in gpmi_ecc_read_page_raw()
1856 swap(tmp_buf[0], tmp_buf[mtd->writesize]); in gpmi_ecc_read_page_raw()
1860 * guaranteed to be aligned on a byte boundary). in gpmi_ecc_read_page_raw()
1863 memcpy(oob, tmp_buf, nfc_geo->metadata_size); in gpmi_ecc_read_page_raw()
1865 oob_bit_off = nfc_geo->metadata_size * 8; in gpmi_ecc_read_page_raw()
1869 for (step = 0; step < nfc_geo->ecc_chunk_count; step++) { in gpmi_ecc_read_page_raw()
1875 /* Align last ECC block to align a byte boundary */ in gpmi_ecc_read_page_raw()
1876 if (step == nfc_geo->ecc_chunk_count - 1 && in gpmi_ecc_read_page_raw()
1878 eccbits += 8 - ((oob_bit_off + eccbits) % 8); in gpmi_ecc_read_page_raw()
1891 if (oob_byte_off < mtd->oobsize) in gpmi_ecc_read_page_raw()
1893 tmp_buf + mtd->writesize + oob_byte_off, in gpmi_ecc_read_page_raw()
1894 mtd->oobsize - oob_byte_off); in gpmi_ecc_read_page_raw()
1905 * byte boundaries.
1917 struct bch_geometry *nfc_geo = &this->bch_geometry; in gpmi_ecc_write_page_raw()
1918 int eccsize = nfc_geo->eccn_chunk_size; in gpmi_ecc_write_page_raw()
1919 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len; in gpmi_ecc_write_page_raw()
1920 u8 *tmp_buf = this->raw_buffer; in gpmi_ecc_write_page_raw()
1921 uint8_t *oob = chip->oob_poi; in gpmi_ecc_write_page_raw()
1933 memset(tmp_buf, 0xff, mtd->writesize + mtd->oobsize); in gpmi_ecc_write_page_raw()
1939 memcpy(tmp_buf, oob, nfc_geo->metadata_size); in gpmi_ecc_write_page_raw()
1940 oob_bit_off = nfc_geo->metadata_size * 8; in gpmi_ecc_write_page_raw()
1944 for (step = 0; step < nfc_geo->ecc_chunk_count; step++) { in gpmi_ecc_write_page_raw()
1950 /* Align last ECC block to align a byte boundary */ in gpmi_ecc_write_page_raw()
1951 if (step == nfc_geo->ecc_chunk_count - 1 && in gpmi_ecc_write_page_raw()
1953 eccbits += 8 - ((oob_bit_off + eccbits) % 8); in gpmi_ecc_write_page_raw()
1965 if (oob_required && oob_byte_off < mtd->oobsize) in gpmi_ecc_write_page_raw()
1966 memcpy(tmp_buf + mtd->writesize + oob_byte_off, in gpmi_ecc_write_page_raw()
1967 oob + oob_byte_off, mtd->oobsize - oob_byte_off); in gpmi_ecc_write_page_raw()
1970 * If required, swap the bad block marker and the first byte of the in gpmi_ecc_write_page_raw()
1976 if (this->swap_block_mark) in gpmi_ecc_write_page_raw()
1977 swap(tmp_buf[0], tmp_buf[mtd->writesize]); in gpmi_ecc_write_page_raw()
1980 mtd->writesize + mtd->oobsize); in gpmi_ecc_write_page_raw()
2001 chipnr = (int)(ofs >> chip->chip_shift); in gpmi_block_markbad()
2004 column = !GPMI_IS_MX23(this) ? mtd->writesize : 0; in gpmi_block_markbad()
2007 block_mark = this->data_buffer_dma; in gpmi_block_markbad()
2011 page = (int)(ofs >> chip->page_shift); in gpmi_block_markbad()
2022 struct boot_rom_geometry *geometry = &this->rom_geometry; in nand_boot_set_geometry()
2032 geometry->stride_size_in_pages = 64; in nand_boot_set_geometry()
2042 geometry->search_area_stride_exponent = 2; in nand_boot_set_geometry()
2049 struct boot_rom_geometry *rom_geo = &this->rom_geometry; in mx23_check_transcription_stamp()
2050 struct device *dev = this->dev; in mx23_check_transcription_stamp()
2051 struct nand_chip *chip = &this->nand; in mx23_check_transcription_stamp()
2060 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent; in mx23_check_transcription_stamp()
2071 page = stride * rom_geo->stride_size_in_pages; in mx23_check_transcription_stamp()
2077 * and starts in the 12th byte of the page. in mx23_check_transcription_stamp()
2104 struct device *dev = this->dev; in mx23_write_transcription_stamp()
2105 struct boot_rom_geometry *rom_geo = &this->rom_geometry; in mx23_write_transcription_stamp()
2106 struct nand_chip *chip = &this->nand; in mx23_write_transcription_stamp()
2119 block_size_in_pages = mtd->erasesize / mtd->writesize; in mx23_write_transcription_stamp()
2120 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent; in mx23_write_transcription_stamp()
2122 rom_geo->stride_size_in_pages; in mx23_write_transcription_stamp()
2124 (search_area_size_in_pages + (block_size_in_pages - 1)) / in mx23_write_transcription_stamp()
2146 memset(buffer, ~0, mtd->writesize); in mx23_write_transcription_stamp()
2153 page = stride * rom_geo->stride_size_in_pages; in mx23_write_transcription_stamp()
2158 status = chip->ecc.write_page_raw(chip, buffer, 0, page); in mx23_write_transcription_stamp()
2170 struct device *dev = this->dev; in mx23_boot_init()
2171 struct nand_chip *chip = &this->nand; in mx23_boot_init()
2177 loff_t byte; in mx23_boot_init() local
2185 * anything -- the block marks are already transcribed. in mx23_boot_init()
2197 block_count = nanddev_eraseblocks_per_target(&chip->base); in mx23_boot_init()
2205 * Compute the chip, page and byte addresses for this block's in mx23_boot_init()
2208 chipnr = block >> (chip->chip_shift - chip->phys_erase_shift); in mx23_boot_init()
2209 page = block << (chip->phys_erase_shift - chip->page_shift); in mx23_boot_init()
2210 byte = block << chip->phys_erase_shift; in mx23_boot_init()
2214 ret = nand_read_page_op(chip, page, mtd->writesize, &block_mark, in mx23_boot_init()
2228 ret = chip->legacy.block_markbad(chip, byte); in mx23_boot_init()
2245 /* This is ROM arch-specific initilization before the BBT scanning. */ in nand_boot_init()
2255 /* Free the temporary DMA memory for reading ID. */ in gpmi_set_geometry()
2261 dev_err(this->dev, "Error setting BCH geometry : %d\n", ret); in gpmi_set_geometry()
2265 /* Alloc the new DMA buffers according to the pagesize and oobsize */ in gpmi_set_geometry()
2271 struct nand_chip *chip = &this->nand; in gpmi_init_last()
2273 struct nand_ecc_ctrl *ecc = &chip->ecc; in gpmi_init_last()
2274 struct bch_geometry *bch_geo = &this->bch_geometry; in gpmi_init_last()
2283 ecc->read_page = gpmi_ecc_read_page; in gpmi_init_last()
2284 ecc->write_page = gpmi_ecc_write_page; in gpmi_init_last()
2285 ecc->read_oob = gpmi_ecc_read_oob; in gpmi_init_last()
2286 ecc->write_oob = gpmi_ecc_write_oob; in gpmi_init_last()
2287 ecc->read_page_raw = gpmi_ecc_read_page_raw; in gpmi_init_last()
2288 ecc->write_page_raw = gpmi_ecc_write_page_raw; in gpmi_init_last()
2289 ecc->read_oob_raw = gpmi_ecc_read_oob_raw; in gpmi_init_last()
2290 ecc->write_oob_raw = gpmi_ecc_write_oob_raw; in gpmi_init_last()
2291 ecc->engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST; in gpmi_init_last()
2292 ecc->size = bch_geo->eccn_chunk_size; in gpmi_init_last()
2293 ecc->strength = bch_geo->ecc_strength; in gpmi_init_last()
2299 * (2) the size of the ECC parity is byte aligned. in gpmi_init_last()
2302 ((bch_geo->gf_len * bch_geo->ecc_strength) % 8) == 0) { in gpmi_init_last()
2303 ecc->read_subpage = gpmi_ecc_read_subpage; in gpmi_init_last()
2304 chip->options |= NAND_SUBPAGE_READ; in gpmi_init_last()
2315 if (chip->bbt_options & NAND_BBT_USE_FLASH) { in gpmi_nand_attach_chip()
2316 chip->bbt_options |= NAND_BBT_NO_OOB; in gpmi_nand_attach_chip()
2318 if (of_property_read_bool(this->dev->of_node, in gpmi_nand_attach_chip()
2319 "fsl,no-blockmark-swap")) in gpmi_nand_attach_chip()
2320 this->swap_block_mark = false; in gpmi_nand_attach_chip()
2322 dev_dbg(this->dev, "Blockmark swapping %sabled\n", in gpmi_nand_attach_chip()
2323 this->swap_block_mark ? "en" : "dis"); in gpmi_nand_attach_chip()
2329 chip->options |= NAND_SKIP_BBTSCAN; in gpmi_nand_attach_chip()
2336 struct gpmi_transfer *transfer = &this->transfers[this->ntransfers]; in get_next_transfer()
2338 this->ntransfers++; in get_next_transfer()
2340 if (this->ntransfers == GPMI_MAX_TRANSFERS) in get_next_transfer()
2352 int chip = this->nand.cur_cs; in gpmi_chain_command()
2374 transfer->cmdbuf[0] = cmd; in gpmi_chain_command()
2376 memcpy(&transfer->cmdbuf[1], addr, naddr); in gpmi_chain_command()
2378 sg_init_one(&transfer->sgl, transfer->cmdbuf, naddr + 1); in gpmi_chain_command()
2379 dma_map_sg(this->dev, &transfer->sgl, 1, DMA_TO_DEVICE); in gpmi_chain_command()
2381 transfer->direction = DMA_TO_DEVICE; in gpmi_chain_command()
2383 desc = dmaengine_prep_slave_sg(channel, &transfer->sgl, 1, DMA_MEM_TO_DEV, in gpmi_chain_command()
2396 | BF_GPMI_CTRL0_CS(this->nand.cur_cs, this) in gpmi_chain_wait_ready()
2418 transfer->direction = DMA_FROM_DEVICE; in gpmi_chain_data_read()
2420 *direct = prepare_data_dma(this, buf, raw_len, &transfer->sgl, in gpmi_chain_data_read()
2425 | BF_GPMI_CTRL0_CS(this->nand.cur_cs, this) in gpmi_chain_data_read()
2430 if (this->bch) { in gpmi_chain_data_read()
2436 pio[4] = transfer->sgl.dma_address; in gpmi_chain_data_read()
2437 pio[5] = this->auxiliary_phys; in gpmi_chain_data_read()
2445 if (!this->bch) in gpmi_chain_data_read()
2446 desc = dmaengine_prep_slave_sg(channel, &transfer->sgl, 1, in gpmi_chain_data_read()
2465 transfer->direction = DMA_TO_DEVICE; in gpmi_chain_data_write()
2467 prepare_data_dma(this, buf, raw_len, &transfer->sgl, DMA_TO_DEVICE); in gpmi_chain_data_write()
2471 | BF_GPMI_CTRL0_CS(this->nand.cur_cs, this) in gpmi_chain_data_write()
2476 if (this->bch) { in gpmi_chain_data_write()
2482 pio[4] = transfer->sgl.dma_address; in gpmi_chain_data_write()
2483 pio[5] = this->auxiliary_phys; in gpmi_chain_data_write()
2488 (this->bch ? MXS_DMA_CTRL_WAIT4END : 0)); in gpmi_chain_data_write()
2492 if (!this->bch) in gpmi_chain_data_write()
2493 desc = dmaengine_prep_slave_sg(channel, &transfer->sgl, 1, in gpmi_chain_data_write()
2518 this->ntransfers = 0; in gpmi_nfc_exec_op()
2520 this->transfers[i].direction = DMA_NONE; in gpmi_nfc_exec_op()
2522 ret = pm_runtime_resume_and_get(this->dev); in gpmi_nfc_exec_op()
2532 if (this->hw.must_apply_timings) { in gpmi_nfc_exec_op()
2533 this->hw.must_apply_timings = false; in gpmi_nfc_exec_op()
2539 dev_dbg(this->dev, "%s: %d instructions\n", __func__, op->ninstrs); in gpmi_nfc_exec_op()
2541 for (i = 0; i < op->ninstrs; i++) { in gpmi_nfc_exec_op()
2542 instr = &op->instrs[i]; in gpmi_nfc_exec_op()
2546 switch (instr->type) { in gpmi_nfc_exec_op()
2551 cmd = instr->ctx.cmd.opcode; in gpmi_nfc_exec_op()
2557 if (i + 1 != op->ninstrs && in gpmi_nfc_exec_op()
2558 op->instrs[i + 1].type == NAND_OP_ADDR_INSTR) in gpmi_nfc_exec_op()
2565 desc = gpmi_chain_command(this, cmd, instr->ctx.addr.addrs, in gpmi_nfc_exec_op()
2566 instr->ctx.addr.naddrs); in gpmi_nfc_exec_op()
2569 buf_write = instr->ctx.data.buf.out; in gpmi_nfc_exec_op()
2570 buf_len = instr->ctx.data.len; in gpmi_nfc_exec_op()
2577 if (!instr->ctx.data.len) in gpmi_nfc_exec_op()
2579 buf_read = instr->ctx.data.buf.in; in gpmi_nfc_exec_op()
2580 buf_len = instr->ctx.data.len; in gpmi_nfc_exec_op()
2589 ret = -ENXIO; in gpmi_nfc_exec_op()
2594 dev_dbg(this->dev, "%s setup done\n", __func__); in gpmi_nfc_exec_op()
2597 dev_err(this->dev, "Multiple data instructions not supported\n"); in gpmi_nfc_exec_op()
2598 ret = -EINVAL; in gpmi_nfc_exec_op()
2602 if (this->bch) { in gpmi_nfc_exec_op()
2603 writel(this->bch_flashlayout0, in gpmi_nfc_exec_op()
2604 this->resources.bch_regs + HW_BCH_FLASH0LAYOUT0); in gpmi_nfc_exec_op()
2605 writel(this->bch_flashlayout1, in gpmi_nfc_exec_op()
2606 this->resources.bch_regs + HW_BCH_FLASH0LAYOUT1); in gpmi_nfc_exec_op()
2609 desc->callback = dma_irq_callback; in gpmi_nfc_exec_op()
2610 desc->callback_param = this; in gpmi_nfc_exec_op()
2611 dma_completion = &this->dma_done; in gpmi_nfc_exec_op()
2616 if (this->bch && buf_read) { in gpmi_nfc_exec_op()
2618 this->resources.bch_regs + HW_BCH_CTRL_SET); in gpmi_nfc_exec_op()
2619 bch_completion = &this->bch_done; in gpmi_nfc_exec_op()
2628 dev_err(this->dev, "DMA timeout, last DMA\n"); in gpmi_nfc_exec_op()
2630 ret = -ETIMEDOUT; in gpmi_nfc_exec_op()
2634 if (this->bch && buf_read) { in gpmi_nfc_exec_op()
2637 dev_err(this->dev, "BCH timeout, last DMA\n"); in gpmi_nfc_exec_op()
2639 ret = -ETIMEDOUT; in gpmi_nfc_exec_op()
2645 this->resources.bch_regs + HW_BCH_CTRL_CLR); in gpmi_nfc_exec_op()
2651 for (i = 0; i < this->ntransfers; i++) { in gpmi_nfc_exec_op()
2652 struct gpmi_transfer *transfer = &this->transfers[i]; in gpmi_nfc_exec_op()
2654 if (transfer->direction != DMA_NONE) in gpmi_nfc_exec_op()
2655 dma_unmap_sg(this->dev, &transfer->sgl, 1, in gpmi_nfc_exec_op()
2656 transfer->direction); in gpmi_nfc_exec_op()
2660 memcpy(buf_read, this->data_buffer_dma, in gpmi_nfc_exec_op()
2663 this->bch = false; in gpmi_nfc_exec_op()
2666 pm_runtime_mark_last_busy(this->dev); in gpmi_nfc_exec_op()
2667 pm_runtime_put_autosuspend(this->dev); in gpmi_nfc_exec_op()
2680 struct nand_chip *chip = &this->nand; in gpmi_nand_init()
2685 mtd->name = "gpmi-nand"; in gpmi_nand_init()
2686 mtd->dev.parent = this->dev; in gpmi_nand_init()
2688 /* init the nand_chip{}, we don't support a 16-bit NAND Flash bus. */ in gpmi_nand_init()
2690 nand_set_flash_node(chip, this->pdev->dev.of_node); in gpmi_nand_init()
2691 chip->legacy.block_markbad = gpmi_block_markbad; in gpmi_nand_init()
2692 chip->badblock_pattern = &gpmi_bbt_descr; in gpmi_nand_init()
2693 chip->options |= NAND_NO_SUBPAGE_WRITE; in gpmi_nand_init()
2696 this->swap_block_mark = !GPMI_IS_MX23(this); in gpmi_nand_init()
2699 * Allocate a temporary DMA buffer for reading ID in the in gpmi_nand_init()
2702 this->bch_geometry.payload_size = 1024; in gpmi_nand_init()
2703 this->bch_geometry.auxiliary_size = 128; in gpmi_nand_init()
2708 nand_controller_init(&this->base); in gpmi_nand_init()
2709 this->base.ops = &gpmi_nand_controller_ops; in gpmi_nand_init()
2710 chip->controller = &this->base; in gpmi_nand_init()
2736 { .compatible = "fsl,imx23-gpmi-nand", .data = &gpmi_devdata_imx23, },
2737 { .compatible = "fsl,imx28-gpmi-nand", .data = &gpmi_devdata_imx28, },
2738 { .compatible = "fsl,imx6q-gpmi-nand", .data = &gpmi_devdata_imx6q, },
2739 { .compatible = "fsl,imx6sx-gpmi-nand", .data = &gpmi_devdata_imx6sx, },
2740 { .compatible = "fsl,imx7d-gpmi-nand", .data = &gpmi_devdata_imx7d,},
2741 { .compatible = "fsl,imx8qxp-gpmi-nand", .data = &gpmi_devdata_imx8qxp, },
2751 this = devm_kzalloc(&pdev->dev, sizeof(*this), GFP_KERNEL); in gpmi_nand_probe()
2753 return -ENOMEM; in gpmi_nand_probe()
2755 this->devdata = of_device_get_match_data(&pdev->dev); in gpmi_nand_probe()
2757 this->pdev = pdev; in gpmi_nand_probe()
2758 this->dev = &pdev->dev; in gpmi_nand_probe()
2764 pm_runtime_enable(&pdev->dev); in gpmi_nand_probe()
2765 pm_runtime_set_autosuspend_delay(&pdev->dev, 500); in gpmi_nand_probe()
2766 pm_runtime_use_autosuspend(&pdev->dev); in gpmi_nand_probe()
2776 dev_info(this->dev, "driver registered.\n"); in gpmi_nand_probe()
2781 pm_runtime_dont_use_autosuspend(&pdev->dev); in gpmi_nand_probe()
2782 pm_runtime_disable(&pdev->dev); in gpmi_nand_probe()
2792 struct nand_chip *chip = &this->nand; in gpmi_nand_remove()
2800 pm_runtime_dont_use_autosuspend(&pdev->dev); in gpmi_nand_remove()
2801 pm_runtime_disable(&pdev->dev); in gpmi_nand_remove()
2821 dev_err(this->dev, "Error in resume %d\n", ret); in gpmi_pm_resume()
2827 /* re-init the GPMI registers */ in gpmi_pm_resume()
2830 dev_err(this->dev, "Error setting GPMI : %d\n", ret); in gpmi_pm_resume()
2835 if (this->hw.clk_rate) in gpmi_pm_resume()
2836 this->hw.must_apply_timings = true; in gpmi_pm_resume()
2838 /* re-init the BCH registers */ in gpmi_pm_resume()
2841 dev_err(this->dev, "Error setting BCH : %d\n", ret); in gpmi_pm_resume()
2880 .name = "gpmi-nand",