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Searched +full:devfreq +full:- +full:events (Results 1 – 25 of 27) sorted by relevance

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/linux/drivers/devfreq/
H A Dgovernor.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * governor.h - internal header for devfreq governors.
8 * This header is for devfreq governors in drivers/devfreq/
14 #include <linux/devfreq.h>
18 #define to_devfreq(DEV) container_of((DEV), struct devfreq, dev)
20 /* Devfreq events */
32 * - DEVFREQ_GOV_FLAG_IMMUTABLE
34 * - DEVFREQ_GOV_FLAG_IRQ_DRIVEN
35 * : The devfreq won't schedule the work for this governor.
42 * - DEVFREQ_GOV_ATTR_POLLING_INTERVAL
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H A Drk3399_dmc.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Lin Huang <hl@rock-chips.com>
7 #include <linux/arm-smccc.h>
11 #include <linux/devfreq.h>
12 #include <linux/devfreq-event.h>
42 struct devfreq *devfreq; member
75 unsigned long old_clk_rate = dmcfreq->rate; in rk3399_dmcfreq_target()
93 if (dmcfreq->rate == target_rate) in rk3399_dmcfreq_target()
96 mutex_lock(&dmcfreq->lock); in rk3399_dmcfreq_target()
99 * Ensure power-domain transitions don't interfere with ARM Trusted in rk3399_dmcfreq_target()
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H A Dtegra30-devfreq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * A devfreq driver for NVIDIA Tegra SoCs
11 #include <linux/devfreq.h>
76 * struct tegra_devfreq_device_config - configuration specific to an ACTMON
152 * struct tegra_devfreq_device - state specific to an ACTMON device
180 struct devfreq *devfreq; member
220 return readl_relaxed(tegra->regs + offset); in actmon_readl()
225 writel_relaxed(val, tegra->regs + offset); in actmon_writel()
230 return readl_relaxed(dev->regs + offset); in device_readl()
236 writel_relaxed(val, dev->regs + offset); in device_writel()
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H A Ddevfreq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * devfreq: Generic Dynamic Voltage and Frequency Scaling (DVFS) Framework
4 * for Non-CPU Devices.
22 #include <linux/devfreq.h>
34 #include <trace/events/devfreq.h>
43 * devfreq core provides delayed work based load monitoring helper
49 /* The list of all device-devfreq governors */
51 /* The list of all device-devfreq */
61 * find_device_devfreq() - find devfreq struct using device pointer
62 * @dev: device pointer used to lookup device devfreq.
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/linux/drivers/devfreq/event/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 bool "DEVFREQ-Event device Support"
5 The devfreq-event device provide the raw data and events which
6 indicate the current state of devfreq-event device. The provided
7 data from devfreq-event device is used to monitor the state of
11 The devfreq-event device can support the various type of events
12 (e.g., raw data, utilization, latency, bandwidth). The events
13 may be used by devfreq governor and other subsystem.
18 tristate "Exynos NoC (Network On Chip) Probe DEVFREQ event Driver"
23 This add the devfreq-event driver for Exynos SoC. It provides NoC
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H A Dexynos-ppmu.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * exynos_ppmu.c - Exynos PPMU (Platform Performance Monitoring Unit) support
5 * Copyright (c) 2014-2015 Samsung Electronics Co., Ltd.
8 * This driver is based on drivers/devfreq/exynos/exynos_ppmu.c
20 #include <linux/devfreq-event.h>
22 #include "exynos-ppmu.h"
46 { "ppmu-event0-"#name, PPMU_PMNCNT0 }, \
47 { "ppmu-event1-"#name, PPMU_PMNCNT1 }, \
48 { "ppmu-event2-"#name, PPMU_PMNCNT2 }, \
49 { "ppmu-event3-"#name, PPMU_PMNCNT3 }
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H A Drockchip-dfi.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Lin Huang <hl@rock-chips.com>
8 #include <linux/devfreq-event.h>
69 * struct dmc_count_channel - structure to hold counter values from the DDR controller
123 void __iomem *dfi_regs = dfi->regs; in rockchip_dfi_enable()
126 mutex_lock(&dfi->mutex); in rockchip_dfi_enable()
128 dfi->usecount++; in rockchip_dfi_enable()
129 if (dfi->usecount > 1) in rockchip_dfi_enable()
132 ret = clk_prepare_enable(dfi->clk); in rockchip_dfi_enable()
134 dev_err(&dfi->edev->dev, "failed to enable dfi clk: %d\n", ret); in rockchip_dfi_enable()
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/linux/Documentation/devicetree/bindings/interconnect/
H A Dsamsung,exynos-bus.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/interconnect/samsung,exynos-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chanwoo Choi <cw00.choi@samsung.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
15 sub-blocks in SoC. Most Exynos SoCs share the common architecture for buses.
20 sub-blocks.
22 The Exynos SoC includes the various sub-blocks which have the each AXI bus.
24 line. The power line might be shared among one more sub-blocks. So, we can
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/linux/Documentation/devicetree/bindings/devfreq/event/
H A Dsamsung,exynos-ppmu.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/devfreq/event/samsung,exynos-ppmu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chanwoo Choi <cw00.choi@samsung.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
16 PPMU events provide information of the SoC's behaviors so that you may use to
19 Exynos PPMU driver uses the devfreq-event class to provide event data to
20 various devfreq devices. The devfreq devices would use the event data when
26 - samsung,exynos-ppmu
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/linux/include/linux/
H A Ddevfreq-event.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * devfreq-event: a framework to provide raw data and events of devfreq devices
15 * struct devfreq_event_dev - the devfreq-event device
17 * @node : Contain the devfreq-event device that have been registered.
18 * @dev : the device registered by devfreq-event class. dev.parent is
19 * the device using devfreq-event.
20 * @lock : a mutex to protect accessing devfreq-event.
22 * @desc : the description for devfreq-event device.
24 * This structure contains devfreq-event device information.
37 * struct devfreq_event_data - the devfreq-event data
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/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dsamsung,exynos5422-dmc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/samsung,exynos5422-dmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - Krzysztof Kozlowski <krzk@kernel.org>
13 - Lukasz Luba <lukasz.luba@arm.com>
27 - const: samsung,exynos5422-dmc
29 clock-names:
31 - const: fout_spll
32 - const: mout_sclk_spll
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H A Drockchip,rk3399-dmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/rockchip,rk3399-dmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Brian Norris <briannorris@chromium.org>
15 - rockchip,rk3399-dmc
17 devfreq-events:
21 Documentation/devicetree/bindings/devfreq/event/rockchip,dfi.yaml.
26 clock-names:
28 - const: dmc_clk
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/linux/drivers/memory/samsung/
H A Dexynos5422-dmc.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/devfreq.h>
10 #include <linux/devfreq-event.h>
74 /* A value for register DREX_PPCCLKCON which enables performance events clock.
101 * struct dmc_opp_table - Operating level desciption
113 * struct exynos5_dmc - main structure describing DMC device
115 * @df: devfreq device structure returned by devfreq framework
116 * @gov_data: configuration of devfreq governor
142 * @counter: devfreq events
146 * @total: total time between devfreq events
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/linux/arch/arm/boot/dts/samsung/
H A Dexynos4412-odroid-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Common definition for Hardkernel's Exynos4412 based ODROID-X/X2/U2/U3 boards
7 #include <dt-bindings/sound/samsung-i2s.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/clock/maxim,max77686.h>
11 #include "exynos4412-ppmu-common.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include "exynos-mfc-reserved-memory.dtsi"
22 stdout-path = &serial_1;
26 compatible = "samsung,secure-firmware";
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H A Dexynos4412-itop-scp-core.dtsi1 // SPDX-License-Identifier: GPL-2.0
13 #include <dt-bindings/clock/samsung,s2mps11.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
17 #include "exynos4412-ppmu-common.dtsi"
18 #include "exynos-mfc-reserved-memory.dtsi"
31 compatible = "samsung,secure-firmware";
35 fixed-rate-clocks {
37 compatible = "samsung,clock-xxti";
38 clock-frequency = <0>;
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H A Dexynos5422-odroid-core.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel Odroid XU3/XU3-Lite/XU4/HC1 boards core device tree source
6 * Copyright (c) 2013-2017 Samsung Electronics Co., Ltd.
10 #include <dt-bindings/clock/samsung,s2mps11.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
14 #include "exynos5422-cpus.dtsi"
27 stdout-path = "serial2:115200n8";
31 compatible = "samsung,secure-firmware";
35 fixed-rate-clocks {
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H A Dexynos3250-rinato.dts1 // SPDX-License-Identifier: GPL-2.0
12 /dts-v1/;
14 #include "exynos4412-ppmu-common.dtsi"
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/clock/samsung,s2mps11.h>
22 chassis-type = "watch";
31 stdout-path = &serial_1;
40 compatible = "samsung,secure-firmware";
44 gpio-keys {
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H A Dexynos4412-p4note.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 * Based on exynos4412-midas.dtsi.
10 /dts-v1/;
12 #include "exynos4412-ppmu-common.dtsi"
14 #include <dt-bindings/clock/maxim,max77686.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/input/linux-event-codes.h>
17 #include <dt-bindings/interrupt-controller/irq.h>
18 #include <dt-bindings/power/summit,smb347-charger.h>
19 #include "exynos-pinctrl.h"
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H A Dexynos4412-midas.dtsi1 // SPDX-License-Identifier: GPL-2.0
12 /dts-v1/;
14 #include "exynos4412-ppmu-common.dtsi"
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/input/input.h>
18 #include <dt-bindings/interrupt-controller/irq.h>
19 #include <dt-bindings/clock/maxim,max77686.h>
20 #include "exynos-pinctrl.h"
34 stdout-path = &serial_2;
38 compatible = "samsung,secure-firmware";
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H A Dexynos3250-monk.dts1 // SPDX-License-Identifier: GPL-2.0
12 /dts-v1/;
14 #include "exynos4412-ppmu-common.dtsi"
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/clock/samsung,s2mps11.h>
34 compatible = "samsung,secure-firmware";
38 gpio-keys {
39 compatible = "gpio-keys";
41 power-key {
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/linux/include/ufs/
H A Dufshcd.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Copyright (C) 2011-2013 Samsung India Software Operations
5 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
16 #include <linux/blk-crypto-profile.h>
17 #include <linux/blk-mq.h>
18 #include <linux/devfreq.h>
19 #include <linux/fault-inject.h>
23 #include <linux/dma-direction.h>
59 /* abnormal events */
68 * struct uic_command - UIC command structure
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/linux/arch/arm64/boot/dts/exynos/
H A Dexynos5433-tm2-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
11 /dts-v1/;
13 #include <dt-bindings/clock/samsung,s2mps11.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/interrupt-controller/irq.h>
17 #include <dt-bindings/sound/samsung-i2s.h>
48 stdout-path = &serial_1;
56 gpio-keys {
57 compatible = "gpio-keys";
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/linux/drivers/ufs/core/
H A Dufshcd.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (C) 2011-2013 Samsung India Software Operations
5 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
13 #include <linux/devfreq.h>
17 #include <linux/blk-pm.h>
31 #include "ufshcd-priv.h"
34 #include "ufs-sysfs.h"
35 #include "ufs-debugfs.h"
36 #include "ufs-fault-injection.h"
38 #include "ufshcd-crypto.h"
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/linux/drivers/gpu/drm/panthor/
H A Dpanthor_sched.c1 // SPDX-License-Identifier: GPL-2.0 or MIT
14 #include <linux/dma-mapping.h>
15 #include <linux/dma-resv.h>
20 #include <linux/iosys-map.h>
38 * Mali CSF hardware adopts a firmware-assisted scheduling model, where
53 * The current implementation only supports with kernel-mode queues.
54 * In other terms, userspace doesn't have access to the ring-buffer.
56 * called from the queue ring-buffer by the kernel using a pre-defined
63 * FW-scheduler, we use the 1:1 entity:scheduler mode, such that each
66 * queue ring-buffer, and the group is scheduled for execution if it
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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