Home
last modified time | relevance | path

Searched +full:dev +full:- +full:ctrl (Results 1 – 25 of 311) sorted by relevance

12345678910>>...13

/freebsd/sys/dev/iicbus/pmic/rockchip/
H A Drk8xx_rtc.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
34 #include <dev/iicbus/pmic/rockchip/rk8xx.h>
37 rk8xx_gettime(device_t dev, struct timespec *ts) in rk8xx_gettime() argument
42 uint8_t ctrl; in rk8xx_gettime() local
45 sc = device_get_softc(dev); in rk8xx_gettime()
48 error = rk8xx_read(dev, sc->rtc_regs.ctrl, &ctrl, 1); in rk8xx_gettime()
52 ctrl |= sc->rtc_regs.ctrl_readsel_mask; in rk8xx_gettime()
53 ctrl &= ~(sc->rtc_regs.ctrl_ampm_mask | sc->rtc_regs.ctrl_gettime_mask); in rk8xx_gettime()
54 error = rk8xx_write(dev, sc->rtc_regs.ctrl, &ctrl, 1); in rk8xx_gettime()
[all …]
/freebsd/sys/amd64/vmm/amd/
H A Damdvi_hw.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
43 #include <dev/pci/pcivar.h>
44 #include <dev/pci/pcireg.h>
63 #define MOD_DEC(a, s, m) (((a) - (s)) % ((m) * (s)))
114 * Bus(256) x Dev(32) x Fun(8) x DTE(256 bits or 32 bytes).
127 return (pci_cfgregread(softc->pci_seg, PCI_RID2BUS(softc->pci_rid), in amdvi_pci_read()
128 PCI_RID2SLOT(softc->pci_rid), PCI_RID2FUNC(softc->pci_rid), in amdvi_pci_read()
136 * If ATS is absent or disabled, return (-1), otherwise ATS
142 device_t dev; in amdvi_find_ats_qlen() local
[all …]
/freebsd/sys/dev/usb/input/
H A Dusbhid.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
58 #include <dev/evdev/input.h>
60 #include <dev/hid/hid.h>
61 #include <dev/hid/hidquirk.h>
63 #include <dev/usb/usb.h>
64 #include <dev/usb/usbdi.h>
65 #include <dev/usb/usbdi_util.h>
66 #include <dev/usb/usbhid.h>
67 #include <dev/usb/usb_core.h>
[all …]
/freebsd/sys/dev/ahci/
H A Dahci_fsl_fdt.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
46 #include <dev/ofw/ofw_bus.h>
47 #include <dev/ofw/ofw_bus_subr.h>
49 #include <dev/ahci/ahci.h>
51 #include <dev/clk/clk.h>
177 {"fsl,ls1021a-ahci", QORIQ_AHCI_LS1021A},
178 {"fsl,ls1028a-ahci", QORIQ_AHCI_LS1028A},
179 {"fsl,ls1043a-ahci", QORIQ_AHCI_LS1043A},
180 {"fsl,ls2080a-ahci", QORIQ_AHCI_LS2080A},
[all …]
/freebsd/sys/arm/nvidia/
H A Das3722_gpio.c1 /*-
37 #include <dev/fdt/fdt_common.h>
38 #include <dev/gpio/gpiobusvar.h>
71 #define GPIO_LOCK(_sc) sx_slock(&(_sc)->gpio_lock)
72 #define GPIO_UNLOCK(_sc) sx_unlock(&(_sc)->gpio_lock)
73 #define GPIO_ASSERT(_sc) sx_assert(&(_sc)->gpio_lock, SA_LOCKED)
85 {"bias-disable", AS3722_CFG_BIAS_DISABLE},
86 {"bias-pull-up", AS3722_CFG_BIAS_PULL_UP},
87 {"bias-pull-down", AS3722_CFG_BIAS_PULL_DOWN},
88 {"bias-high-impedance", AS3722_CFG_BIAS_HIGH_IMPEDANCE},
[all …]
/freebsd/sys/contrib/dev/mediatek/mt76/
H A Ddma.c1 // SPDX-License-Identifier: ISC
6 #include <linux/dma-mapping.h>
19 if ((_q)->flags & MT_QFLAG_WED) \
20 _val = mtk_wed_device_reg_read((_q)->wed, \
21 ((_q)->wed_regs + \
24 _val = readl(&(_q)->regs->_field); \
30 if ((_q)->flags & MT_QFLAG_WED) \
31 mtk_wed_device_reg_write((_q)->wed, \
32 ((_q)->wed_regs + _offset), \
35 writel(_val, &(_q)->regs->_field); \
[all …]
H A Ddma.h1 /* SPDX-License-Identifier: ISC */
46 __le32 ctrl; member
80 void mt76_dma_attach(struct mt76_dev *dev);
81 void mt76_dma_cleanup(struct mt76_dev *dev);
82 int mt76_dma_rx_fill(struct mt76_dev *dev, struct mt76_queue *q,
84 void __mt76_dma_queue_reset(struct mt76_dev *dev, struct mt76_queue *q,
86 void mt76_dma_queue_reset(struct mt76_dev *dev, struct mt76_queue *q);
89 mt76_dma_reset_tx_queue(struct mt76_dev *dev, struct mt76_queue *q) in mt76_dma_reset_tx_queue() argument
91 dev->queue_ops->reset_q(dev, q); in mt76_dma_reset_tx_queue()
92 if (mtk_wed_device_active(&dev->mmio.wed)) in mt76_dma_reset_tx_queue()
[all …]
H A Dsdio.c1 // SPDX-License-Identifier: ISC
23 static u32 mt76s_read_whisr(struct mt76_dev *dev) in mt76s_read_whisr() argument
25 return sdio_readl(dev->sdio.func, MCR_WHISR, NULL); in mt76s_read_whisr()
28 u32 mt76s_read_pcr(struct mt76_dev *dev) in mt76s_read_pcr() argument
30 struct mt76_sdio *sdio = &dev->sdio; in mt76s_read_pcr()
32 return sdio_readl(sdio->func, MCR_WHLPCR, NULL); in mt76s_read_pcr()
36 static u32 mt76s_read_mailbox(struct mt76_dev *dev, u32 offset) in mt76s_read_mailbox() argument
38 struct sdio_func *func = dev->sdio.func; in mt76s_read_mailbox()
46 dev_err(dev->dev, "failed setting address [err=%d]\n", err); in mt76s_read_mailbox()
52 dev_err(dev->dev, "failed setting read mode [err=%d]\n", err); in mt76s_read_mailbox()
[all …]
H A Dmt792x_debugfs.c1 // SPDX-License-Identifier: ISC
10 struct mt792x_dev *dev = file->private; in mt792x_ampdu_stat_read_phy() local
20 range[i] = mt76_rr(dev, MT_MIB_ARNG(0, i)); in mt792x_ampdu_stat_read_phy()
28 for (i = 0; i < ARRAY_SIZE(bound) - 1; i++) in mt792x_ampdu_stat_read_phy()
33 seq_printf(file, "%8d | ", phy->mt76->aggr_stats[i]); in mt792x_ampdu_stat_read_phy()
36 seq_printf(file, "BA miss count: %d\n", phy->mib.ba_miss_cnt); in mt792x_ampdu_stat_read_phy()
41 struct mt792x_dev *dev = file->private; in mt792x_tx_stats_show() local
42 struct mt792x_phy *phy = &dev->phy; in mt792x_tx_stats_show()
43 struct mt76_mib_stats *mib = &phy->mib; in mt792x_tx_stats_show()
46 mt792x_mutex_acquire(dev); in mt792x_tx_stats_show()
[all …]
/freebsd/sys/dev/sound/pci/
H A Dspicds.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
34 #include <dev/sound/pcm/sound.h>
36 #include <dev/sound/pci/spicds.h>
42 device_t dev; member
43 spicds_ctrl ctrl; member
49 unsigned int dvc; /* De-emphasis and Volume Control */
59 if (codec->cif) in spicds_wrbit()
67 codec->ctrl(codec->devinfo, cs, 0, cdti); in spicds_wrbit()
69 codec->ctrl(codec->devinfo, cs, 1, cdti); in spicds_wrbit()
[all …]
H A Des137x.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause AND BSD-4-Clause
30 /*-
82 #include <dev/sound/pcm/sound.h>
83 #include <dev/sound/pcm/ac97.h>
84 #include <dev/sound/pci/es137x.h>
86 #include <dev/pci/pcireg.h>
87 #include <dev/pci/pcivar.h>
128 #define ES_BLK_ALIGN (~(ES_BLK_MIN - 1))
148 * 32bit Ensoniq Configuration (es->escfg).
[all …]
/freebsd/sys/modules/qat/qat_api/
H A DMakefile1 # SPDX-License-Identifier: BSD-3-Clause
2 # Copyright(c) 2007-2022 Intel Corporation
3 .PATH: ${SRCTOP}/sys/dev/qat/qat_api
27 SRCS+= common/ctrl/sal_list.c
28 SRCS+= common/ctrl/sal_compression.c
29 SRCS+= common/ctrl/sal_ctrl_services.c
30 SRCS+= common/ctrl/sal_create_services.c
31 SRCS+= common/ctrl/sal_crypto.c
32 SRCS+= common/ctrl/sal_get_instances.c
65 CFLAGS+= -I${SRCTOP}/sys/dev/qat/qat_api/include
[all …]
/freebsd/usr.sbin/bluetooth/bthidd/
H A Dserver.c5 /*-
6 * SPDX-License-Identifier: BSD-2-Clause
39 #include <dev/evdev/input.h>
40 #include <dev/vkbd/vkbd_var.h>
71 srv->ctrl = srv->intr = -1; in server_init()
72 FD_ZERO(&srv->rfdset); in server_init()
73 FD_ZERO(&srv->wfdset); in server_init()
74 LIST_INIT(&srv->sessions); in server_init()
76 /* Open /dev/consolectl */ in server_init()
77 srv->cons = open("/dev/consolectl", O_RDWR); in server_init()
[all …]
H A Dsession.c5 /*-
6 * SPDX-License-Identifier: BSD-2-Clause
67 s->srv = srv; in session_open()
68 memcpy(&s->bdaddr, &d->bdaddr, sizeof(s->bdaddr)); in session_open()
69 s->ctrl = -1; in session_open()
70 s->intr = -1; in session_open()
71 s->vkbd = -1; in session_open()
72 s->ctx = NULL; in session_open()
73 s->state = CLOSED; in session_open()
74 s->ukbd = -1; in session_open()
[all …]
/freebsd/sys/dev/etherswitch/arswitch/
H A Darswitch_phy.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2011-2012 Stefan Bethke.
46 #include <dev/iicbus/iic.h>
47 #include <dev/iicbus/iiconf.h>
48 #include <dev/iicbus/iicbus.h>
49 #include <dev/mii/mii.h>
50 #include <dev/mii/miivar.h>
51 #include <dev/mdio/mdio.h>
53 #include <dev/etherswitch/etherswitch.h>
[all …]
/freebsd/sys/arm/arm/
H A Dgeneric_timer.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
36 * Cortex-A7, Cortex-A15, ARMv8 and later Generic Timer
68 #include <dev/ofw/openfirm.h>
69 #include <dev/ofw/ofw_bus.h>
70 #include <dev/ofw/ofw_bus_subr.h>
74 #include <contrib/dev/acpica/include/acpi.h>
75 #include <dev/acpica/acpivar.h>
131 .name = "sec-phys",
146 .name = "hyp-phys",
[all …]
/freebsd/sys/dev/mlx5/mlx5_accel/
H A Dmlx5_ipsec_offload.c1 /*-
34 #include <dev/mlx5/mlx5_en/en.h>
35 #include <dev/mlx5/crypto.h>
36 #include <dev/mlx5/mlx5_accel/ipsec.h>
104 if (attrs->replay_esn.trigger) { in mlx5e_ipsec_packet_setup()
107 if (attrs->dir == IPSEC_DIR_INBOUND) { in mlx5e_ipsec_packet_setup()
109 attrs->replay_esn.replay_window); in mlx5e_ipsec_packet_setup()
110 if (attrs->replay_esn.replay_window != 0) in mlx5e_ipsec_packet_setup()
118 attrs->replay_esn.esn); in mlx5e_ipsec_packet_setup()
121 switch (attrs->dir) { in mlx5e_ipsec_packet_setup()
[all …]
/freebsd/sys/dev/iicbus/rtc/
H A Dds1672.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
41 #include <dev/iicbus/iiconf.h>
50 #define DS1672_COUNTER 0 /* counter (bytes 0-3) */
63 ds1672_probe(device_t dev) in ds1672_probe() argument
66 device_set_desc(dev, "Dallas Semiconductor DS1672 RTC"); in ds1672_probe()
71 ds1672_read(device_t dev, uint8_t addr, uint8_t *data, uint8_t size) in ds1672_read() argument
78 return (iicbus_transfer(dev, msgs, 2)); in ds1672_read()
82 ds1672_write(device_t dev, uint8_t addr, uint8_t *data, uint8_t size) in ds1672_write() argument
94 return (iicbus_transfer(dev, msgs, 1)); in ds1672_write()
[all …]
/freebsd/sys/x86/cpufreq/
H A Dpowernow.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2004-2005 Bruno Ducrot
30 * to Jung-uk Kim for testing.
146 #define WRITE_FIDVID(fid, vid, ctrl) \ argument
148 (((ctrl) << 32) | (1ULL << 16) | ((vid) << 8) | (fid)))
158 * Some of those tables are the same as the Linux powernow-k7
214 device_t dev; member
239 static int pn_probe(device_t dev);
240 static int pn_attach(device_t dev);
[all …]
/freebsd/sys/dev/uart/
H A Duart_dev_mvebu.c1 /*-
36 #include <dev/ofw/ofw_bus_subr.h>
37 #include <dev/uart/uart.h>
38 #include <dev/uart/uart_bus.h>
39 #include <dev/uart/uart_cpu.h>
40 #include <dev/uart/uart_cpu_fdt.h>
61 #define CTRL_TX_HALF_INT (1 << 8) /* TX Half-Full Interrupt Enable */
62 #define CTRL_RX_HALF_INT (1 << 7) /* RX Half-Full Interrupt Enable */
127 * Low-level UART interface.
170 uint32_t ctrl = 0; in uart_mvebu_param() local
[all …]
/freebsd/sys/dev/mlx4/mlx4_en/
H A Dmlx4_en_tx.c14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
37 #include <dev/mlx4/cq.h>
39 #include <dev/mlx4/qp.h>
59 struct mlx4_en_dev *mdev = priv->mdev; in mlx4_en_create_tx_ring()
70 return -ENOMEM; in mlx4_en_create_tx_ring()
75 if ((err = -bus_dma_tag_create( in mlx4_en_create_tx_ring()
76 bus_get_dma_tag(mdev->pdev->dev.bsddev), in mlx4_en_create_tx_ring()
87 &ring->dma_tag))) in mlx4_en_create_tx_ring()
90 ring->size = size; in mlx4_en_create_tx_ring()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/leds/backlight/
H A Dlp855x-backlight.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/backlight/lp855x-backlight.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Artur Weber <aweber.kernel@gmail.com>
15 - ti,lp8550
16 - ti,lp8551
17 - ti,lp8552
18 - ti,lp8553
19 - ti,lp8555
[all …]
H A Dlp855x.txt4 - compatible: "ti,lp8550", "ti,lp8551", "ti,lp8552", "ti,lp8553",
6 - reg: I2C slave address (u8)
7 - dev-ctrl: Value of DEVICE CONTROL register (u8). It depends on the device.
10 - bl-name: Backlight device name (string)
11 - init-brt: Initial value of backlight brightness (u8)
12 - pwm-period: PWM period value. Set only PWM input mode used (u32)
13 - rom-addr: Register address of ROM area to be updated (u8)
14 - rom-val: Register value to be updated (u8)
15 - power-supply: Regulator which controls the 3V rail
16 - enable-supply: Regulator which controls the EN/VDDIO input
[all …]
/freebsd/sys/arm/broadcom/bcm2835/
H A Dbcm2835_rng.c45 #include <dev/ofw/openfirm.h>
46 #include <dev/ofw/ofw_bus.h>
47 #include <dev/ofw/ofw_bus_subr.h>
49 #include <dev/random/randomdev.h>
50 #include <dev/random/random_harvestq.h>
153 {"broadcom,bcm2835-rng", (uintptr_t)&bcm2835_rng_conf},
154 {"brcm,bcm2835-rng", (uintptr_t)&bcm2835_rng_conf},
156 {"brcm,bcm2711-rng200", (uintptr_t)&bcm2838_rng_conf},
157 {"brcm,bcm2838-rng", (uintptr_t)&bcm2838_rng_conf},
158 {"brcm,bcm2838-rng200", (uintptr_t)&bcm2838_rng_conf},
[all …]
/freebsd/sys/arm64/qualcomm/
H A Dqcom_gcc.c1 /*-
7 * FA8650-15-C-7558 ("CADETS"), as part of the DARPA Transparent Computing
41 #include <dev/ofw/ofw_bus.h>
42 #include <dev/ofw/ofw_bus_subr.h>
47 #define AHB_CBCR_CLK_ENABLE (1 << 0) /* AHB clk branch ctrl */
49 #define ETR_USB_CBCR_CLK_ENABLE (1 << 0) /* ETR USB clk branch ctrl */
51 #define DAP_CBCR_CLK_ENABLE (1 << 0) /* DAP clk branch ctrl */
54 { "qcom,gcc-msm8916", 1 },
64 { -1, 0 }
76 bus_write_4(sc->res, GCC_QDSS_BCR, GCC_QDSS_BCR_BLK_ARES); in qcom_qdss_enable()
[all …]

12345678910>>...13