1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2011-2012 Stefan Bethke.
5 * Copyright (c) 2012 Adrian Chadd.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30 #include <sys/param.h>
31 #include <sys/bus.h>
32 #include <sys/errno.h>
33 #include <sys/kernel.h>
34 #include <sys/lock.h>
35 #include <sys/module.h>
36 #include <sys/mutex.h>
37 #include <sys/socket.h>
38 #include <sys/sockio.h>
39 #include <sys/sysctl.h>
40 #include <sys/systm.h>
41
42 #include <net/if.h>
43 #include <net/if_media.h>
44
45 #include <machine/bus.h>
46 #include <dev/iicbus/iic.h>
47 #include <dev/iicbus/iiconf.h>
48 #include <dev/iicbus/iicbus.h>
49 #include <dev/mii/mii.h>
50 #include <dev/mii/miivar.h>
51 #include <dev/mdio/mdio.h>
52
53 #include <dev/etherswitch/etherswitch.h>
54
55 #include <dev/etherswitch/arswitch/arswitchreg.h>
56 #include <dev/etherswitch/arswitch/arswitchvar.h>
57
58 #include <dev/etherswitch/arswitch/arswitch_reg.h>
59 #include <dev/etherswitch/arswitch/arswitch_phy.h>
60
61 #include "mdio_if.h"
62 #include "miibus_if.h"
63 #include "etherswitch_if.h"
64
65 /*
66 * Access PHYs integrated into the switch by going direct
67 * to the PHY space itself, rather than through the switch
68 * MDIO register.
69 */
70 int
arswitch_readphy_external(device_t dev,int phy,int reg)71 arswitch_readphy_external(device_t dev, int phy, int reg)
72 {
73 int ret;
74 struct arswitch_softc *sc;
75
76 sc = device_get_softc(dev);
77
78 ARSWITCH_LOCK(sc);
79 ret = (MDIO_READREG(device_get_parent(dev), phy, reg));
80 DPRINTF(sc, ARSWITCH_DBG_PHYIO,
81 "%s: phy=0x%08x, reg=0x%08x, ret=0x%08x\n",
82 __func__, phy, reg, ret);
83 ARSWITCH_UNLOCK(sc);
84
85 return (ret);
86 }
87
88 int
arswitch_writephy_external(device_t dev,int phy,int reg,int data)89 arswitch_writephy_external(device_t dev, int phy, int reg, int data)
90 {
91 struct arswitch_softc *sc;
92
93 sc = device_get_softc(dev);
94
95 ARSWITCH_LOCK(sc);
96 (void) MDIO_WRITEREG(device_get_parent(dev), phy,
97 reg, data);
98 DPRINTF(sc, ARSWITCH_DBG_PHYIO,
99 "%s: phy=0x%08x, reg=0x%08x, data=0x%08x\n",
100 __func__, phy, reg, data);
101 ARSWITCH_UNLOCK(sc);
102
103 return (0);
104 }
105
106 /*
107 * Access PHYs integrated into the switch chip through the switch's MDIO
108 * control register.
109 */
110 int
arswitch_readphy_internal(device_t dev,int phy,int reg)111 arswitch_readphy_internal(device_t dev, int phy, int reg)
112 {
113 struct arswitch_softc *sc;
114 uint32_t data = 0, ctrl;
115 int err, timeout;
116 uint32_t a;
117
118 sc = device_get_softc(dev);
119 ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
120
121 if (phy < 0 || phy >= 32)
122 return (ENXIO);
123 if (reg < 0 || reg >= 32)
124 return (ENXIO);
125
126 if (AR8X16_IS_SWITCH(sc, AR8327))
127 a = AR8327_REG_MDIO_CTRL;
128 else
129 a = AR8X16_REG_MDIO_CTRL;
130
131 ARSWITCH_LOCK(sc);
132 err = arswitch_writereg_msb(dev, a,
133 AR8X16_MDIO_CTRL_BUSY | AR8X16_MDIO_CTRL_MASTER_EN |
134 AR8X16_MDIO_CTRL_CMD_READ |
135 (phy << AR8X16_MDIO_CTRL_PHY_ADDR_SHIFT) |
136 (reg << AR8X16_MDIO_CTRL_REG_ADDR_SHIFT));
137 DEVERR(dev, err, "arswitch_readphy()=%d: phy=%d.%02x\n", phy, reg);
138 if (err != 0)
139 goto fail;
140 for (timeout = 100; timeout--; ) {
141 ctrl = arswitch_readreg_msb(dev, a);
142 if ((ctrl & AR8X16_MDIO_CTRL_BUSY) == 0)
143 break;
144 }
145 if (timeout < 0) {
146 DPRINTF(sc, ARSWITCH_DBG_ANY,
147 "arswitch_readphy(): phy=%d.%02x; timeout=%d\n",
148 phy, reg, timeout);
149 goto fail;
150 }
151 data = arswitch_readreg_lsb(dev, a) &
152 AR8X16_MDIO_CTRL_DATA_MASK;
153 ARSWITCH_UNLOCK(sc);
154
155 DPRINTF(sc, ARSWITCH_DBG_PHYIO,
156 "%s: phy=0x%08x, reg=0x%08x, ret=0x%08x\n",
157 __func__, phy, reg, data);
158
159 return (data);
160
161 fail:
162 ARSWITCH_UNLOCK(sc);
163
164 DPRINTF(sc, ARSWITCH_DBG_PHYIO,
165 "%s: phy=0x%08x, reg=0x%08x, fail; err=%d\n",
166 __func__, phy, reg, err);
167
168 return (-1);
169 }
170
171 int
arswitch_writephy_internal(device_t dev,int phy,int reg,int data)172 arswitch_writephy_internal(device_t dev, int phy, int reg, int data)
173 {
174 struct arswitch_softc *sc;
175 uint32_t ctrl;
176 int err, timeout;
177 uint32_t a;
178
179 sc = device_get_softc(dev);
180 ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
181
182 if (reg < 0 || reg >= 32)
183 return (ENXIO);
184
185 if (AR8X16_IS_SWITCH(sc, AR8327))
186 a = AR8327_REG_MDIO_CTRL;
187 else
188 a = AR8X16_REG_MDIO_CTRL;
189
190 ARSWITCH_LOCK(sc);
191 err = arswitch_writereg(dev, a,
192 AR8X16_MDIO_CTRL_BUSY |
193 AR8X16_MDIO_CTRL_MASTER_EN |
194 AR8X16_MDIO_CTRL_CMD_WRITE |
195 (phy << AR8X16_MDIO_CTRL_PHY_ADDR_SHIFT) |
196 (reg << AR8X16_MDIO_CTRL_REG_ADDR_SHIFT) |
197 (data & AR8X16_MDIO_CTRL_DATA_MASK));
198 if (err != 0)
199 goto out;
200 for (timeout = 100; timeout--; ) {
201 ctrl = arswitch_readreg(dev, a);
202 if ((ctrl & AR8X16_MDIO_CTRL_BUSY) == 0)
203 break;
204 }
205 if (timeout < 0)
206 err = EIO;
207
208 DPRINTF(sc, ARSWITCH_DBG_PHYIO,
209 "%s: phy=0x%08x, reg=0x%08x, data=0x%08x, err=%d\n",
210 __func__, phy, reg, data, err);
211
212 out:
213 DEVERR(dev, err, "arswitch_writephy()=%d: phy=%d.%02x\n", phy, reg);
214 ARSWITCH_UNLOCK(sc);
215 return (err);
216 }
217