delivered (full) in projects: linux - OpenGrok search results

Project(s)

Full Search
Definition
Symbol
File Path
History
Type

Searched full:delivered (Results 1 – 25 of 531) sorted by relevance

12 3 4 5 6 7 8 9 10 >>...22

/linux/tools/perf/pmu-events/arch/x86/broadwellx/
H A D	frontend.json	15 "PublicDescription": "This event counts Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles. These cycles do not include uops routed through because of the switch itself, for example, when Instruction Decode Queue (IDQ) pre-allocation is unavailable, or Instruction Decode Queue (IDQ) is full. SBD-to-MITE switch true penalty cycles happen after the merge mux (MM) receives Decode Stream Buffer (DSB) Sync-indication until receiving the first MITE uop. MM is placed before Instruction Decode Queue (IDQ) to merge uops being fed from the MITE and Decode Stream Buffer (DSB) paths. Decode Stream Buffer (DSB) inserts the Sync-indication whenever a Decode Stream Buffer (DSB)-to-MITE switch occurs. Penalty: A Decode Stream Buffer (DSB) hit followed by a Decode Stream Buffer (DSB) miss can cost up to six cycles in which no uops are delivered to the IDQ. Most often, such switches from the Decode Stream Buffer (DSB) to the legacy pipeline cost 02 cycles.", 52 "PublicDescription": "This event counts the number of cycles 4 uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 62 "PublicDescription": "This event counts the number of cycles uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 72 "PublicDescription": "This event counts the number of cycles 4 uops were delivered to Instruction Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also means that uops are not being delivered from the Decode Stream Buffer (DSB).", 82 "PublicDescription": "This event counts the number of cycles uops were delivered to Instruction Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also means that uops are not being delivered from the Decode Stream Buffer (DSB).", 87 "BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from Decode Stream Buffer (DSB) path", 92 "PublicDescription": "This event counts cycles during which uops are being delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 97 "BriefDescription": "Uops delivered t [all...]
/linux/tools/perf/pmu-events/arch/x86/broadwellde/
H A D	frontend.json	15 "PublicDescription": "This event counts Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles. These cycles do not include uops routed through because of the switch itself, for example, when Instruction Decode Queue (IDQ) pre-allocation is unavailable, or Instruction Decode Queue (IDQ) is full. SBD-to-MITE switch true penalty cycles happen after the merge mux (MM) receives Decode Stream Buffer (DSB) Sync-indication until receiving the first MITE uop. MM is placed before Instruction Decode Queue (IDQ) to merge uops being fed from the MITE and Decode Stream Buffer (DSB) paths. Decode Stream Buffer (DSB) inserts the Sync-indication whenever a Decode Stream Buffer (DSB)-to-MITE switch occurs. Penalty: A Decode Stream Buffer (DSB) hit followed by a Decode Stream Buffer (DSB) miss can cost up to six cycles in which no uops are delivered to the IDQ. Most often, such switches from the Decode Stream Buffer (DSB) to the legacy pipeline cost 02 cycles.", 52 "PublicDescription": "This event counts the number of cycles 4 uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 62 "PublicDescription": "This event counts the number of cycles uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 72 "PublicDescription": "This event counts the number of cycles 4 uops were delivered to Instruction Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also means that uops are not being delivered from the Decode Stream Buffer (DSB).", 82 "PublicDescription": "This event counts the number of cycles uops were delivered to Instruction Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also means that uops are not being delivered from the Decode Stream Buffer (DSB).", 87 "BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from Decode Stream Buffer (DSB) path", 92 "PublicDescription": "This event counts cycles during which uops are being delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 97 "BriefDescription": "Uops delivered t [all...]
/linux/tools/perf/pmu-events/arch/x86/broadwell/
H A D	frontend.json	15 "PublicDescription": "This event counts Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles. These cycles do not include uops routed through because of the switch itself, for example, when Instruction Decode Queue (IDQ) pre-allocation is unavailable, or Instruction Decode Queue (IDQ) is full. SBD-to-MITE switch true penalty cycles happen after the merge mux (MM) receives Decode Stream Buffer (DSB) Sync-indication until receiving the first MITE uop. MM is placed before Instruction Decode Queue (IDQ) to merge uops being fed from the MITE and Decode Stream Buffer (DSB) paths. Decode Stream Buffer (DSB) inserts the Sync-indication whenever a Decode Stream Buffer (DSB)-to-MITE switch occurs. Penalty: A Decode Stream Buffer (DSB) hit followed by a Decode Stream Buffer (DSB) miss can cost up to six cycles in which no uops are delivered to the IDQ. Most often, such switches from the Decode Stream Buffer (DSB) to the legacy pipeline cost 02 cycles.", 52 "PublicDescription": "This event counts the number of cycles 4 uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 62 "PublicDescription": "This event counts the number of cycles uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 72 "PublicDescription": "This event counts the number of cycles 4 uops were delivered to Instruction Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also means that uops are not being delivered from the Decode Stream Buffer (DSB).", 82 "PublicDescription": "This event counts the number of cycles uops were delivered to Instruction Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also means that uops are not being delivered from the Decode Stream Buffer (DSB).", 87 "BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from Decode Stream Buffer (DSB) path", 92 "PublicDescription": "This event counts cycles during which uops are being delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 97 "BriefDescription": "Uops delivered t [all...]
/linux/tools/perf/pmu-events/arch/x86/ivybridge/
H A D	frontend.json	71 "PublicDescription": "Counts cycles DSB is delivered four uops. Set Cmask = 4.", 81 "PublicDescription": "Counts cycles DSB is delivered at least one uops. Set Cmask = 1.", 91 "PublicDescription": "Counts cycles MITE is delivered four uops. Set Cmask = 4.", 101 "PublicDescription": "Counts cycles MITE is delivered at least one uops. Set Cmask = 1.", 106 …"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from D… 111 …"PublicDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from … 116 …"BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffe… 120 …"PublicDescription": "Increment each cycle. # of uops delivered to IDQ from DSB path. Set Cmask = … 134 "BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from MITE path", 138 "PublicDescription": "Number of uops delivered to IDQ from any path.", [all …]
/linux/tools/perf/pmu-events/arch/x86/ivytown/
H A D	frontend.json	71 "PublicDescription": "Counts cycles DSB is delivered four uops. Set Cmask = 4.", 81 "PublicDescription": "Counts cycles DSB is delivered at least one uops. Set Cmask = 1.", 91 "PublicDescription": "Counts cycles MITE is delivered four uops. Set Cmask = 4.", 101 "PublicDescription": "Counts cycles MITE is delivered at least one uops. Set Cmask = 1.", 106 …"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from D… 111 …"PublicDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from … 116 …"BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffe… 120 …"PublicDescription": "Increment each cycle. # of uops delivered to IDQ from DSB path. Set Cmask = … 134 "BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from MITE path", 138 "PublicDescription": "Number of uops delivered to IDQ from any path.", [all …]
/linux/tools/perf/pmu-events/arch/x86/skylake/
H A D	frontend.json	34 …Stream Buffer (DSB) miss can cost up to six cycles in which no uops are delivered to the IDQ. Most… 104 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 109 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 120 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 127 …tructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During… 132 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 143 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 161 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after the fro… 188 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 195 …tructions that are delivered to the back-end after a front-end stall of at least 32 cycles. During… [all …]
/linux/tools/perf/pmu-events/arch/x86/cascadelakex/
H A D	frontend.json	34 …Stream Buffer (DSB) miss can cost up to six cycles in which no uops are delivered to the IDQ. Most… 104 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 109 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 120 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 127 …tructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During… 132 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 143 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 161 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after the fro… 188 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 195 …tructions that are delivered to the back-end after a front-end stall of at least 32 cycles. During… [all …]
/linux/tools/perf/pmu-events/arch/x86/skylakex/
H A D	frontend.json	34 …Stream Buffer (DSB) miss can cost up to six cycles in which no uops are delivered to the IDQ. Most… 104 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 109 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 120 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 127 …tructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During… 132 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 143 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 161 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after the fro… 188 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 195 …tructions that are delivered to the back-end after a front-end stall of at least 32 cycles. During… [all …]
/linux/tools/perf/pmu-events/arch/x86/emeraldrapids/
H A D	frontend.json	99 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 104 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 110 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 115 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 121 …tructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During… 132 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 137 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 143 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 154 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after the fro… 159 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… [all …]
/linux/tools/perf/pmu-events/arch/x86/sapphirerapids/
H A D	frontend.json	99 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 104 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 110 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 115 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 121 …tructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During… 132 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 137 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 143 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 154 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after the fro… 159 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… [all …]
/linux/tools/perf/pmu-events/arch/x86/rocketlake/
H A D	frontend.json	102 "PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 1 cycle which was not interrupted by a back-end stall.", 107 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.", 113 "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.", 118 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.", 124 "PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During this period the front-end delivered no uops.", 135 "PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall.", 140 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.", 146 "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.", 157 "PublicDescription": "Counts retired instructions that are delivered t [all...]
/linux/tools/perf/pmu-events/arch/x86/tigerlake/
H A D	frontend.json	102 "PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 1 cycle which was not interrupted by a back-end stall.", 107 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.", 113 "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.", 118 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.", 124 "PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During this period the front-end delivered no uops.", 135 "PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall.", 140 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.", 146 "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.", 157 "PublicDescription": "Counts retired instructions that are delivered t [all...]
/linux/tools/perf/pmu-events/arch/x86/icelake/
H A D	frontend.json	102 "PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 1 cycle which was not interrupted by a back-end stall.", 107 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.", 113 "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.", 118 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.", 124 "PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During this period the front-end delivered no uops.", 135 "PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall.", 140 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.", 146 "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.", 157 "PublicDescription": "Counts retired instructions that are delivered t [all...]
/linux/tools/perf/pmu-events/arch/x86/graniterapids/
H A D	frontend.json	122 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 127 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 133 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 138 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 144 …tructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During… 155 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 160 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 166 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 177 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after the fro… 182 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… [all …]
/linux/tools/perf/pmu-events/arch/x86/alderlake/
H A D	frontend.json	118 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 124 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 130 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 136 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 142 …tructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During… 154 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 160 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 166 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 178 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after the fro… 184 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… [all …]
/linux/tools/perf/pmu-events/arch/x86/icelakex/
H A D	frontend.json	102 "PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 1 cycle which was not interrupted by a back-end stall.", 107 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.", 113 "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.", 118 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.", 124 "PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During this period the front-end delivered no uops.", 135 "PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall.", 140 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.", 146 "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.", 157 "PublicDescription": "Counts retired instructions that are delivered t [all...]
/linux/tools/perf/pmu-events/arch/x86/haswellx/
H A D	frontend.json	58 "PublicDescription": "Counts cycles DSB is delivered four uops. Set Cmask = 4.", 68 "PublicDescription": "Counts cycles DSB is delivered at least one uops. Set Cmask = 1.", 78 "PublicDescription": "Counts cycles MITE is delivered four uops. Set Cmask = 4.", 88 "PublicDescription": "Counts cycles MITE is delivered at least one uop. Set Cmask = 1.", 93 …"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from D… 102 …"BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffe… 106 …"PublicDescription": "Increment each cycle. # of uops delivered to IDQ from DSB path. Set Cmask = … 121 "BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from MITE path", 125 "PublicDescription": "Number of uops delivered to IDQ from any path.", 130 …"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from M… [all …]
/linux/tools/perf/pmu-events/arch/x86/haswell/
H A D	frontend.json	58 "PublicDescription": "Counts cycles DSB is delivered four uops. Set Cmask = 4.", 68 "PublicDescription": "Counts cycles DSB is delivered at least one uops. Set Cmask = 1.", 78 "PublicDescription": "Counts cycles MITE is delivered four uops. Set Cmask = 4.", 88 "PublicDescription": "Counts cycles MITE is delivered at least one uop. Set Cmask = 1.", 93 …"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from D… 102 …"BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffe… 106 …"PublicDescription": "Increment each cycle. # of uops delivered to IDQ from DSB path. Set Cmask = … 121 "BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from MITE path", 125 "PublicDescription": "Number of uops delivered to IDQ from any path.", 130 …"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from M… [all …]
/linux/tools/perf/pmu-events/arch/x86/meteorlake/
H A D	frontend.json	193 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 199 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 205 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 211 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 217 …tructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During… 229 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 235 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 241 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 253 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after the fro… 259 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… [all …]
/linux/tools/perf/pmu-events/arch/x86/pantherlake/
H A D	frontend.json	170 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 176 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 182 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 188 …tructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During… 200 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 206 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 212 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 224 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after the fro… 230 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 236 …tructions that are delivered to the back-end after a front-end stall of at least 32 cycles. During… [all …]
/linux/tools/perf/pmu-events/arch/x86/sandybridge/
H A D	frontend.json	23 …tially several cycles of instruction starvation, where no micro-ops are delivered to the back-end.… 105 …"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from D… 114 …"BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffe… 130 "BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from MITE path.", 138 …"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from M… 147 "BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from MITE path.", 155 …"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) while … 165 …n": "Cycles when uops initiated by Decode Stream Buffer (DSB) are being delivered to Instruction D… 184 …"BriefDescription": "Uops initiated by Decode Stream Buffer (DSB) that are being delivered to Inst… 192 …"BriefDescription": "Uops initiated by MITE and delivered to Instruction Decode Queue (IDQ) while … [all …]
/linux/tools/perf/pmu-events/arch/x86/jaketown/
H A D	frontend.json	23 …tially several cycles of instruction starvation, where no micro-ops are delivered to the back-end.… 105 …"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from D… 114 …"BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffe… 130 "BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from MITE path.", 138 …"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from M… 147 "BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from MITE path.", 155 …"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) while … 165 …n": "Cycles when uops initiated by Decode Stream Buffer (DSB) are being delivered to Instruction D… 184 …"BriefDescription": "Uops initiated by Decode Stream Buffer (DSB) that are being delivered to Inst… 192 …"BriefDescription": "Uops initiated by MITE and delivered to Instruction Decode Queue (IDQ) while … [all …]
/linux/tools/perf/pmu-events/arch/x86/lunarlake/
H A D	frontend.json	232 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 238 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 244 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 250 …tructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During… 262 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 268 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 274 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 286 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after the fro… 292 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 298 …tructions that are delivered to the back-end after a front-end stall of at least 32 cycles. During… [all …]
/linux/net/ipv4/
H A D	tcp_rate.c	8 * A rate sample records the rate at which the network delivered packets 16 * compression: packets can temporarily appear to be delivered much quicker 67 TCP_SKB_CB(skb)->tx.delivered = tp->delivered; in tcp_rate_skb_sent() 95 rs->prior_delivered = scb->tx.delivered; in tcp_rate_skb_delivered() 108 /* Mark off the skb delivered once it's sacked to avoid being in tcp_rate_skb_delivered() 117 void tcp_rate_gen(struct sock sk, u32 delivered, u32 lost, in tcp_rate_gen() argument 124 if (tp->app_limited && after(tp->delivered, tp->app_limited)) in tcp_rate_gen() 131 if (delivered) in tcp_rate_gen() 134 rs->acked_sacked = delivered; / freshly ACKed or SACKed */ in tcp_rate_gen() 142 rs->delivered = -1; in tcp_rate_gen() [all …]
/linux/tools/perf/pmu-events/arch/x86/arrowlake/
H A D	frontend.json	260 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 266 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 272 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 278 …tructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During… 290 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 296 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 302 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 314 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after the fro… 320 …red instructions that are fetched after an interval where the front-end delivered no uops for a pe… 326 …tructions that are delivered to the back-end after a front-end stall of at least 32 cycles. During… [all …]

12 3 4 5 6 7 8 9 10 >>...22