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/linux/arch/arm64/boot/dts/renesas/
H A Dr9a09g077.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
15 interrupt-parent = <&gic>;
17 cluster0_opp: opp-table-0 {
18 compatible = "operating-points-v2";
20 opp-600000000 {
21 opp-hz = /bits/ 64 <600000000>;
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H A Dr9a09g087.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
15 interrupt-parent = <&gic>;
17 cluster0_opp: opp-table-0 {
18 compatible = "operating-points-v2";
20 opp-600000000 {
21 opp-hz = /bits/ 64 <600000000>;
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H A Dr9a09g057.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/clock/renesas,r9a09g057-cpg.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
15 interrupt-parent = <&gic>;
17 audio_extal_clk: audio-clk {
18 compatible = "fixed-clock";
19 #clock-cells = <0>;
21 clock-frequency = <0>;
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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-beacon-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
18 reg_wl_bt: regulator-wifi-bt {
19 compatible = "regulator-fixed";
20 pinctrl-names = "default";
21 pinctrl-0 = <&pinctrl_reg_wl_bt>;
22 regulator-name = "wl-bt-pow-dwn";
23 regulator-min-microvolt = <3300000>;
24 regulator-max-microvolt = <3300000>;
26 startup-delay-us = <70000>;
27 regulator-always-on;
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/linux/arch/arm64/boot/dts/qcom/
H A Dsa8540p-ride.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include "sa8540p-pmics.dtsi"
17 compatible = "qcom,sa8540p-ride", "qcom,sa8540p";
29 stdout-path = "serial0:115200n8";
34 regulators-0 {
35 compatible = "qcom,pm8150-rpmh-regulators";
36 qcom,pmic-id = "a";
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H A Dsa8155p-adp.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
9 #include <dt-bindings/gpio/gpio.h>
16 compatible = "qcom,sa8155p-adp", "qcom,sa8155p";
24 stdout-path = "serial0:115200n8";
27 vreg_3p3: vreg-3p3-regulator {
28 compatible = "regulator-fixed";
29 regulator-name = "vreg_3p3";
30 regulator-min-microvolt = <3300000>;
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/linux/Documentation/devicetree/bindings/net/
H A Dintel,dwmac-plat.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
17 - intel,keembay-dwmac
19 - compatible
22 - $ref: snps,dwmac.yaml#
27 - items:
28 - enum:
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/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dcxgb4_dcb.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2013-2014 Chelsio Communications. All rights reserved.
56 if ((__dcb)->dcb_version == FW_PORT_DCB_VER_IEEE) \
65 CXGB4_DCB_STATE_HOST, /* we're using Host DCB (if at all) */
66 CXGB4_DCB_STATE_FW_INCOMPLETE, /* using firmware DCB, incomplete */
67 CXGB4_DCB_STATE_FW_ALLSYNCED, /* using firmware DCB, all sync'ed */
75 CXGB4_DCB_INPUT_FW_DISABLED, /* firmware DCB disabled */
76 CXGB4_DCB_INPUT_FW_ENABLED, /* firmware DCB enabled */
77 CXGB4_DCB_INPUT_FW_INCOMPLETE, /* firmware reports incomplete DCB */
82 /* Firmware DCB messages that we've received so far ...
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H A Dcxgb4_debugfs.c4 * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
57 pos -= tb->skip_first; in seq_tab_get_idx()
58 return pos >= tb->rows ? NULL : &tb->data[pos * tb->width]; in seq_tab_get_idx()
63 struct seq_tab *tb = seq->private; in seq_tab_start()
65 if (tb->skip_first && *pos == 0) in seq_tab_start()
73 v = seq_tab_get_idx(seq->private, *pos + 1); in seq_tab_next()
84 const struct seq_tab *tb = seq->private; in seq_tab_show()
86 return tb->show(seq, v, ((char *)v - tb->data) / tb->width); in seq_tab_show()
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H A Dcxgb4_main.c4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
109 /* Include PCI Device IDs for both PF4 and PF0-3 so our PCI probe() routine is
126 #define FW4_CFNAME "cxgb4/t4-config.txt"
127 #define FW5_CFNAME "cxgb4/t5-config.txt"
128 #define FW6_CFNAME "cxgb4/t6-config.txt"
144 * order MSI-X, MSI, legacy INTx interrupts. This parameter determines which
154 MODULE_PARM_DESC(msi, "whether to use INTx (0), MSI (1) or MSI-X (2)");
158 * offset by 2 bytes in order to have the IP headers line up on 4-byte
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/linux/include/uapi/linux/
H A Ddcbnl.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * Copyright (c) 2008-2011, Intel Corporation.
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
38 * @cbs: credit based shaper ets algorithm supported
50 * ----
53 * 1 credit-based shaper
55 * 3-254 reserved
94 * given in u-seconds
109 * value is given as percentage (1-100)
114 * the QCN capable hardware may add CN-TAG TLV to the
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/linux/arch/arm64/boot/dts/mediatek/
H A Dmt2712e.dtsi5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/mt2712-clk.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/memory/mt2712-larb-port.h>
12 #include <dt-bindings/phy/phy.h>
13 #include <dt-bindings/power/mt2712-power.h>
14 #include "mt2712-pinfunc.h"
18 interrupt-parent = <&sysirq>;
19 #address-cells = <2>;
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/linux/Documentation/networking/device_drivers/ethernet/intel/
H A Dice.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 2018-2021 Intel Corporation.
13 - Overview
14 - Identifying Your Adapter
15 - Important Notes
16 - Additional Features & Configurations
17 - Performance Optimization
28 This driver supports XDP (Express Data Path) and AF_XDP zero-copy. Note that
43 -------------------------------------------
54 1) Make sure that your system's physical memory is in a high-performance
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/linux/Documentation/networking/device_drivers/ethernet/stmicro/
H A Dstmmac.rst1 .. SPDX-License-Identifier: GPL-2.0+
13 - In This Release
14 - Feature List
15 - Kernel Configuration
16 - Command Line Parameters
17 - Driver Information and Notes
18 - Debug Information
19 - Support
33 (and older) and DesignWare(R) Cores Ethernet Quality-of-Service version 4.0
35 DesignWare(R) Cores XGMAC - 10G Ethernet MAC and DesignWare(R) Cores
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/linux/drivers/net/ethernet/intel/ice/devlink/
H A Ddevlink.c1 // SPDX-License-Identifier: GPL-2.0
39 put_unaligned_be64(pci_get_dsn(pf->pdev), dsn); in ice_info_get_dsn()
41 snprintf(ctx->buf, sizeof(ctx->buf), "%8phD", dsn); in ice_info_get_dsn()
46 struct ice_hw *hw = &pf->hw; in ice_info_pba()
49 status = ice_read_pba_string(hw, (u8 *)ctx->buf, sizeof(ctx->buf)); in ice_info_pba()
58 struct ice_hw *hw = &pf->hw; in ice_info_fw_mgmt()
60 snprintf(ctx->buf, sizeof(ctx->buf), "%u.%u.%u", in ice_info_fw_mgmt()
61 hw->fw_maj_ver, hw->fw_min_ver, hw->fw_patch); in ice_info_fw_mgmt()
66 struct ice_hw *hw = &pf->hw; in ice_info_fw_api()
68 snprintf(ctx->buf, sizeof(ctx->buf), "%u.%u.%u", hw->api_maj_ver, in ice_info_fw_api()
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/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x.h3 * Copyright (c) 2007-2013 Broadcom Corporation
21 #include <linux/dma-mapping.h>
37 * to break this driver due to amount of abuse of in-kernel interfaces
42 #define DRV_MODULE_VERSION "1.713.36-0"
53 #define BNX2X_MIN_MSIX_VEC_CNT(bp) ((bp)->min_msix_vec_cnt)
94 bp->dev ? (bp->dev->name) : "?", \
99 if (unlikely(bp->msg_enable & (__mask))) \
105 if (unlikely((bp->msg_enable & (__mask)) == __mask)) \
111 if (unlikely(bp->msg_enable & (__mask))) \
121 bp->dev ? (bp->dev->name) : "?", \
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H A Dbnx2x_main.c3 * Copyright (c) 2007-2013 Broadcom Corporation
36 #include <linux/dma-mapping.h>
83 #define FW_FILE_NAME_E1 "bnx2x/bnx2x-e1-" FW_FILE_VERSION ".fw"
84 #define FW_FILE_NAME_E1H "bnx2x/bnx2x-e1h-" FW_FILE_VERSION ".fw"
85 #define FW_FILE_NAME_E2 "bnx2x/bnx2x-e2-" FW_FILE_VERSION ".fw"
86 #define FW_FILE_NAME_E1_V15 "bnx2x/bnx2x-e1-" FW_FILE_VERSION_V15 ".fw"
87 #define FW_FILE_NAME_E1H_V15 "bnx2x/bnx2x-e1h-" FW_FILE_VERSION_V15 ".fw"
88 #define FW_FILE_NAME_E2_V15 "bnx2x/bnx2x-e2-" FW_FILE_VERSION_V15 ".fw"
117 MODULE_PARM_DESC(int_mode, " Force interrupt mode other than MSI-X "
124 static int mrrs = -1;
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/linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dnv50.c49 struct nvkm_device *device = pior->disp->engine.subdev.device; in nv50_pior_clock()
58 int ret = nvkm_i2c_aux_lnk_ctl(aux, pior->dp.nr, pior->dp.bw, pior->dp.ef); in nv50_pior_dp_links()
82 struct nvkm_device *device = pior->disp->engine.subdev.device; in nv50_pior_power()
96 /* GF119 moves this information to per-head methods, which is in nv50_pior_depth()
99 if (state->head && state == &ior->asy) { in nv50_pior_depth()
100 struct nvkm_head *head = nvkm_head_find(ior->disp, __ffs(state->head)); in nv50_pior_depth()
103 struct nvkm_head_state *state = &head->asy; in nv50_pior_depth()
105 case 6: state->or.depth = 30; break; in nv50_pior_depth()
106 case 5: state->or.depth = 24; break; in nv50_pior_depth()
107 case 2: state->or.depth = 18; break; in nv50_pior_depth()
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/linux/drivers/net/ethernet/intel/ice/
H A Dice_txrx.c1 // SPDX-License-Identifier: GPL-2.0
28 * ice_prgm_fdir_fltr - Program a Flow Director filter
48 return -ENOENT; in ice_prgm_fdir_fltr()
49 tx_ring = vsi->tx_rings[0]; in ice_prgm_fdir_fltr()
50 if (!tx_ring || !tx_ring->desc) in ice_prgm_fdir_fltr()
51 return -ENOENT; in ice_prgm_fdir_fltr()
52 dev = tx_ring->dev; in ice_prgm_fdir_fltr()
55 for (i = ICE_FDIR_CLEAN_DELAY; ICE_DESC_UNUSED(tx_ring) < 2; i--) { in ice_prgm_fdir_fltr()
57 return -EAGAIN; in ice_prgm_fdir_fltr()
65 return -EINVAL; in ice_prgm_fdir_fltr()
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H A Dice_lib.c1 // SPDX-License-Identifier: GPL-2.0
14 * ice_vsi_type_str - maps VSI type enum to string equivalents
38 * ice_vsi_ctrl_all_rx_rings - Start or stop a VSI's Rx rings
55 ice_flush(&vsi->back->hw); in ice_vsi_ctrl_all_rx_rings()
67 * ice_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the VSI
75 struct ice_pf *pf = vsi->back; in ice_vsi_alloc_arrays()
79 if (vsi->type == ICE_VSI_CHNL) in ice_vsi_alloc_arrays()
83 vsi->tx_rings = devm_kcalloc(dev, vsi->alloc_txq, in ice_vsi_alloc_arrays()
84 sizeof(*vsi->tx_rings), GFP_KERNEL); in ice_vsi_alloc_arrays()
85 if (!vsi->tx_rings) in ice_vsi_alloc_arrays()
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/linux/drivers/net/ethernet/wangxun/libwx/
H A Dwx_type.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2015 - 2022 Beijing WangXun Technology Co., Ltd. */
21 /* MSI-X capability fields masks */
445 #define WX_PX_TR_CFG_SWFLSH BIT(26) /* Tx Desc. wr-bk flushing */
513 #define WX_BT2KB(BT) (((BT) + (8 * 1024 - 1)) / (8 * 1024))
554 #define VMDQ_P(p) ((p) + wx->ring_feature[RING_F_VMDQ].offset)
623 /* Packet type non-ip values */
652 ((le32_to_cpu((_rxd)->wb.lower.lo_dword.data) >> 9) & 0xFF)
804 u8 buf_lenh_status; /* 7-5: high bits of buf_len, 4-0: status */
941 #define WX_CB(skb) ((struct wx_cb *)(skb)->cb)
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/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_resource.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
96 dc->ctx->logger
100 #define UNABLE_TO_SPLIT -1
105 …struct pipe_topology_snapshot *current_snapshot = &dc->debug_data.topology_history.snapshots[dc->d… in capture_pipe_topology_data()
107 if (current_snapshot->line_count >= MAX_PIPES) in capture_pipe_topology_data()
110 current_snapshot->pipe_log_lines[current_snapshot->line_count].is_phantom_pipe = is_phantom_pipe; in capture_pipe_topology_data()
111 current_snapshot->pipe_log_lines[current_snapshot->line_count].plane_idx = plane_idx; in capture_pipe_topology_data()
112 current_snapshot->pipe_log_lines[current_snapshot->line_count].slice_idx = slice_idx; in capture_pipe_topology_data()
113 current_snapshot->pipe_log_lines[current_snapshot->line_count].stream_idx = stream_idx; in capture_pipe_topology_data()
114 current_snapshot->pipe_log_lines[current_snapshot->line_count].dpp_inst = dpp_inst; in capture_pipe_topology_data()
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/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_main.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2024 Intel Corporation. */
66 "Copyright (c) 1999-2016 Intel Corporation.";
82 /* ixgbe_pci_tbl - PCI Device ID Table
162 …"Maximum number of virtual functions to allocate per physical function - default is zero and maxim…
168 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
171 static int debug = -1;
193 return dev && (dev->netdev_ops == &ixgbe_netdev_ops); in netif_is_ixgbe()
202 parent_bus = adapter->pdev->bus->parent; in ixgbe_read_pci_cfg_word_parent()
204 return -1; in ixgbe_read_pci_cfg_word_parent()
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