Lines Matching +full:dcb +full:- +full:algorithm

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
17           - intel,keembay-dwmac
19     - compatible
22   - $ref: snps,dwmac.yaml#
27       - items:
28           - enum:
29               - intel,keembay-dwmac
30           - const: snps,dwmac-4.10a
34       - description: GMAC main clock
35       - description: PTP reference clock
36       - description: Tx clock
38   clock-names:
40       - const: stmmaceth
41       - const: ptp_ref
42       - const: tx_clk
45   - compatible
46   - clocks
47   - clock-names
54   - |
55     #include <dt-bindings/interrupt-controller/arm-gic.h>
56     #include <dt-bindings/interrupt-controller/irq.h>
61     stmmac_axi_setup: stmmac-axi-config {
68     mtl_rx_setup: rx-queues-config {
69         snps,rx-queues-to-use = <2>;
70         snps,rx-sched-sp;
72             snps,dcb-algorithm;
73             snps,map-to-dma-channel = <0x0>;
78             snps,dcb-algorithm;
79             snps,map-to-dma-channel = <0x1>;
84     mtl_tx_setup: tx-queues-config {
85         snps,tx-queues-to-use = <2>;
86         snps,tx-sched-wrr;
89            snps,dcb-algorithm;
95             snps,dcb-algorithm;
101         compatible = "intel,keembay-dwmac", "snps,dwmac-4.10a";
103         interrupt-names = "macirq";
105         snps,perfect-filter-entries = <128>;
106         phy-handle = <&eth_phy0>;
107         phy-mode = "rgmii";
108         rx-fifo-depth = <4096>;
109         tx-fifo-depth = <4096>;
110         clock-names = "stmmaceth", "ptp_ref", "tx_clk";
115         snps,axi-config = <&stmmac_axi_setup>;
116         snps,mtl-rx-config = <&mtl_rx_setup>;
117         snps,mtl-tx-config = <&mtl_tx_setup>;
121             #address-cells = <1>;
122             #size-cells = <0>;
123             compatible = "snps,dwmac-mdio";
125             ethernet-phy@0 {