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/linux/drivers/media/platform/via/
H A Dvia-camera.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 #define VCR_IC_EAV 0x0001 /* End of active video status */
8 #define VCR_IC_FBOTFLD 0x0004 /* "flipping" Bottom field is active */
9 #define VCR_IC_ACTBUF 0x0018 /* Active video buffer */
10 #define VCR_IC_VSYNC 0x0020 /* 0 = VB, 1 = active video */
11 #define VCR_IC_BOTFLD 0x0040 /* Bottom field is active */
13 #define VCR_IC_INTEN 0x0100 /* End of active video int. enable */
14 #define VCR_IC_VBIINT 0x0200 /* End of VBI int enable */
18 #define VCR_TSC_ENABLE 0x000001 /* Transport stream input enable */
20 #define VCR_TSC_METHOD 0x00000c /* DMA method (non-functional) */
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/linux/Documentation/devicetree/bindings/display/panel/
H A Dpanel-timing.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-timing.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Sam Ravnborg <sam@ravnborg.org>
14 There are different ways of describing the timing data of a panel. The
20 +-------+----------+-------------------------------------+----------+
24 +-------+----------+-------------------------------------+----------+
28 +-------+----------#######################################----------+
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/linux/arch/arm/mach-pxa/
H A Dpxa27x-udc.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include "pxa-regs.h"
12 #define UDCCR_OEN (1 << 31) /* On-the-Go Enable */
13 #define UDCCR_AALTHNP (1 << 30) /* A-device Alternate Host Negotiation
15 #define UDCCR_AHNP (1 << 29) /* A-device Host Negotiation Protocol
17 #define UDCCR_BHNP (1 << 28) /* B-device Host Negotiation Protocol
18 Enable */
19 #define UDCCR_DWRE (1 << 16) /* Device Remote Wake-up Enable */
20 #define UDCCR_ACN (0x03 << 11) /* Active UDC configuration Number */
22 #define UDCCR_AIN (0x07 << 8) /* Active UDC interface Number */
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/linux/Documentation/wmi/devices/
H A Dlenovo-wmi-gamezone.rst1 .. SPDX-License-Identifier: GPL-2.0-or-later
4 Lenovo WMI Interface Gamezone Driver (lenovo-wmi-gamezone)
12 and data block GUIDs that provide context for the various methods.
14 Gamezone Data
15 -------------
17 WMI GUID ``887B54E3-DDDC-4B2C-8B88-68A26A8835D0``
19 The Gamezone Data WMI interface provides platform-profile and fan curve
25 - low-power
26 - balanced
27 - balanced-performance
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/linux/drivers/media/platform/ti/omap3isp/
H A Domap3isp.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * TI OMAP3 ISP - Bus Configuration
25 * struct isp_parallel_cfg - Parallel interface configuration
26 * @data_lane_shift: Data lane shifter
27 * 0 - CAMEXT[13:0] -> CAM[13:0]
28 * 2 - CAMEXT[13:2] -> CAM[11:0]
29 * 4 - CAMEXT[13:4] -> CAM[9:0]
30 * 6 - CAMEXT[13:6] -> CAM[7:0]
32 * 0 - Sample on rising edge, 1 - Sample on falling edge
34 * 0 - Active high, 1 - Active low
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H A Disppreview.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * TI OMAP3 ISP driver - Preview module
26 { /* RGB-RGB Matrix */
38 {-38, -75, 112},
39 {112, -94 , -18}
85 * -------------------------------------------------------------
125 * Default Gamma Correction Table - All components
146 * preview_config_luma_enhancement - Configure the Luminance Enhancement table
153 const struct omap3isp_prev_luma *yt = &params->luma; in preview_config_luma_enhancement()
159 isp_reg_writel(isp, yt->table[i], in preview_config_luma_enhancement()
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/linux/Documentation/devicetree/bindings/serial/
H A Drs485.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 direction for the built-in half-duplex mode. The properties described
11 hereafter shall be given to a half-duplex capable UART node.
14 - Rob Herring <robh@kernel.org>
17 rs485-rts-delay:
18 description: prop-encoded-array <a b>
19 $ref: /schemas/types.yaml#/definitions/uint32-array
21 - description: Delay between rts signal and beginning of data sent in
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/linux/drivers/media/i2c/
H A Dtvp5150_reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * tvp5150 - Texas Instruments TVP5150A/AM1 video decoder registers
33 #define TVP5150_DATA_RATE_SEL 0x0d /* Outputs and data rates select */
39 #define TVP5150_ACT_VD_CROP_ST_MSB 0x11 /* Active video cropping start MSB */
40 #define TVP5150_ACT_VD_CROP_ST_LSB 0x12 /* Active video cropping start LSB */
41 #define TVP5150_ACT_VD_CROP_STP_MSB 0x13 /* Active video cropping stop MSB */
42 #define TVP5150_ACT_VD_CROP_STP_LSB 0x14 /* Active video cropping stop LSB */
53 #define TVP5150_INT_ENABLE_REG_B 0x1d /* Interrupt enable register B */
56 /* Reserved 1Fh-27h */
75 /* Reserved 29h-2bh */
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/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dst,stm32-fmc2-ebi-props.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/st,stm32-fmc2-ebi-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christophe Kerello <christophe.kerello@foss.st.com>
11 - Marek Vasut <marex@denx.de>
14 st,fmc2-ebi-cs-transaction-type:
33 st,fmc2-ebi-cs-cclk-enable:
34 description: Continuous clock enable (first bank must be configured
40 st,fmc2-ebi-cs-mux-enable:
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/linux/drivers/net/phy/
H A Ddp83640_reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 #define PTP_TDR 0x0015 /* PTP Time Data Register */
20 #define PTP_TXTS 0x001c /* PTP Transmit Timestamp Register, in four 16-bit reads */
21 #define PTP_RXTS 0x001d /* PTP Receive Timestamp Register, in six? 16-bit reads */
23 #define PTP_EDATA 0x001f /* PTP Event Data Register */
54 #define BC_WRITE (1<<11) /* Broadcast Write Enable */
60 #define TRIG_EN (1<<8) /* Enable PTP Trigger */
66 #define PTP_ENABLE (1<<2) /* Enable PTP Clock */
75 #define TXTS_IE (1<<3) /* Transmit Timestamp Interrupt Enable */
76 #define RXTS_IE (1<<2) /* Receive Timestamp Interrupt Enable */
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx53-tx53-x13x.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
3 * Copyright 2013-2017 Lothar Waßmann <LW@KARO-electronics.de>
6 /dts-v1/;
7 #include "imx53-tx53.dtsi"
8 #include <dt-bindings/input/input.h>
11 model = "Ka-Ro electronics TX53 module (LVDS)";
21 compatible = "pwm-backlight";
23 power-supply = <&reg_3v3>;
24 brightness-levels = <
37 default-brightness-level = <50>;
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/linux/drivers/usb/gadget/udc/
H A Dpxa27x_udc.h1 // SPDX-License-Identifier: GPL-2.0+
4 * Intel PXA27x on-chip full speed USB device controller
28 #define UDCOTGICR 0x0018 /* UDC On-The-Go interrupt control */
33 #define UDCDRn(x) (0x0300 + ((x)<<2)) /* UDC Data Register */
36 #define UDCCR_OEN (1 << 31) /* On-the-Go Enable */
37 #define UDCCR_AALTHNP (1 << 30) /* A-device Alternate Host Negotiation
39 #define UDCCR_AHNP (1 << 29) /* A-device Host Negotiation Protocol
41 #define UDCCR_BHNP (1 << 28) /* B-device Host Negotiation Protocol
42 Enable */
43 #define UDCCR_DWRE (1 << 16) /* Device Remote Wake-up Enable */
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/linux/drivers/scsi/
H A Dfdomain.h1 /* SPDX-License-Identifier: GPL-2.0 */
16 #define REG_SCSI_DATA 0 /* R/W: SCSI Data (with ACK) */
21 #define BSTAT_CMD BIT(3) /* Command/Data */
32 #define BCTL_CMD BIT(5) /* Command/Data */
34 #define BCTL_BUSEN BIT(7) /* Enable bus drivers */
36 #define ASTAT_IRQ BIT(0) /* Interrupt active */
50 #define REG_FSTAT 3 /* R: Adapter Status 2 (FIFO) - (@) */
55 #define REG_MCTL 3 /* W: SCSI Data Mode Control */
57 #define MCTL_ACTDEASS BIT(4) /* Active deassert of REQ and ACK */
58 #define MCTL_TARGET BIT(5) /* Enable target mode */
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/linux/drivers/video/backlight/
H A Dpwm_bl.c1 // SPDX-License-Identifier: GPL-2.0-only
43 if (pb->enabled) in pwm_backlight_power_on()
46 if (pb->power_supply) { in pwm_backlight_power_on()
47 err = regulator_enable(pb->power_supply); in pwm_backlight_power_on()
49 dev_err(pb->dev, "failed to enable power supply\n"); in pwm_backlight_power_on()
52 if (pb->post_pwm_on_delay) in pwm_backlight_power_on()
53 msleep(pb->post_pwm_on_delay); in pwm_backlight_power_on()
55 gpiod_set_value_cansleep(pb->enable_gpio, 1); in pwm_backlight_power_on()
57 pb->enabled = true; in pwm_backlight_power_on()
62 if (!pb->enabled) in pwm_backlight_power_off()
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/linux/drivers/irqchip/
H A Dqcom-pdc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
47 #define pin_to_hwirq(r, p) ((r)->parent_base + (p) - (r)->pin_base)
72 static void pdc_x1e_irq_enable_write(u32 bank, u32 enable) in pdc_x1e_irq_enable_write() argument
79 /* Use previous DRV (client) region and shift to bank 3-4 */ in pdc_x1e_irq_enable_write()
84 /* Use our own region and shift to bank 0-2 */ in pdc_x1e_irq_enable_write()
86 bank -= 2; in pdc_x1e_irq_enable_write()
97 pdc_base_reg_write(base, IRQ_ENABLE_BANK, bank, enable); in pdc_x1e_irq_enable_write()
102 unsigned long enable; in __pdc_enable_intr() local
110 enable = pdc_reg_read(IRQ_ENABLE_BANK, index); in __pdc_enable_intr()
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/linux/drivers/gpu/drm/meson/
H A Dmeson_dw_mipi_dsi.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 /* Top-level registers */
33 * 1=Enable IP's edpihalt signal to suspend VencL;
35 * [2] RW clock_freerun: Apply to auto-clock gate only. Default 0.
36 * 0=Default, use auto-clock gating to save power;
37 * 1=use free-run clock, disable auto-clock gating, for debug mode.
39 * have auto-clock gating. 1=Enable pixclk. Default 0.
41 * have auto-clock gating. 1=Enable sysclk. Default 0.
50 * 0=16-bit RGB565 config 1;
51 * 1=16-bit RGB565 config 2;
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/linux/arch/mips/include/asm/sgi/
H A Dhpc3.h20 u32 pbuf; /* physical address of data buffer */
40 u32 _unused0[0x1000/4 - 2]; /* padding */
46 #define HPC3_PDMACTRL_ISACT 0x00000002 /* channel active */
50 #define HPC3_PDMACTRL_FLSH 0x00000008 /* enable flush for receive DMA */
52 #define HPC3_PDMACTRL_LD 0x00000020 /* load enable for ACT */
54 #define HPC3_PDMACTRL_HW 0x0000ff00 /* DMA High-water mark */
58 u32 _unused1[0x1000/4 - 1]; /* padding */
65 u32 _unused0[0x1000/4 - 2]; /* padding */
76 #define HPC3_SCTRL_ACTIVE 0x10 /* SCSI DMA channel is active */
77 #define HPC3_SCTRL_AMASK 0x20 /* DMA active inhibits PIO */
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/linux/sound/aoa/soundbus/i2sbus/
H A Di2sbus.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * i2sbus driver -- private definitions
41 active:1; /* is this stream active? */ member
68 /* info about currently active substreams */
78 struct pmf_function *enable, member
85 /* spinlock for low-level interrupt locking */
87 /* mutex for high-level consistency */
97 struct codec_info *ci, void *data);
99 i2sbus_detach_codec(struct soundbus_dev *dev, void *data);
120 int enable);
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/linux/Documentation/devicetree/bindings/serio/
H A Dps2-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serio/ps2-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Danilo Krummrich <danilokrummrich@dk-develop.de>
14 const: ps2-gpio
16 data-gpios:
18 the gpio used for the data signal - this should be flagged as
19 active high using open drain with (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)
20 from <dt-bindings/gpio/gpio.h> since the signal is open drain by
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/linux/include/linux/
H A Di2c-of-prober.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
18 * struct i2c_of_probe_ops - I2C OF component prober callbacks
34 * @enable: Retrieve and enable resources so that the components respond to probes.
36 * It is OK for this callback to return -EPROBE_DEFER since the intended use includes
40 int (*enable)(struct device *dev, struct device_node *bus_node, void *data); member
50 void (*cleanup_early)(struct device *dev, void *data);
53 * @cleanup: Opposite of @enable to balance refcounts and free resources after probing.
57 void (*cleanup)(struct device *dev, void *data);
61 * struct i2c_of_probe_cfg - I2C OF component prober configuration
78 * with a 6-pin ribbon cable. That gives at most one voltage supply and one
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/linux/drivers/video/fbdev/
H A Dpxa3xx-regs.h1 /* SPDX-License-Identifier: GPL-2.0 */
57 #define LCCR0_ENB (1 << 0) /* LCD Controller enable */
69 #define LCCR0_PAS (1 << 7) /* Passive/Active display Select */
71 #define LCCR0_Act (LCCR0_PAS*1) /* Active display (TFT) */
72 #define LCCR0_DPD (1 << 9) /* Double Pixel Data (monochrome) */
73 #define LCCR0_4PixMono (LCCR0_DPD*0) /* 4-Pixel/clock Monochrome display */
74 #define LCCR0_8PixMono (LCCR0_DPD*1) /* 8-Pixel/clock Monochrome display */
90 #define LCCR1_PPL Fld (10, 0) /* Pixels Per Line - 1 */
91 #define LCCR1_DisWdth(Pixel) (((Pixel) - 1) << FShft (LCCR1_PPL))
94 #define LCCR1_HorSnchWdth(Tpix) (((Tpix) - 1) << FShft (LCCR1_HSW))
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/linux/arch/arm64/boot/dts/rockchip/
H A Drk3568-radxa-e25.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
4 #include "rk3568-radxa-cm3i.dtsi"
14 pwm-leds {
15 compatible = "pwm-leds-multicolor";
17 multi-led {
20 max-brightness = <255>;
22 led-red {
27 led-green {
32 led-blue {
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/linux/Documentation/devicetree/bindings/media/
H A Drenesas,vin.yaml1 # SPDX-License-Identifier: GPL-2.0-only
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Renesas R-Car Video Input (VIN)
11 - Niklas Söderlund <niklas.soderlund@ragnatech.se>
14 The R-Car Video Input (VIN) device provides video input capabilities for the
15 Renesas R-Car family of devices.
20 on Gen3 and RZ/G2 platforms to a CSI-2 receiver.
25 - items:
26 - enum:
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/linux/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * FILE SA-1100.h
9 * System StrongARM SA-1100
12 * SA-1100 microprocessor (Advanced RISC Machine (ARM)
14 * StrongARM SA-1100 data sheet version 2.2.
21 #error You must include hardware.h not SA-1100.h
91 * Controller (UDC) Control/Status register end-point 0
94 * Controller (UDC) Control/Status register end-point 1
97 * Controller (UDC) Control/Status register end-point 2
100 * Controller (UDC) Data register end-point 0
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/linux/arch/mips/cavium-octeon/executive/
H A Dcvmx-spi.c7 * Copyright (c) 2003-2008 Cavium Networks
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
34 #include <asm/octeon/cvmx-config.h>
36 #include <asm/octeon/cvmx-pko.h>
37 #include <asm/octeon/cvmx-spi.h>
39 #include <asm/octeon/cvmx-spxx-defs.h>
40 #include <asm/octeon/cvmx-stxx-defs.h>
41 #include <asm/octeon/cvmx-srxx-defs.h>
97 * can operate as a full duplex (both Tx and Rx data paths
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