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Searched +full:da830 +full:- +full:timer (Results 1 – 14 of 14) sorted by relevance

/linux/Documentation/devicetree/bindings/timer/
H A Dti,da830-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/ti,da830-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI DaVinci Timer
10 - Kousik Sanagavarapu <five231003@gmail.com>
13 This is a 64-bit timer found on TI's DaVinci architecture devices. The timer
14 can be configured as a general-purpose 64-bit timer, dual general-purpose
15 32-bit timers. When configured as dual 32-bit timers, each half can operate
18 The timer is a free running up-counter and can generate interrupts when the
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/linux/arch/arm/mach-davinci/
H A Dda830.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * TI DA830/OMAP L137 chip specific setup
9 #include <linux/clk-provider.h>
14 #include <linux/irqchip/irq-davinci-cp-intc.h>
16 #include <clocksource/timer-davinci.h>
26 /* Offsets of the 8 compare registers on the da830 */
46 MUX_CFG(DA830, GPIO7_14, 0, 0, 0xf, 1, false)
47 MUX_CFG(DA830, RTCK, 0, 0, 0xf, 8, false)
48 MUX_CFG(DA830, GPIO7_15, 0, 4, 0xf, 1, false)
49 MUX_CFG(DA830, EMU_0, 0, 4, 0xf, 8, false)
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H A Dda850.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * TI DA850/OMAP-L138 chip specific setup
5 * Copyright (C) 2009 Texas Instruments Incorporated - https://www.ti.com/
7 * Derived from: arch/arm/mach-davinci/da830.c
16 #include <linux/mfd/da8xx-cfgchip.h>
20 #include <clocksource/timer-davinci.h>
275 .name = "da850/omap-l138",
282 .name = "da850/omap-l138/am18x",
299 .id = -1,
323 .id = -1,
/linux/Documentation/devicetree/bindings/rtc/
H A Drtc-omap.txt4 - compatible:
5 - "ti,da830-rtc" - for RTC IP used similar to that on DA8xx SoC family.
6 - "ti,am3352-rtc" - for RTC IP used similar to that on AM335x SoC family.
7 This RTC IP has special WAKE-EN Register to enable
11 - "ti,am4372-rtc" - for RTC IP used similar to that on AM437X SoC family.
12 - reg: Address range of rtc register set
13 - interrupts: rtc timer, alarm interrupts in order
16 - system-power-controller: whether the rtc is controlling the system power
18 - clocks: Any internal or external clocks feeding in to rtc
19 - clock-names: Corresponding names of the clocks
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/linux/arch/arm/boot/dts/ti/davinci/
H A Dda850.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/interrupt-controller/irq.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
20 #address-cells = <1>;
21 #size-cells = <0>;
24 compatible = "arm,arm926ej-s";
28 operating-points-v2 = <&opp_table>;
32 opp_table: opp-table {
33 compatible = "operating-points-v2";
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/linux/drivers/clocksource/
H A Dtimer-davinci.c1 // SPDX-License-Identifier: GPL-2.0-only
20 #include <clocksource/timer-davinci.h>
76 return readl_relaxed(clockevent->base + reg); in davinci_clockevent_read()
82 writel_relaxed(val, clockevent->base + reg); in davinci_clockevent_write()
92 * This function is only ever called if we're using both timer in davinci_tim12_shutdown()
121 davinci_tim12_shutdown(clockevent->base); in davinci_clockevent_shutdown()
132 davinci_tim12_set_oneshot(clockevent->base); in davinci_clockevent_set_oneshot()
163 clockevent->cmp_off, curr_time + cycles); in davinci_clockevent_set_next_event_cmp()
172 if (!clockevent_state_oneshot(&clockevent->dev)) in davinci_timer_irq_timer()
173 davinci_tim12_shutdown(clockevent->base); in davinci_timer_irq_timer()
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/linux/include/clocksource/
H A Dtimer-davinci.h1 /* SPDX-License-Identifier: GPL-2.0-only */
22 * struct davinci_timer_cfg - davinci clocksource driver configuration struct
25 * @cmp_off: if set - it specifies the compare register used for clockevent
32 * This is only used by da830 the DSP of which uses the top half. The timer
33 * driver still configures the top half to run in free-run mode.
/linux/arch/arm/boot/dts/ti/keystone/
H A Dkeystone.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/gpio/gpio.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
14 interrupt-parent = <&gic>;
30 gic: interrupt-controller@2561000 {
31 compatible = "arm,gic-400", "arm,cortex-a15-gic";
32 #interrupt-cells = <3>;
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H A Dkeystone-k2g.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/pinctrl/keystone.h>
10 #include <dt-bindings/gpio/gpio.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
32 #address-cells = <1>;
33 #size-cells = <0>;
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/linux/sound/soc/ti/
H A Ddavinci-evm.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/timer.h>
22 #include <asm/mach-types.h>
32 struct snd_soc_card *soc_card = rtd->card; in evm_startup()
36 if (drvdata->mclk) in evm_startup()
37 return clk_prepare_enable(drvdata->mclk); in evm_startup()
45 struct snd_soc_card *soc_card = rtd->card; in evm_shutdown()
49 clk_disable_unprepare(drvdata->mclk); in evm_shutdown()
58 struct snd_soc_card *soc_card = rtd->card; in evm_hw_params()
61 snd_soc_card_get_drvdata(soc_card))->sysclk; in evm_hw_params()
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/linux/arch/arm/boot/dts/ti/omap/
H A Ddm816x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <dt-bindings/bus/ti-sysc.h>
4 #include <dt-bindings/clock/dm816.h>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/omap.h>
10 interrupt-parent = <&intc>;
11 #address-cells = <1>;
12 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
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H A Ddm814x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <dt-bindings/bus/ti-sysc.h>
4 #include <dt-bindings/clock/dm814.h>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/dm814x.h>
10 interrupt-parent = <&intc>;
11 #address-cells = <1>;
12 #size-cells = <1>;
30 #address-cells = <1>;
31 #size-cells = <0>;
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H A Dam33xx-l4.dtsi2 compatible = "ti,am33xx-l4-wkup", "simple-pm-bus";
3 power-domains = <&prm_wkup>;
5 clock-names = "fck";
10 reg-names = "ap", "la", "ia0", "ia1";
11 #address-cells = <1>;
12 #size-cells = <1>;
18 compatible = "simple-pm-bus";
19 #address-cells = <1>;
20 #size-cells = <1>;
28 compatible = "simple-pm-bus";
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/linux/drivers/rtc/
H A Drtc-omap.c1 // SPDX-License-Identifier: GPL-2.0+
23 #include <linux/pinctrl/pinconf-generic.h>
28 #include <linux/rtc/rtc-omap.h>
32 * with century-range alarm matching, driven by the 32kHz clock.
34 * The main user-visible ways it differs from PC RTCs are by omitting
35 * "don't care" alarm fields and sub-second periodic IRQs, and having
38 * Board-specific wiring options include using split power mode with
41 * low power modes) for OMAP1 boards (OMAP-L138 has this built into
42 * the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment.
157 return readb(rtc->base + reg); in rtc_read()
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