1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only 2*724ba675SRob Herring 3*724ba675SRob Herring#include <dt-bindings/bus/ti-sysc.h> 4*724ba675SRob Herring#include <dt-bindings/clock/dm814.h> 5*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 6*724ba675SRob Herring#include <dt-bindings/pinctrl/dm814x.h> 7*724ba675SRob Herring 8*724ba675SRob Herring/ { 9*724ba675SRob Herring compatible = "ti,dm814"; 10*724ba675SRob Herring interrupt-parent = <&intc>; 11*724ba675SRob Herring #address-cells = <1>; 12*724ba675SRob Herring #size-cells = <1>; 13*724ba675SRob Herring chosen { }; 14*724ba675SRob Herring 15*724ba675SRob Herring aliases { 16*724ba675SRob Herring i2c0 = &i2c1; 17*724ba675SRob Herring i2c1 = &i2c2; 18*724ba675SRob Herring serial0 = &uart1; 19*724ba675SRob Herring serial1 = &uart2; 20*724ba675SRob Herring serial2 = &uart3; 21*724ba675SRob Herring ethernet0 = &cpsw_emac0; 22*724ba675SRob Herring ethernet1 = &cpsw_emac1; 23*724ba675SRob Herring usb0 = &usb0; 24*724ba675SRob Herring usb1 = &usb1; 25*724ba675SRob Herring phy0 = &usb0_phy; 26*724ba675SRob Herring phy1 = &usb1_phy; 27*724ba675SRob Herring }; 28*724ba675SRob Herring 29*724ba675SRob Herring cpus { 30*724ba675SRob Herring #address-cells = <1>; 31*724ba675SRob Herring #size-cells = <0>; 32*724ba675SRob Herring cpu@0 { 33*724ba675SRob Herring compatible = "arm,cortex-a8"; 34*724ba675SRob Herring device_type = "cpu"; 35*724ba675SRob Herring reg = <0>; 36*724ba675SRob Herring }; 37*724ba675SRob Herring }; 38*724ba675SRob Herring 39*724ba675SRob Herring pmu { 40*724ba675SRob Herring compatible = "arm,cortex-a8-pmu"; 41*724ba675SRob Herring interrupts = <3>; 42*724ba675SRob Herring }; 43*724ba675SRob Herring 44*724ba675SRob Herring /* 45*724ba675SRob Herring * The soc node represents the soc top level view. It is used for IPs 46*724ba675SRob Herring * that are not memory mapped in the MPU view or for the MPU itself. 47*724ba675SRob Herring */ 48*724ba675SRob Herring soc { 49*724ba675SRob Herring compatible = "ti,omap-infra"; 50*724ba675SRob Herring mpu { 51*724ba675SRob Herring compatible = "ti,omap3-mpu"; 52*724ba675SRob Herring ti,hwmods = "mpu"; 53*724ba675SRob Herring }; 54*724ba675SRob Herring }; 55*724ba675SRob Herring 56*724ba675SRob Herring ocp { 57*724ba675SRob Herring compatible = "simple-bus"; 58*724ba675SRob Herring #address-cells = <1>; 59*724ba675SRob Herring #size-cells = <1>; 60*724ba675SRob Herring ranges; 61*724ba675SRob Herring ti,hwmods = "l3_main"; 62*724ba675SRob Herring 63*724ba675SRob Herring usb: usb@47400000 { 64*724ba675SRob Herring compatible = "ti,am33xx-usb"; 65*724ba675SRob Herring reg = <0x47400000 0x1000>; 66*724ba675SRob Herring ranges; 67*724ba675SRob Herring #address-cells = <1>; 68*724ba675SRob Herring #size-cells = <1>; 69*724ba675SRob Herring ti,hwmods = "usb_otg_hs"; 70*724ba675SRob Herring 71*724ba675SRob Herring usb0_phy: usb-phy@47401300 { 72*724ba675SRob Herring compatible = "ti,am335x-usb-phy"; 73*724ba675SRob Herring reg = <0x47401300 0x100>; 74*724ba675SRob Herring reg-names = "phy"; 75*724ba675SRob Herring ti,ctrl_mod = <&usb_ctrl_mod>; 76*724ba675SRob Herring #phy-cells = <0>; 77*724ba675SRob Herring }; 78*724ba675SRob Herring 79*724ba675SRob Herring usb0: usb@47401000 { 80*724ba675SRob Herring compatible = "ti,musb-am33xx"; 81*724ba675SRob Herring reg = <0x47401400 0x400 82*724ba675SRob Herring 0x47401000 0x200>; 83*724ba675SRob Herring reg-names = "mc", "control"; 84*724ba675SRob Herring 85*724ba675SRob Herring interrupts = <18>; 86*724ba675SRob Herring interrupt-names = "mc"; 87*724ba675SRob Herring dr_mode = "otg"; 88*724ba675SRob Herring mentor,multipoint = <1>; 89*724ba675SRob Herring mentor,num-eps = <16>; 90*724ba675SRob Herring mentor,ram-bits = <12>; 91*724ba675SRob Herring mentor,power = <500>; 92*724ba675SRob Herring phys = <&usb0_phy>; 93*724ba675SRob Herring 94*724ba675SRob Herring dmas = <&cppi41dma 0 0 &cppi41dma 1 0 95*724ba675SRob Herring &cppi41dma 2 0 &cppi41dma 3 0 96*724ba675SRob Herring &cppi41dma 4 0 &cppi41dma 5 0 97*724ba675SRob Herring &cppi41dma 6 0 &cppi41dma 7 0 98*724ba675SRob Herring &cppi41dma 8 0 &cppi41dma 9 0 99*724ba675SRob Herring &cppi41dma 10 0 &cppi41dma 11 0 100*724ba675SRob Herring &cppi41dma 12 0 &cppi41dma 13 0 101*724ba675SRob Herring &cppi41dma 14 0 &cppi41dma 0 1 102*724ba675SRob Herring &cppi41dma 1 1 &cppi41dma 2 1 103*724ba675SRob Herring &cppi41dma 3 1 &cppi41dma 4 1 104*724ba675SRob Herring &cppi41dma 5 1 &cppi41dma 6 1 105*724ba675SRob Herring &cppi41dma 7 1 &cppi41dma 8 1 106*724ba675SRob Herring &cppi41dma 9 1 &cppi41dma 10 1 107*724ba675SRob Herring &cppi41dma 11 1 &cppi41dma 12 1 108*724ba675SRob Herring &cppi41dma 13 1 &cppi41dma 14 1>; 109*724ba675SRob Herring dma-names = 110*724ba675SRob Herring "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", 111*724ba675SRob Herring "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", 112*724ba675SRob Herring "rx14", "rx15", 113*724ba675SRob Herring "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", 114*724ba675SRob Herring "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", 115*724ba675SRob Herring "tx14", "tx15"; 116*724ba675SRob Herring }; 117*724ba675SRob Herring 118*724ba675SRob Herring usb1: usb@47401800 { 119*724ba675SRob Herring compatible = "ti,musb-am33xx"; 120*724ba675SRob Herring reg = <0x47401c00 0x400 121*724ba675SRob Herring 0x47401800 0x200>; 122*724ba675SRob Herring reg-names = "mc", "control"; 123*724ba675SRob Herring interrupts = <19>; 124*724ba675SRob Herring interrupt-names = "mc"; 125*724ba675SRob Herring dr_mode = "otg"; 126*724ba675SRob Herring mentor,multipoint = <1>; 127*724ba675SRob Herring mentor,num-eps = <16>; 128*724ba675SRob Herring mentor,ram-bits = <12>; 129*724ba675SRob Herring mentor,power = <500>; 130*724ba675SRob Herring phys = <&usb1_phy>; 131*724ba675SRob Herring 132*724ba675SRob Herring dmas = <&cppi41dma 15 0 &cppi41dma 16 0 133*724ba675SRob Herring &cppi41dma 17 0 &cppi41dma 18 0 134*724ba675SRob Herring &cppi41dma 19 0 &cppi41dma 20 0 135*724ba675SRob Herring &cppi41dma 21 0 &cppi41dma 22 0 136*724ba675SRob Herring &cppi41dma 23 0 &cppi41dma 24 0 137*724ba675SRob Herring &cppi41dma 25 0 &cppi41dma 26 0 138*724ba675SRob Herring &cppi41dma 27 0 &cppi41dma 28 0 139*724ba675SRob Herring &cppi41dma 29 0 &cppi41dma 15 1 140*724ba675SRob Herring &cppi41dma 16 1 &cppi41dma 17 1 141*724ba675SRob Herring &cppi41dma 18 1 &cppi41dma 19 1 142*724ba675SRob Herring &cppi41dma 20 1 &cppi41dma 21 1 143*724ba675SRob Herring &cppi41dma 22 1 &cppi41dma 23 1 144*724ba675SRob Herring &cppi41dma 24 1 &cppi41dma 25 1 145*724ba675SRob Herring &cppi41dma 26 1 &cppi41dma 27 1 146*724ba675SRob Herring &cppi41dma 28 1 &cppi41dma 29 1>; 147*724ba675SRob Herring dma-names = 148*724ba675SRob Herring "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", 149*724ba675SRob Herring "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", 150*724ba675SRob Herring "rx14", "rx15", 151*724ba675SRob Herring "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", 152*724ba675SRob Herring "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", 153*724ba675SRob Herring "tx14", "tx15"; 154*724ba675SRob Herring }; 155*724ba675SRob Herring 156*724ba675SRob Herring cppi41dma: dma-controller@47402000 { 157*724ba675SRob Herring compatible = "ti,am3359-cppi41"; 158*724ba675SRob Herring reg = <0x47400000 0x1000 159*724ba675SRob Herring 0x47402000 0x1000 160*724ba675SRob Herring 0x47403000 0x1000 161*724ba675SRob Herring 0x47404000 0x4000>; 162*724ba675SRob Herring reg-names = "glue", "controller", "scheduler", "queuemgr"; 163*724ba675SRob Herring interrupts = <17>; 164*724ba675SRob Herring interrupt-names = "glue"; 165*724ba675SRob Herring #dma-cells = <2>; 166*724ba675SRob Herring /* For backwards compatibility: */ 167*724ba675SRob Herring #dma-channels = <30>; 168*724ba675SRob Herring dma-channels = <30>; 169*724ba675SRob Herring #dma-requests = <256>; 170*724ba675SRob Herring dma-requests = <256>; 171*724ba675SRob Herring }; 172*724ba675SRob Herring }; 173*724ba675SRob Herring 174*724ba675SRob Herring /* 175*724ba675SRob Herring * See TRM "Table 1-317. L4LS Instance Summary" for hints. 176*724ba675SRob Herring * It shows the module target agent registers though, so the 177*724ba675SRob Herring * actual device is typically 0x1000 before the target agent 178*724ba675SRob Herring * except in cases where the module is larger than 0x1000. 179*724ba675SRob Herring */ 180*724ba675SRob Herring l4ls: l4ls@48000000 { 181*724ba675SRob Herring compatible = "ti,dm814-l4ls", "simple-bus"; 182*724ba675SRob Herring #address-cells = <1>; 183*724ba675SRob Herring #size-cells = <1>; 184*724ba675SRob Herring ranges = <0 0x48000000 0x2000000>; 185*724ba675SRob Herring 186*724ba675SRob Herring i2c1: i2c@28000 { 187*724ba675SRob Herring compatible = "ti,omap4-i2c"; 188*724ba675SRob Herring #address-cells = <1>; 189*724ba675SRob Herring #size-cells = <0>; 190*724ba675SRob Herring ti,hwmods = "i2c1"; 191*724ba675SRob Herring reg = <0x28000 0x1000>; 192*724ba675SRob Herring interrupts = <70>; 193*724ba675SRob Herring }; 194*724ba675SRob Herring 195*724ba675SRob Herring elm: elm@80000 { 196*724ba675SRob Herring compatible = "ti,814-elm"; 197*724ba675SRob Herring ti,hwmods = "elm"; 198*724ba675SRob Herring reg = <0x80000 0x2000>; 199*724ba675SRob Herring interrupts = <4>; 200*724ba675SRob Herring }; 201*724ba675SRob Herring 202*724ba675SRob Herring gpio1: gpio@32000 { 203*724ba675SRob Herring compatible = "ti,omap4-gpio"; 204*724ba675SRob Herring ti,hwmods = "gpio1"; 205*724ba675SRob Herring ti,gpio-always-on; 206*724ba675SRob Herring reg = <0x32000 0x2000>; 207*724ba675SRob Herring interrupts = <96>; 208*724ba675SRob Herring gpio-controller; 209*724ba675SRob Herring #gpio-cells = <2>; 210*724ba675SRob Herring interrupt-controller; 211*724ba675SRob Herring #interrupt-cells = <2>; 212*724ba675SRob Herring }; 213*724ba675SRob Herring 214*724ba675SRob Herring gpio2: gpio@4c000 { 215*724ba675SRob Herring compatible = "ti,omap4-gpio"; 216*724ba675SRob Herring ti,hwmods = "gpio2"; 217*724ba675SRob Herring ti,gpio-always-on; 218*724ba675SRob Herring reg = <0x4c000 0x2000>; 219*724ba675SRob Herring interrupts = <98>; 220*724ba675SRob Herring gpio-controller; 221*724ba675SRob Herring #gpio-cells = <2>; 222*724ba675SRob Herring interrupt-controller; 223*724ba675SRob Herring #interrupt-cells = <2>; 224*724ba675SRob Herring }; 225*724ba675SRob Herring 226*724ba675SRob Herring gpio3: gpio@1ac000 { 227*724ba675SRob Herring compatible = "ti,omap4-gpio"; 228*724ba675SRob Herring ti,hwmods = "gpio3"; 229*724ba675SRob Herring ti,gpio-always-on; 230*724ba675SRob Herring reg = <0x1ac000 0x2000>; 231*724ba675SRob Herring interrupts = <32>; 232*724ba675SRob Herring gpio-controller; 233*724ba675SRob Herring #gpio-cells = <2>; 234*724ba675SRob Herring interrupt-controller; 235*724ba675SRob Herring #interrupt-cells = <2>; 236*724ba675SRob Herring }; 237*724ba675SRob Herring 238*724ba675SRob Herring gpio4: gpio@1ae000 { 239*724ba675SRob Herring compatible = "ti,omap4-gpio"; 240*724ba675SRob Herring ti,hwmods = "gpio4"; 241*724ba675SRob Herring ti,gpio-always-on; 242*724ba675SRob Herring reg = <0x1ae000 0x2000>; 243*724ba675SRob Herring interrupts = <62>; 244*724ba675SRob Herring gpio-controller; 245*724ba675SRob Herring #gpio-cells = <2>; 246*724ba675SRob Herring interrupt-controller; 247*724ba675SRob Herring #interrupt-cells = <2>; 248*724ba675SRob Herring }; 249*724ba675SRob Herring 250*724ba675SRob Herring i2c2: i2c@2a000 { 251*724ba675SRob Herring compatible = "ti,omap4-i2c"; 252*724ba675SRob Herring #address-cells = <1>; 253*724ba675SRob Herring #size-cells = <0>; 254*724ba675SRob Herring ti,hwmods = "i2c2"; 255*724ba675SRob Herring reg = <0x2a000 0x1000>; 256*724ba675SRob Herring interrupts = <71>; 257*724ba675SRob Herring }; 258*724ba675SRob Herring 259*724ba675SRob Herring mcspi1: spi@30000 { 260*724ba675SRob Herring compatible = "ti,omap4-mcspi"; 261*724ba675SRob Herring reg = <0x30000 0x1000>; 262*724ba675SRob Herring #address-cells = <1>; 263*724ba675SRob Herring #size-cells = <0>; 264*724ba675SRob Herring interrupts = <65>; 265*724ba675SRob Herring ti,spi-num-cs = <4>; 266*724ba675SRob Herring ti,hwmods = "mcspi1"; 267*724ba675SRob Herring dmas = <&edma 16 0 &edma 17 0 268*724ba675SRob Herring &edma 18 0 &edma 19 0 269*724ba675SRob Herring &edma 20 0 &edma 21 0 270*724ba675SRob Herring &edma 22 0 &edma 23 0>; 271*724ba675SRob Herring 272*724ba675SRob Herring dma-names = "tx0", "rx0", "tx1", "rx1", 273*724ba675SRob Herring "tx2", "rx2", "tx3", "rx3"; 274*724ba675SRob Herring }; 275*724ba675SRob Herring 276*724ba675SRob Herring mcspi2: spi@1a0000 { 277*724ba675SRob Herring compatible = "ti,omap4-mcspi"; 278*724ba675SRob Herring reg = <0x1a0000 0x1000>; 279*724ba675SRob Herring #address-cells = <1>; 280*724ba675SRob Herring #size-cells = <0>; 281*724ba675SRob Herring interrupts = <125>; 282*724ba675SRob Herring ti,spi-num-cs = <4>; 283*724ba675SRob Herring ti,hwmods = "mcspi2"; 284*724ba675SRob Herring dmas = <&edma 42 0 &edma 43 0 285*724ba675SRob Herring &edma 44 0 &edma 45 0>; 286*724ba675SRob Herring dma-names = "tx0", "rx0", "tx1", "rx1"; 287*724ba675SRob Herring }; 288*724ba675SRob Herring 289*724ba675SRob Herring /* Board must configure dmas with edma_xbar for EDMA */ 290*724ba675SRob Herring mcspi3: spi@1a2000 { 291*724ba675SRob Herring compatible = "ti,omap4-mcspi"; 292*724ba675SRob Herring reg = <0x1a2000 0x1000>; 293*724ba675SRob Herring #address-cells = <1>; 294*724ba675SRob Herring #size-cells = <0>; 295*724ba675SRob Herring interrupts = <126>; 296*724ba675SRob Herring ti,spi-num-cs = <4>; 297*724ba675SRob Herring ti,hwmods = "mcspi3"; 298*724ba675SRob Herring }; 299*724ba675SRob Herring 300*724ba675SRob Herring mcspi4: spi@1a4000 { 301*724ba675SRob Herring compatible = "ti,omap4-mcspi"; 302*724ba675SRob Herring reg = <0x1a4000 0x1000>; 303*724ba675SRob Herring #address-cells = <1>; 304*724ba675SRob Herring #size-cells = <0>; 305*724ba675SRob Herring interrupts = <127>; 306*724ba675SRob Herring ti,spi-num-cs = <4>; 307*724ba675SRob Herring ti,hwmods = "mcspi4"; 308*724ba675SRob Herring }; 309*724ba675SRob Herring 310*724ba675SRob Herring timer1_target: target-module@2e000 { 311*724ba675SRob Herring compatible = "ti,sysc-omap4-timer", "ti,sysc"; 312*724ba675SRob Herring reg = <0x2e000 0x4>, 313*724ba675SRob Herring <0x2e010 0x4>; 314*724ba675SRob Herring reg-names = "rev", "sysc"; 315*724ba675SRob Herring ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 316*724ba675SRob Herring ti,sysc-sidle = <SYSC_IDLE_FORCE>, 317*724ba675SRob Herring <SYSC_IDLE_NO>, 318*724ba675SRob Herring <SYSC_IDLE_SMART>, 319*724ba675SRob Herring <SYSC_IDLE_SMART_WKUP>; 320*724ba675SRob Herring clocks = <&timer1_fck>; 321*724ba675SRob Herring clock-names = "fck"; 322*724ba675SRob Herring #address-cells = <1>; 323*724ba675SRob Herring #size-cells = <1>; 324*724ba675SRob Herring ranges = <0x0 0x2e000 0x1000>; 325*724ba675SRob Herring 326*724ba675SRob Herring timer1: timer@0 { 327*724ba675SRob Herring compatible = "ti,am335x-timer-1ms"; 328*724ba675SRob Herring reg = <0x0 0x400>; 329*724ba675SRob Herring interrupts = <67>; 330*724ba675SRob Herring ti,timer-alwon; 331*724ba675SRob Herring clocks = <&timer1_fck>; 332*724ba675SRob Herring clock-names = "fck"; 333*724ba675SRob Herring }; 334*724ba675SRob Herring }; 335*724ba675SRob Herring 336*724ba675SRob Herring uart1: serial@20000 { 337*724ba675SRob Herring compatible = "ti,am3352-uart", "ti,omap3-uart"; 338*724ba675SRob Herring ti,hwmods = "uart1"; 339*724ba675SRob Herring reg = <0x20000 0x2000>; 340*724ba675SRob Herring clock-frequency = <48000000>; 341*724ba675SRob Herring interrupts = <72>; 342*724ba675SRob Herring dmas = <&edma 26 0 &edma 27 0>; 343*724ba675SRob Herring dma-names = "tx", "rx"; 344*724ba675SRob Herring }; 345*724ba675SRob Herring 346*724ba675SRob Herring uart2: serial@22000 { 347*724ba675SRob Herring compatible = "ti,am3352-uart", "ti,omap3-uart"; 348*724ba675SRob Herring ti,hwmods = "uart2"; 349*724ba675SRob Herring reg = <0x22000 0x2000>; 350*724ba675SRob Herring clock-frequency = <48000000>; 351*724ba675SRob Herring interrupts = <73>; 352*724ba675SRob Herring dmas = <&edma 28 0 &edma 29 0>; 353*724ba675SRob Herring dma-names = "tx", "rx"; 354*724ba675SRob Herring }; 355*724ba675SRob Herring 356*724ba675SRob Herring uart3: serial@24000 { 357*724ba675SRob Herring compatible = "ti,am3352-uart", "ti,omap3-uart"; 358*724ba675SRob Herring ti,hwmods = "uart3"; 359*724ba675SRob Herring reg = <0x24000 0x2000>; 360*724ba675SRob Herring clock-frequency = <48000000>; 361*724ba675SRob Herring interrupts = <74>; 362*724ba675SRob Herring dmas = <&edma 30 0 &edma 31 0>; 363*724ba675SRob Herring dma-names = "tx", "rx"; 364*724ba675SRob Herring }; 365*724ba675SRob Herring 366*724ba675SRob Herring timer2_target: target-module@40000 { 367*724ba675SRob Herring compatible = "ti,sysc-omap4-timer", "ti,sysc"; 368*724ba675SRob Herring reg = <0x40000 0x4>, 369*724ba675SRob Herring <0x40010 0x4>; 370*724ba675SRob Herring reg-names = "rev", "sysc"; 371*724ba675SRob Herring ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 372*724ba675SRob Herring ti,sysc-sidle = <SYSC_IDLE_FORCE>, 373*724ba675SRob Herring <SYSC_IDLE_NO>, 374*724ba675SRob Herring <SYSC_IDLE_SMART>, 375*724ba675SRob Herring <SYSC_IDLE_SMART_WKUP>; 376*724ba675SRob Herring clocks = <&timer2_fck>; 377*724ba675SRob Herring clock-names = "fck"; 378*724ba675SRob Herring #address-cells = <1>; 379*724ba675SRob Herring #size-cells = <1>; 380*724ba675SRob Herring ranges = <0x0 0x40000 0x1000>; 381*724ba675SRob Herring 382*724ba675SRob Herring timer2: timer@0 { 383*724ba675SRob Herring compatible = "ti,dm814-timer"; 384*724ba675SRob Herring reg = <0 0x1000>; 385*724ba675SRob Herring interrupts = <68>; 386*724ba675SRob Herring clocks = <&timer2_fck>; 387*724ba675SRob Herring clock-names = "fck"; 388*724ba675SRob Herring }; 389*724ba675SRob Herring }; 390*724ba675SRob Herring 391*724ba675SRob Herring timer3: timer@42000 { 392*724ba675SRob Herring compatible = "ti,dm814-timer"; 393*724ba675SRob Herring reg = <0x42000 0x2000>; 394*724ba675SRob Herring interrupts = <69>; 395*724ba675SRob Herring ti,hwmods = "timer3"; 396*724ba675SRob Herring }; 397*724ba675SRob Herring 398*724ba675SRob Herring mmc1: mmc@60000 { 399*724ba675SRob Herring compatible = "ti,omap4-hsmmc"; 400*724ba675SRob Herring ti,hwmods = "mmc1"; 401*724ba675SRob Herring dmas = <&edma 24 0 402*724ba675SRob Herring &edma 25 0>; 403*724ba675SRob Herring dma-names = "tx", "rx"; 404*724ba675SRob Herring interrupts = <64>; 405*724ba675SRob Herring interrupt-parent = <&intc>; 406*724ba675SRob Herring reg = <0x60000 0x1000>; 407*724ba675SRob Herring }; 408*724ba675SRob Herring 409*724ba675SRob Herring rtc: rtc@c0000 { 410*724ba675SRob Herring compatible = "ti,am3352-rtc", "ti,da830-rtc"; 411*724ba675SRob Herring reg = <0xc0000 0x1000>; 412*724ba675SRob Herring interrupts = <75 76>; 413*724ba675SRob Herring ti,hwmods = "rtc"; 414*724ba675SRob Herring }; 415*724ba675SRob Herring 416*724ba675SRob Herring mmc2: mmc@1d8000 { 417*724ba675SRob Herring compatible = "ti,omap4-hsmmc"; 418*724ba675SRob Herring ti,hwmods = "mmc2"; 419*724ba675SRob Herring dmas = <&edma 2 0 420*724ba675SRob Herring &edma 3 0>; 421*724ba675SRob Herring dma-names = "tx", "rx"; 422*724ba675SRob Herring interrupts = <28>; 423*724ba675SRob Herring interrupt-parent = <&intc>; 424*724ba675SRob Herring reg = <0x1d8000 0x1000>; 425*724ba675SRob Herring }; 426*724ba675SRob Herring 427*724ba675SRob Herring control: control@140000 { 428*724ba675SRob Herring compatible = "ti,dm814-scm", "simple-bus"; 429*724ba675SRob Herring reg = <0x140000 0x20000>; 430*724ba675SRob Herring #address-cells = <1>; 431*724ba675SRob Herring #size-cells = <1>; 432*724ba675SRob Herring ranges = <0 0x140000 0x20000>; 433*724ba675SRob Herring 434*724ba675SRob Herring scm_conf: scm_conf@0 { 435*724ba675SRob Herring compatible = "syscon", "simple-bus"; 436*724ba675SRob Herring reg = <0x0 0x800>; 437*724ba675SRob Herring #address-cells = <1>; 438*724ba675SRob Herring #size-cells = <1>; 439*724ba675SRob Herring ranges = <0 0 0x800>; 440*724ba675SRob Herring 441*724ba675SRob Herring phy_gmii_sel: phy-gmii-sel { 442*724ba675SRob Herring compatible = "ti,dm814-phy-gmii-sel"; 443*724ba675SRob Herring reg = <0x650 0x4>; 444*724ba675SRob Herring #phy-cells = <1>; 445*724ba675SRob Herring }; 446*724ba675SRob Herring 447*724ba675SRob Herring scm_clocks: clocks { 448*724ba675SRob Herring #address-cells = <1>; 449*724ba675SRob Herring #size-cells = <0>; 450*724ba675SRob Herring }; 451*724ba675SRob Herring 452*724ba675SRob Herring scm_clockdomains: clockdomains { 453*724ba675SRob Herring }; 454*724ba675SRob Herring }; 455*724ba675SRob Herring 456*724ba675SRob Herring usb_ctrl_mod: control@620 { 457*724ba675SRob Herring compatible = "ti,am335x-usb-ctrl-module"; 458*724ba675SRob Herring reg = <0x620 0x10 459*724ba675SRob Herring 0x648 0x4>; 460*724ba675SRob Herring reg-names = "phy_ctrl", "wakeup"; 461*724ba675SRob Herring }; 462*724ba675SRob Herring 463*724ba675SRob Herring edma_xbar: dma-router@f90 { 464*724ba675SRob Herring compatible = "ti,am335x-edma-crossbar"; 465*724ba675SRob Herring reg = <0xf90 0x40>; 466*724ba675SRob Herring #dma-cells = <3>; 467*724ba675SRob Herring dma-requests = <32>; 468*724ba675SRob Herring dma-masters = <&edma>; 469*724ba675SRob Herring }; 470*724ba675SRob Herring 471*724ba675SRob Herring /* 472*724ba675SRob Herring * Note that silicon revision 2.1 and older 473*724ba675SRob Herring * require input enabled (bit 18 set) for all 474*724ba675SRob Herring * 3.3V I/Os to avoid cumulative hardware damage. 475*724ba675SRob Herring * For more info, see errata advisory 2.1.87. 476*724ba675SRob Herring * We leave bit 18 out of function-mask and rely 477*724ba675SRob Herring * on the bootloader for it. 478*724ba675SRob Herring */ 479*724ba675SRob Herring pincntl: pinmux@800 { 480*724ba675SRob Herring compatible = "pinctrl-single"; 481*724ba675SRob Herring reg = <0x800 0x438>; 482*724ba675SRob Herring #address-cells = <1>; 483*724ba675SRob Herring #size-cells = <0>; 484*724ba675SRob Herring #pinctrl-cells = <1>; 485*724ba675SRob Herring pinctrl-single,register-width = <32>; 486*724ba675SRob Herring pinctrl-single,function-mask = <0x307ff>; 487*724ba675SRob Herring }; 488*724ba675SRob Herring 489*724ba675SRob Herring usb1_phy: usb-phy@1b00 { 490*724ba675SRob Herring compatible = "ti,am335x-usb-phy"; 491*724ba675SRob Herring reg = <0x1b00 0x100>; 492*724ba675SRob Herring reg-names = "phy"; 493*724ba675SRob Herring ti,ctrl_mod = <&usb_ctrl_mod>; 494*724ba675SRob Herring #phy-cells = <0>; 495*724ba675SRob Herring }; 496*724ba675SRob Herring }; 497*724ba675SRob Herring 498*724ba675SRob Herring prcm: prcm@180000 { 499*724ba675SRob Herring compatible = "ti,dm814-prcm", "simple-bus"; 500*724ba675SRob Herring reg = <0x180000 0x2000>; 501*724ba675SRob Herring #address-cells = <1>; 502*724ba675SRob Herring #size-cells = <1>; 503*724ba675SRob Herring ranges = <0 0x180000 0x2000>; 504*724ba675SRob Herring 505*724ba675SRob Herring prcm_clocks: clocks { 506*724ba675SRob Herring #address-cells = <1>; 507*724ba675SRob Herring #size-cells = <0>; 508*724ba675SRob Herring }; 509*724ba675SRob Herring 510*724ba675SRob Herring prcm_clockdomains: clockdomains { 511*724ba675SRob Herring }; 512*724ba675SRob Herring }; 513*724ba675SRob Herring 514*724ba675SRob Herring /* See TRM PLL_SUBSYS_BASE and "PLLSS Registers" */ 515*724ba675SRob Herring pllss: pllss@1c5000 { 516*724ba675SRob Herring compatible = "ti,dm814-pllss", "simple-bus"; 517*724ba675SRob Herring reg = <0x1c5000 0x1000>; 518*724ba675SRob Herring #address-cells = <1>; 519*724ba675SRob Herring #size-cells = <1>; 520*724ba675SRob Herring ranges = <0 0x1c5000 0x1000>; 521*724ba675SRob Herring 522*724ba675SRob Herring pllss_clocks: clocks { 523*724ba675SRob Herring #address-cells = <1>; 524*724ba675SRob Herring #size-cells = <0>; 525*724ba675SRob Herring }; 526*724ba675SRob Herring 527*724ba675SRob Herring pllss_clockdomains: clockdomains { 528*724ba675SRob Herring }; 529*724ba675SRob Herring }; 530*724ba675SRob Herring 531*724ba675SRob Herring wdt1: wdt@1c7000 { 532*724ba675SRob Herring compatible = "ti,omap3-wdt"; 533*724ba675SRob Herring ti,hwmods = "wd_timer"; 534*724ba675SRob Herring reg = <0x1c7000 0x1000>; 535*724ba675SRob Herring interrupts = <91>; 536*724ba675SRob Herring }; 537*724ba675SRob Herring }; 538*724ba675SRob Herring 539*724ba675SRob Herring intc: interrupt-controller@48200000 { 540*724ba675SRob Herring compatible = "ti,dm814-intc"; 541*724ba675SRob Herring interrupt-controller; 542*724ba675SRob Herring #interrupt-cells = <1>; 543*724ba675SRob Herring reg = <0x48200000 0x1000>; 544*724ba675SRob Herring }; 545*724ba675SRob Herring 546*724ba675SRob Herring /* Board must configure evtmux with edma_xbar for EDMA */ 547*724ba675SRob Herring mmc3: mmc@47810000 { 548*724ba675SRob Herring compatible = "ti,omap4-hsmmc"; 549*724ba675SRob Herring ti,hwmods = "mmc3"; 550*724ba675SRob Herring interrupts = <29>; 551*724ba675SRob Herring interrupt-parent = <&intc>; 552*724ba675SRob Herring reg = <0x47810000 0x1000>; 553*724ba675SRob Herring }; 554*724ba675SRob Herring 555*724ba675SRob Herring target-module@49000000 { 556*724ba675SRob Herring compatible = "ti,sysc-omap4", "ti,sysc"; 557*724ba675SRob Herring reg = <0x49000000 0x4>; 558*724ba675SRob Herring reg-names = "rev"; 559*724ba675SRob Herring clocks = <&alwon_clkctrl DM814_TPCC_CLKCTRL 0>; 560*724ba675SRob Herring clock-names = "fck"; 561*724ba675SRob Herring #address-cells = <1>; 562*724ba675SRob Herring #size-cells = <1>; 563*724ba675SRob Herring ranges = <0x0 0x49000000 0x10000>; 564*724ba675SRob Herring 565*724ba675SRob Herring edma: dma@0 { 566*724ba675SRob Herring compatible = "ti,edma3-tpcc"; 567*724ba675SRob Herring reg = <0 0x10000>; 568*724ba675SRob Herring reg-names = "edma3_cc"; 569*724ba675SRob Herring interrupts = <12 13 14>; 570*724ba675SRob Herring interrupt-names = "edma3_ccint", "edma3_mperr", 571*724ba675SRob Herring "edma3_ccerrint"; 572*724ba675SRob Herring dma-requests = <64>; 573*724ba675SRob Herring #dma-cells = <2>; 574*724ba675SRob Herring 575*724ba675SRob Herring ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>, 576*724ba675SRob Herring <&edma_tptc2 3>, <&edma_tptc3 0>; 577*724ba675SRob Herring 578*724ba675SRob Herring ti,edma-memcpy-channels = <20 21>; 579*724ba675SRob Herring }; 580*724ba675SRob Herring }; 581*724ba675SRob Herring 582*724ba675SRob Herring target-module@49800000 { 583*724ba675SRob Herring compatible = "ti,sysc-omap4", "ti,sysc"; 584*724ba675SRob Herring reg = <0x49800000 0x4>, 585*724ba675SRob Herring <0x49800010 0x4>; 586*724ba675SRob Herring reg-names = "rev", "sysc"; 587*724ba675SRob Herring ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 588*724ba675SRob Herring ti,sysc-midle = <SYSC_IDLE_FORCE>; 589*724ba675SRob Herring ti,sysc-sidle = <SYSC_IDLE_FORCE>, 590*724ba675SRob Herring <SYSC_IDLE_SMART>; 591*724ba675SRob Herring clocks = <&alwon_clkctrl DM814_TPTC0_CLKCTRL 0>; 592*724ba675SRob Herring clock-names = "fck"; 593*724ba675SRob Herring #address-cells = <1>; 594*724ba675SRob Herring #size-cells = <1>; 595*724ba675SRob Herring ranges = <0x0 0x49800000 0x100000>; 596*724ba675SRob Herring 597*724ba675SRob Herring edma_tptc0: dma@0 { 598*724ba675SRob Herring compatible = "ti,edma3-tptc"; 599*724ba675SRob Herring reg = <0 0x100000>; 600*724ba675SRob Herring interrupts = <112>; 601*724ba675SRob Herring interrupt-names = "edma3_tcerrint"; 602*724ba675SRob Herring }; 603*724ba675SRob Herring }; 604*724ba675SRob Herring 605*724ba675SRob Herring target-module@49900000 { 606*724ba675SRob Herring compatible = "ti,sysc-omap4", "ti,sysc"; 607*724ba675SRob Herring reg = <0x49900000 0x4>, 608*724ba675SRob Herring <0x49900010 0x4>; 609*724ba675SRob Herring reg-names = "rev", "sysc"; 610*724ba675SRob Herring ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 611*724ba675SRob Herring ti,sysc-midle = <SYSC_IDLE_FORCE>; 612*724ba675SRob Herring ti,sysc-sidle = <SYSC_IDLE_FORCE>, 613*724ba675SRob Herring <SYSC_IDLE_SMART>; 614*724ba675SRob Herring clocks = <&alwon_clkctrl DM814_TPTC1_CLKCTRL 0>; 615*724ba675SRob Herring clock-names = "fck"; 616*724ba675SRob Herring #address-cells = <1>; 617*724ba675SRob Herring #size-cells = <1>; 618*724ba675SRob Herring ranges = <0x0 0x49900000 0x100000>; 619*724ba675SRob Herring 620*724ba675SRob Herring edma_tptc1: dma@0 { 621*724ba675SRob Herring compatible = "ti,edma3-tptc"; 622*724ba675SRob Herring reg = <0 0x100000>; 623*724ba675SRob Herring interrupts = <113>; 624*724ba675SRob Herring interrupt-names = "edma3_tcerrint"; 625*724ba675SRob Herring }; 626*724ba675SRob Herring }; 627*724ba675SRob Herring 628*724ba675SRob Herring target-module@49a00000 { 629*724ba675SRob Herring compatible = "ti,sysc-omap4", "ti,sysc"; 630*724ba675SRob Herring reg = <0x49a00000 0x4>, 631*724ba675SRob Herring <0x49a00010 0x4>; 632*724ba675SRob Herring reg-names = "rev", "sysc"; 633*724ba675SRob Herring ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 634*724ba675SRob Herring ti,sysc-midle = <SYSC_IDLE_FORCE>; 635*724ba675SRob Herring ti,sysc-sidle = <SYSC_IDLE_FORCE>, 636*724ba675SRob Herring <SYSC_IDLE_SMART>; 637*724ba675SRob Herring clocks = <&alwon_clkctrl DM814_TPTC2_CLKCTRL 0>; 638*724ba675SRob Herring clock-names = "fck"; 639*724ba675SRob Herring #address-cells = <1>; 640*724ba675SRob Herring #size-cells = <1>; 641*724ba675SRob Herring ranges = <0x0 0x49a00000 0x100000>; 642*724ba675SRob Herring 643*724ba675SRob Herring edma_tptc2: dma@0 { 644*724ba675SRob Herring compatible = "ti,edma3-tptc"; 645*724ba675SRob Herring reg = <0 0x100000>; 646*724ba675SRob Herring interrupts = <114>; 647*724ba675SRob Herring interrupt-names = "edma3_tcerrint"; 648*724ba675SRob Herring }; 649*724ba675SRob Herring }; 650*724ba675SRob Herring 651*724ba675SRob Herring target-module@49b00000 { 652*724ba675SRob Herring compatible = "ti,sysc-omap4", "ti,sysc"; 653*724ba675SRob Herring reg = <0x49b00000 0x4>, 654*724ba675SRob Herring <0x49b00010 0x4>; 655*724ba675SRob Herring reg-names = "rev", "sysc"; 656*724ba675SRob Herring ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 657*724ba675SRob Herring ti,sysc-midle = <SYSC_IDLE_FORCE>; 658*724ba675SRob Herring ti,sysc-sidle = <SYSC_IDLE_FORCE>, 659*724ba675SRob Herring <SYSC_IDLE_SMART>; 660*724ba675SRob Herring clocks = <&alwon_clkctrl DM814_TPTC3_CLKCTRL 0>; 661*724ba675SRob Herring clock-names = "fck"; 662*724ba675SRob Herring #address-cells = <1>; 663*724ba675SRob Herring #size-cells = <1>; 664*724ba675SRob Herring ranges = <0x0 0x49b00000 0x100000>; 665*724ba675SRob Herring 666*724ba675SRob Herring edma_tptc3: dma@0 { 667*724ba675SRob Herring compatible = "ti,edma3-tptc"; 668*724ba675SRob Herring reg = <0 0x100000>; 669*724ba675SRob Herring interrupts = <115>; 670*724ba675SRob Herring interrupt-names = "edma3_tcerrint"; 671*724ba675SRob Herring }; 672*724ba675SRob Herring }; 673*724ba675SRob Herring 674*724ba675SRob Herring /* See TRM "Table 1-318. L4HS Instance Summary" */ 675*724ba675SRob Herring l4hs: l4hs@4a000000 { 676*724ba675SRob Herring compatible = "ti,dm814-l4hs", "simple-bus"; 677*724ba675SRob Herring #address-cells = <1>; 678*724ba675SRob Herring #size-cells = <1>; 679*724ba675SRob Herring ranges = <0 0x4a000000 0x1b4040>; 680*724ba675SRob Herring 681*724ba675SRob Herring target-module@100000 { 682*724ba675SRob Herring compatible = "ti,sysc-omap4-simple", "ti,sysc"; 683*724ba675SRob Herring reg = <0x100900 0x4>, 684*724ba675SRob Herring <0x100908 0x4>, 685*724ba675SRob Herring <0x100904 0x4>; 686*724ba675SRob Herring reg-names = "rev", "sysc", "syss"; 687*724ba675SRob Herring ti,sysc-mask = <0>; 688*724ba675SRob Herring ti,sysc-midle = <SYSC_IDLE_FORCE>, 689*724ba675SRob Herring <SYSC_IDLE_NO>; 690*724ba675SRob Herring ti,sysc-sidle = <SYSC_IDLE_FORCE>, 691*724ba675SRob Herring <SYSC_IDLE_NO>; 692*724ba675SRob Herring ti,syss-mask = <1>; 693*724ba675SRob Herring clocks = <&alwon_ethernet_clkctrl DM814_ETHERNET_CPGMAC0_CLKCTRL 0>; 694*724ba675SRob Herring clock-names = "fck"; 695*724ba675SRob Herring #address-cells = <1>; 696*724ba675SRob Herring #size-cells = <1>; 697*724ba675SRob Herring ranges = <0 0x100000 0x8000>; 698*724ba675SRob Herring 699*724ba675SRob Herring mac: ethernet@0 { 700*724ba675SRob Herring compatible = "ti,cpsw"; 701*724ba675SRob Herring clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>; 702*724ba675SRob Herring clock-names = "fck", "cpts"; 703*724ba675SRob Herring cpdma_channels = <8>; 704*724ba675SRob Herring ale_entries = <1024>; 705*724ba675SRob Herring bd_ram_size = <0x2000>; 706*724ba675SRob Herring mac_control = <0x20>; 707*724ba675SRob Herring slaves = <2>; 708*724ba675SRob Herring active_slave = <0>; 709*724ba675SRob Herring cpts_clock_mult = <0x80000000>; 710*724ba675SRob Herring cpts_clock_shift = <29>; 711*724ba675SRob Herring reg = <0 0x800>, 712*724ba675SRob Herring <0x900 0x100>; 713*724ba675SRob Herring #address-cells = <1>; 714*724ba675SRob Herring #size-cells = <1>; 715*724ba675SRob Herring /* 716*724ba675SRob Herring * c0_rx_thresh_pend 717*724ba675SRob Herring * c0_rx_pend 718*724ba675SRob Herring * c0_tx_pend 719*724ba675SRob Herring * c0_misc_pend 720*724ba675SRob Herring */ 721*724ba675SRob Herring interrupts = <40 41 42 43>; 722*724ba675SRob Herring ranges = <0 0 0x8000>; 723*724ba675SRob Herring syscon = <&scm_conf>; 724*724ba675SRob Herring 725*724ba675SRob Herring davinci_mdio: mdio@800 { 726*724ba675SRob Herring compatible = "ti,cpsw-mdio", "ti,davinci_mdio"; 727*724ba675SRob Herring clocks = <&cpsw_125mhz_gclk>; 728*724ba675SRob Herring clock-names = "fck"; 729*724ba675SRob Herring #address-cells = <1>; 730*724ba675SRob Herring #size-cells = <0>; 731*724ba675SRob Herring bus_freq = <1000000>; 732*724ba675SRob Herring reg = <0x800 0x100>; 733*724ba675SRob Herring }; 734*724ba675SRob Herring 735*724ba675SRob Herring cpsw_emac0: slave@200 { 736*724ba675SRob Herring /* Filled in by U-Boot */ 737*724ba675SRob Herring mac-address = [ 00 00 00 00 00 00 ]; 738*724ba675SRob Herring phys = <&phy_gmii_sel 1>; 739*724ba675SRob Herring }; 740*724ba675SRob Herring 741*724ba675SRob Herring cpsw_emac1: slave@300 { 742*724ba675SRob Herring /* Filled in by U-Boot */ 743*724ba675SRob Herring mac-address = [ 00 00 00 00 00 00 ]; 744*724ba675SRob Herring phys = <&phy_gmii_sel 2>; 745*724ba675SRob Herring }; 746*724ba675SRob Herring }; 747*724ba675SRob Herring }; 748*724ba675SRob Herring }; 749*724ba675SRob Herring 750*724ba675SRob Herring gpmc: gpmc@50000000 { 751*724ba675SRob Herring compatible = "ti,am3352-gpmc"; 752*724ba675SRob Herring ti,hwmods = "gpmc"; 753*724ba675SRob Herring ti,no-idle-on-init; 754*724ba675SRob Herring reg = <0x50000000 0x2000>; 755*724ba675SRob Herring interrupts = <100>; 756*724ba675SRob Herring gpmc,num-cs = <7>; 757*724ba675SRob Herring gpmc,num-waitpins = <2>; 758*724ba675SRob Herring #address-cells = <2>; 759*724ba675SRob Herring #size-cells = <1>; 760*724ba675SRob Herring interrupt-controller; 761*724ba675SRob Herring #interrupt-cells = <2>; 762*724ba675SRob Herring gpio-controller; 763*724ba675SRob Herring #gpio-cells = <2>; 764*724ba675SRob Herring }; 765*724ba675SRob Herring }; 766*724ba675SRob Herring}; 767*724ba675SRob Herring 768*724ba675SRob Herring#include "dm814x-clocks.dtsi" 769*724ba675SRob Herring 770*724ba675SRob Herring/* Preferred always-on timer for clocksource */ 771*724ba675SRob Herring&timer1_target { 772*724ba675SRob Herring ti,no-reset-on-init; 773*724ba675SRob Herring ti,no-idle; 774*724ba675SRob Herring timer@0 { 775*724ba675SRob Herring assigned-clocks = <&timer1_fck>; 776*724ba675SRob Herring assigned-clock-parents = <&devosc_ck>; 777*724ba675SRob Herring }; 778*724ba675SRob Herring}; 779*724ba675SRob Herring 780*724ba675SRob Herring/* Preferred timer for clockevent */ 781*724ba675SRob Herring&timer2_target { 782*724ba675SRob Herring ti,no-reset-on-init; 783*724ba675SRob Herring ti,no-idle; 784*724ba675SRob Herring timer@0 { 785*724ba675SRob Herring assigned-clocks = <&timer2_fck>; 786*724ba675SRob Herring assigned-clock-parents = <&devosc_ck>; 787*724ba675SRob Herring }; 788*724ba675SRob Herring}; 789