1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/spi/spacemit,k1-spi.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: SpacemiT K1 SoC Serial Peripheral Interface (SPI) 8 9maintainers: 10 - Alex Elder <elder@kernel.org> 11 12description: 13 The SpacemiT K1 SoC implements a SPI controller that has two 32-entry 14 FIFOs, for transmit and receive. Details are currently available in 15 section 18.2.1 of the K1 User Manual, found in the SpacemiT Keystone 16 K1 Documentation[1]. The controller transfers words using PIO. DMA 17 transfers are supported as well, if both TX and RX DMA channels are 18 specified, 19 20 [1] https://developer.spacemit.com/documentation 21 22allOf: 23 - $ref: /schemas/spi/spi-controller.yaml# 24 25properties: 26 compatible: 27 oneOf: 28 - const: spacemit,k1-spi 29 - items: 30 - const: spacemit,k3-spi 31 - const: spacemit,k1-spi 32 33 reg: 34 maxItems: 1 35 36 clocks: 37 items: 38 - description: Core clock 39 - description: Bus clock 40 41 clock-names: 42 items: 43 - const: core 44 - const: bus 45 46 resets: 47 maxItems: 1 48 49 interrupts: 50 maxItems: 1 51 52 dmas: 53 items: 54 - description: RX DMA channel 55 - description: TX DMA channel 56 57 dma-names: 58 items: 59 - const: rx 60 - const: tx 61 62required: 63 - compatible 64 - reg 65 - clocks 66 - clock-names 67 - resets 68 - interrupts 69 70unevaluatedProperties: false 71 72examples: 73 - | 74 75 #include <dt-bindings/clock/spacemit,k1-syscon.h> 76 spi@d401c000 { 77 compatible = "spacemit,k1-spi"; 78 reg = <0xd401c000 0x30>; 79 #address-cells = <1>; 80 #size-cells = <0>; 81 clocks = <&syscon_apbc CLK_SSP3>, 82 <&syscon_apbc CLK_SSP3_BUS>; 83 clock-names = "core", "bus"; 84 resets = <&syscon_apbc RESET_SSP3>; 85 interrupts = <55>; 86 dmas = <&pdma 20>, <&pdma 19>; 87 dma-names = "rx", "tx"; 88 }; 89