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/linux/Documentation/devicetree/bindings/soc/imx/
H A Dfsl,imx8mm-disp-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MM DISP blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MM DISP blk-ctrl is a top-level peripheral providing access to
14 the NoC and ensuring proper power sequencing of the display and MIPI CSI
20 - const: fsl,imx8mm-disp-blk-ctrl
21 - const: syscon
[all …]
/linux/Documentation/devicetree/bindings/media/xilinx/
H A Dxlnx,csi2rxss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx MIPI CSI-2 Receiver Subsystem
10 - Vishal Sagar <vishal.sagar@amd.com>
13 The Xilinx MIPI CSI-2 Receiver Subsystem is used to capture MIPI CSI-2
16 The subsystem consists of a MIPI D-PHY in slave mode which captures the
17 data packets. This is passed along the MIPI CSI-2 Rx IP which extracts the
18 packet data. The optional Video Format Bridge (VFB) converts this data to
20 For more details, please refer to PG232 Xilinx MIPI CSI-2 Receiver Subsystem.
[all …]
/linux/drivers/media/platform/nxp/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
8 tristate "NXP CSI Bridge driver"
17 Driver for the NXP Camera Sensor Interface (CSI) Bridge. This device
21 tristate "NXP i.MX8MQ MIPI CSI-2 receiver"
28 Video4Linux2 driver for the MIPI CSI-2 receiver found on the i.MX8MQ
32 tristate "NXP MIPI CSI-2 CSIS receiver found on i.MX7 and i.MX8 models"
39 Video4Linux2 sub-device driver for the MIPI CSI-2 CSIS receiver
42 source "drivers/media/platform/nxp/imx8-isi/Kconfig"
53 The i.MX Pixel Pipeline is a memory-to-memory engine for scaling,
57 tristate "NXP MX2 eMMa-PrP support"
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/linux/Documentation/devicetree/bindings/media/i2c/
H A Dtoshiba,tc358746.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Toshiba TC358746 Parallel to MIPI CSI2 Bridge
10 - Marco Felsch <kernel@pengutronix.de>
12 description: |-
13 The Toshiba TC358746 converts a parallel video stream into a MIPI CSI-2
14 stream. The direction can be either parallel-in -> csi-out or csi-in ->
15 parallel-out The chip is programmable through I2C and SPI but the SPI
16 interface is only supported in parallel-in -> csi-out mode.
[all …]
H A Dtc358743.txt1 * Toshiba TC358743 HDMI-RX to MIPI CSI2-TX Bridge
3 The Toshiba TC358743 HDMI-RX to MIPI CSI2-TX (H2C) is a bridge that converts
4 a HDMI stream to MIPI CSI-2 TX. It is programmable through I2C.
8 - compatible: value should be "toshiba,tc358743"
9 - clocks, clock-names: should contain a phandle link to the reference clock
14 - reset-gpios: gpio phandle GPIO connected to the reset pin
15 - interrupts: GPIO connected to the interrupt pin
16 - data-lanes: should be <1 2 3 4> for four-lane operation,
17 or <1 2> for two-lane operation
18 - clock-lanes: should be <0>
[all …]
H A Dst,st-mipid02.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/i2c/st,st-mipid02.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics MIPID02 CSI-2 to PARALLEL bridge
10 - Benjamin Mugnier <benjamin.mugnier@foss.st.com>
11 - Sylvain Petinot <sylvain.petinot@foss.st.com>
14 MIPID02 has two CSI-2 input ports, only one of those ports can be
15 active at a time. Active port input stream will be de-serialized
17 CSI-2 first input port is a dual lane 800Mbps per lane whereas CSI-2
[all …]
/linux/Documentation/devicetree/bindings/media/
H A Dcdns,csi2tx.txt1 Cadence MIPI-CSI2 TX controller
4 The Cadence MIPI-CSI2 TX controller is a CSI-2 bridge supporting up to
5 4 CSI lanes in output, and up to 4 different pixel streams in input.
8 - compatible: must be set to "cdns,csi2tx" or "cdns,csi2tx-1.3"
9 for version 1.3 of the controller, "cdns,csi2tx-2.1" for v2.1
10 - reg: base address and size of the memory mapped region
11 - clocks: phandles to the clocks driving the controller
12 - clock-names: must contain:
15 * pixel_if[0-3]_clk: pixel stream output clock, one for each stream
19 - phys: phandle to the D-PHY. If it is set, phy-names need to be set
[all …]
H A Dnxp,imx7-csi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/nxp,imx7-csi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: i.MX7 and i.MX8 CSI bridge (CMOS Sensor Interface)
10 - Rui Miguel Silva <rmfrfs@gmail.com>
13 This is device node for the CMOS Sensor Interface (CSI) which enables the
19 - enum:
20 - fsl,imx8mq-csi
21 - fsl,imx7-csi
[all …]
H A Dallwinner,sun6i-a31-csi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/media/allwinner,sun6i-a31-csi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A31 CMOS Sensor Interface (CSI)
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 - allwinner,sun6i-a31-csi
17 - allwinner,sun8i-a83t-csi
18 - allwinner,sun8i-h3-csi
[all …]
H A Dcdns,csi2rx.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence MIPI-CSI2 RX controller
10 - Maxime Ripard <mripard@kernel.org>
13 The Cadence MIPI-CSI2 RX controller is a CSI-2 bridge supporting up to 4 CSI
19 - enum:
20 - starfive,jh7110-csi2rx
21 - ti,j721e-csi2rx
22 - const: cdns,csi2rx
[all …]
/linux/Documentation/devicetree/bindings/display/bridge/
H A Drenesas,dsi-csi2-tx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/renesas,dsi-csi2-tx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car MIPI DSI/CSI-2 Encoder
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 This binding describes the MIPI DSI/CSI-2 encoder embedded in the Renesas
14 R-Car Gen4 SoCs. The encoder can operate in either DSI or CSI-2 mode, with up
20 - renesas,r8a779a0-dsi-csi2-tx # for V3U
21 - renesas,r8a779g0-dsi-csi2-tx # for V4H
[all …]
/linux/include/media/i2c/
H A Dtc358743.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * tc358743 - Toshiba HDMI to CSI-2 bridge
10 * REF_01 - Toshiba, TC358743XBG (H2C), Functional Specification, Rev 0.60
11 * REF_02 - Toshiba, TC358743XBG_HDMI-CSI_Tv11p_nm.xls
55 /* CSI
56 * Calculate CSI parameters with REF_02 for the highest resolution your
57 * CSI interface can handle. The driver will adjust the number of CSI
73 /* DVI->HDMI detection delay to avoid unnecessary switching between DVI
/linux/drivers/pmdomain/imx/
H A Dimx8m-blk-ctrl.c1 // SPDX-License-Identifier: GPL-2.0+
19 #include <dt-bindings/power/imx8mm-power.h>
20 #include <dt-bindings/power/imx8mn-power.h>
21 #include <dt-bindings/power/imx8mp-power.h>
22 #include <dt-bindings/power/imx8mq-power.h>
53 * an if-statement should be used before setting and clearing this
88 const struct imx8m_blk_ctrl_domain_data *data = domain->data; in imx8m_blk_ctrl_power_on()
89 struct imx8m_blk_ctrl *bc = domain->bc; in imx8m_blk_ctrl_power_on()
93 ret = pm_runtime_get_sync(bc->bus_power_dev); in imx8m_blk_ctrl_power_on()
95 pm_runtime_put_noidle(bc->bus_power_dev); in imx8m_blk_ctrl_power_on()
[all …]
/linux/Documentation/admin-guide/media/
H A Dstarfive_camss.rst1 .. SPDX-License-Identifier: GPL-2.0
10 ------------
24 ----------------------------------
28 |\ +---------------+ +-----------+
29 +----------+ | \ | | | |
31 | MIPI |----->| |----->| ISP |----->| |
33 +----------+ | | | | | Memory |
34 |MUX| +---------------+ | Interface |
35 +----------+ | | | |
36 | | | |---------------------------->| |
[all …]
H A Dstarfive_camss_graph.dot3 …n00000001 [label="{{<port0> 0} | stf_isp\n/dev/v4l-subdev0 | {<port1> 1}}", shape=Mrecord, style=f…
4 n00000001:port1 -> n00000008 [style=dashed]
7 …n0000000e [label="{{<port0> 0} | cdns_csi2rx.19800000.csi-bridge\n | {<port1> 1 | <port2> 2 | <por…
8 n0000000e:port1 -> n00000001:port0 [style=dashed]
9 n0000000e:port1 -> n00000004 [style=dashed]
10 …n00000018 [label="{{} | imx219 6-0010\n/dev/v4l-subdev1 | {<port0> 0}}", shape=Mrecord, style=fill…
11 n00000018:port0 -> n0000000e:port0 [style=bold]
/linux/drivers/media/i2c/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
8 comment "IR I2C driver auto-selected by 'Autoselect ancillary drivers'"
45 tristate "Allied Vision ALVIUM MIPI CSI-2 camera support"
48 This is a Video4Linux2 sensor-level driver for the Allied Vision
49 ALVIUM camera connected via MIPI CSI-2 interface.
52 module will be called alvium-csi2.
97 This is a V4L2 sensor-level driver for GalaxyCore GC2145
104 tristate "Hynix Hi-556 sensor support"
107 Hi-556 camera.
113 tristate "Hynix Hi-846 sensor support"
[all …]
/linux/drivers/media/platform/sunxi/sun6i-csi/
H A Dsun6i_csi.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (c) 2011-2018 Magewell Electronics Co., Ltd. (Nanjing)
5 * Copyright 2021-2022 Bootlin
12 #include <media/v4l2-device.h>
13 #include <media/videobuf2-v4l2.h>
18 #define SUN6I_CSI_NAME "sun6i-csi"
19 #define SUN6I_CSI_DESCRIPTION "Allwinner A31 CSI Device"
43 struct sun6i_csi_bridge bridge; member
H A Dsun6i_csi_bridge.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2021-2022 Bootlin
10 #include <media/v4l2-device.h>
11 #include <media/v4l2-fwnode.h>
13 #define SUN6I_CSI_BRIDGE_NAME "sun6i-csi-bridge"
64 /* Bridge */
/linux/drivers/media/pci/intel/
H A Dipu-bridge.c1 // SPDX-License-Identifier: GPL-2.0
15 #include <media/ipu-bridge.h>
16 #include <media/v4l2-fwnode.h>
18 #define ADEV_DEV(adev) ACPI_PTR(&((adev)->dev))
21 * 92335fcf-3203-4472-af93-7b4453ac29da
23 * Used to build MEI CSI device name to lookup MEI CSI device by
39 * plus the number of link-frequencies expected by their drivers, along with
66 /* Hynix Hi-556 */
89 .clock_frequency = "clock-frequency",
92 .bus_type = "bus-type",
[all …]
/linux/drivers/media/pci/intel/ivsc/
H A Dmei_csi.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Intel Visual Sensing Controller CSI Linux driver
8 * To set ownership of CSI-2 link and to configure CSI-2 link, there
29 #include <media/ipu-bridge.h>
30 #include <media/ipu6-pci-table.h>
31 #include <media/v4l2-async.h>
32 #include <media/v4l2-ctrls.h>
33 #include <media/v4l2-fwnode.h>
34 #include <media/v4l2-subdev.h>
36 #define MEI_CSI_ENTITY_NAME "Intel IVSC CSI"
[all …]
/linux/drivers/acpi/
H A Dmipi-disco-img.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Support MIPI DisCo for Imaging by parsing ACPI _CRS CSI-2 records defined in
8 * Section 6.4.3.8.2.4 "Camera Serial Interface (CSI-2) Connection Resource
12 * The implementation looks for the information in the ACPI namespace (CSI-2
14 * Documentation/firmware-guide/acpi/dsd/graph.rst to represent the CSI-2
16 * extracted from the _CRS CSI-2 resource descriptors and the MIPI DisCo
18 * with CSI-2 connections.
31 #include <media/v4l2-fwnode.h>
41 /* Connection data extracted from one _CRS CSI-2 resource descriptor. */
49 /* Data extracted from _CRS CSI-2 resource descriptors for one device. */
[all …]
/linux/Documentation/devicetree/bindings/dma/ti/
H A Dk3-bcdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
5 ---
6 $id: http://devicetree.org/schemas/dma/ti/k3-bcdma.yaml#
7 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - Peter Ujfalusi <peter.ujfalusi@gmail.com>
16 mode channels of K3 UDMA-P.
23 Split channels can be used to service PSI-L based peripherals.
24 The peripherals can be PSI-L native or legacy, non PSI-L native peripherals
25 with PDMAs. PDMA is tasked to act as a bridge between the PSI-L fabric and the
34 - ti,am62a-dmss-bcdma-csirx
[all …]
/linux/Documentation/userspace-api/media/mediactl/
H A Dmedia-types.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _media-controller-types:
10 .. _media-entity-functions:
11 .. _MEDIA-ENT-F-UNKNOWN:
12 .. _MEDIA-ENT-F-V4L2-SUBDEV-UNKNOWN:
13 .. _MEDIA-ENT-F-IO-V4L:
14 .. _MEDIA-ENT-F-IO-VBI:
15 .. _MEDIA-ENT-F-IO-SWRADIO:
16 .. _MEDIA-ENT-F-IO-DTV:
17 .. _MEDIA-ENT-F-DTV-DEMOD:
[all …]
/linux/arch/arm/boot/dts/allwinner/
H A Dsun6i-a31s-primo81.dts4 * Copyright 2015 Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 /dts-v1/;
46 #include "sun6i-a31s.dtsi"
47 #include "sunxi-common-regulators.dtsi"
49 #include <dt-bindings/gpio/gpio.h>
50 #include <dt-bindings/input/input.h>
54 compatible = "msi,primo81", "allwinner,sun6i-a31s";
56 hdmi-connector {
57 compatible = "hdmi-connector";
[all …]
/linux/drivers/spi/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 dynamic device discovery; some are even write-only or read-only.
17 chips, analog to digital (and d-to-a) converters, and more.
44 If your system has an master-capable SPI controller (which
56 by providing a high-level interface to send memory-like commands.
66 This enables support for SPI-NAND mode on the Airoha NAND
68 is implemented as a SPI-MEM controller.
90 to a SPI slave to Avalon bridge in a Intel MAX BMC.
107 to a single device like spi-nor (nvram), input device controller
166 supports spi-mem interface.
[all …]

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