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Searched +full:crystal +full:- +full:freq (Results 1 – 14 of 14) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/rtc/
H A Dstmp3xxx-rtc.txt4 - compatible: should be one of the following.
5 * "fsl,stmp3xxx-rtc"
6 - reg: physical base address of the controller and length of memory mapped
8 - interrupts: rtc alarm interrupt
11 - stmp,crystal-freq: override crystal frequency as determined from fuse bits.
13 "no crystal".
18 compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc";
H A Dfsl,stmp3xxx-rtc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/fsl,stmp3xxx-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Javier Carrasco <javier.carrasco.cruz@gmail.com>
13 - $ref: rtc.yaml#
18 - items:
19 - enum:
20 - fsl,imx28-rtc
21 - fsl,imx23-rtc
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/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dcs43130.txt5 - compatible : "cirrus,cs43130", "cirrus,cs4399", "cirrus,cs43131",
8 - reg : the I2C address of the device for I2C
10 - VA-supply, VP-supply, VL-supply, VCP-supply, VD-supply:
17 - reset-gpios : Active low GPIO used to reset the device
19 - cirrus,xtal-ibias:
20 When external MCLK is generated by external crystal
22 for external crystal. Amount of bias current sent is
28 - cirrus,dc-measure:
31 - cirrus,ac-measure:
35 - cirrus,dc-threshold:
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/freebsd/sys/contrib/device-tree/Bindings/net/wireless/
H A Dqcom,ath10k.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kalle Valo <kvalo@kernel.org>
11 - Jeff Johnson <jjohnson@kernel.org>
19 - qcom,ath10k # SDIO-based devices
20 - qcom,ipq4019-wifi
21 - qcom,wcn3990-wifi # SNoC-based devices
26 reg-names:
28 - const: membase
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/freebsd/sys/x86/x86/
H A Dtsc.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 1998-2003 Poul-Henning Kamp
66 &tsc_is_invariant, 0, "Indicates whether the TSC is P-state invariant");
80 &tsc_shift, 0, "Shift to pre-apply for the maximum TSC frequency");
165 * Stamp Counter and Nominal Core Crystal Clock'. If leaf 0x15 is not
199 uint64_t freq; in tsc_freq_intel_brand() local
216 for (i = 0; i < sizeof(brand) - 1; i++) in tsc_freq_intel_brand()
220 p -= 5; in tsc_freq_intel_brand()
234 #define C2D(c) ((c) - '0') in tsc_freq_intel_brand()
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/freebsd/sys/dev/bhnd/cores/pmu/
H A Dbhnd_pmu_subr.c1 /*-
2 * SPDX-License-Identifier: ISC
10 * distributed with the Asus RT-N16 firmware source code release.
41 if (_sc->dev != NULL) \
42 device_printf(_sc->dev, _fmt, ##__VA_ARGS__); \
91 ((uint8_t)BHND_PMU_GET_BITS((_sc)->caps, BHND_PMU_CAP_REV))
94 bhnd_core_clkctl_wait((_sc)->clkctl, (_val), (_mask))
100 CHIPC_CST4330_CHIPMODE_SDIOD((_sc)->io->rd_chipst((_sc)->io_ctx))
113 * @retval non-zero if the query state could not be initialized.
119 query->dev = dev; in bhnd_pmu_query_init()
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/freebsd/sys/dev/bwi/
H A Dif_bwireg.h1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
113 #define BWI_CLOCK_CTRL_FDIV __BITS(31, 16) /* freq divisor */
117 #define BWI_CLKSRC_CS_OSC 1 /* Crystal oscillator */
129 #define BWI_CLOCK_INFO_FDIV __BITS(31, 16) /* freq divisor */
186 #define BWI_WR_MOBJ_AUTOINC 0x100 /* Auto-increment wr */
187 #define BWI_RD_MOBJ_AUTOINC 0x200 /* Auto-increment rd */
367 ((sc)->sc_pci_subvid == PCI_VENDOR_BROADCOM && \
368 (sc)->sc_pci_subdid == BWI_PCI_SUBDEVICE_BU4306)
370 ((sc)->sc_pci_subvid == PCI_VENDOR_BROADCOM && \
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/freebsd/sys/dev/bhnd/cores/chipc/
H A Dchipcreg.h1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
5 * Copyright (c) 2010-2015 Broadcom Corporation
10 * distributed with the Asus RT-N16 firmware source code release.
77 /* siba backplane configuration broadcast (siba-only) */
81 #define CHIPC_GPIOPU 0x58 /**< pull-up mask (rev >= 20) */
97 #define CHIPC_GPIOTIMERVAL 0x88 /**< gpio-based LED duty cycle (rev >= 16) */
100 /* clock control registers (non-PMU devices) */
114 #define CHIPC_PLL_SLOWCLK_CTL 0xB8 /* "slowclock" (rev 6-9) */
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/freebsd/sys/kern/
H A Dkern_ntptime.c1 /*-
4 * Copyright (c) David L. Mills 1993-2001 *
22 * Poul-Henning Kamp <phk@FreeBSD.org>.
57 * Single-precision macros for 64-bit machines
61 #define L_SUB(v, u) ((v) -= (u))
63 #define L_NEG(v) ((v) = -(v))
67 (v) = -(-(v) >> (n)); \
77 ((v) = -((int64_t)(-(a)) << 32)); \
81 #define L_GINT(v) ((v) < 0 ? -(-(v) >> 32) : (v) >> 32)
104 * architecture-specific module. The interpolation can use either a
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/freebsd/sys/dev/ath/ath_hal/ar5212/
H A Dar5212_reset.c1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2008 Atheros Communications, Inc.
78 #define V(r, c) (ia)->data[((r)*(ia)->cols) + (c)] in write_common()
82 for (r = 0; r < ia->rows; r++) { in write_common()
141 HALASSERT(ah->ah_magic == AR5212_MAGIC); in ar5212Reset()
142 ee = AH_PRIVATE(ah)->ah_eeprom; in ar5212Reset()
171 HALASSERT(AH_PRIVATE(ah)->ah_eeversion >= AR_EEPROM_VER3); in ar5212Reset()
188 * only) - the best and most general fix for this situation in ar5212Reset()
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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam43xx-clocks.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 sys_clkin_ck: clock-sys-clkin-31@40 {
9 #clock-cells = <0>;
10 compatible = "ti,mux-clock";
11 clock-output-names = "sys_clkin_ck";
13 ti,bit-shift = <31>;
17 crystal_freq_sel_ck: clock-crystal-freq-sel-29@40 {
18 #clock-cells = <0>;
19 compatible = "ti,mux-clock";
20 clock-output-names = "crystal_freq_sel_ck";
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/freebsd/sys/dev/hifn/
H A Dhifn7751.c3 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
9 * Copyright (c) 2000-2001 Network Security Technologies, Inc.
14 * requested: Please send any comments, feedback, bug-fixes, or feature
42 * Materiel Command, USAF, under agreement number F30602-01-2-0537.
171 u_int32_t v = bus_space_read_4(sc->sc_st0, sc->sc_sh0, reg); in READ_REG_0()
172 sc->sc_bar0_lastreg = (bus_size_t) -1; in READ_REG_0()
180 u_int32_t v = bus_space_read_4(sc->sc_st1, sc->sc_sh1, reg); in READ_REG_1()
181 sc->sc_bar1_lastreg = (bus_size_t) -1; in READ_REG_1()
229 *paddr = segs->ds_addr; in hifn_dmamap_cb()
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/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300.h48 #define INIT_RSSI_BEACON_WEIGHT 8 /* ave beacon rssi weight (0-16) */
51 * Various fifo fill before Tx start, in 64-byte units
55 #define MAX_TX_FIFO_THRESHOLD (( 4096 / 64) - 1)
151 * Per-channel ANI state private to the driver.
178 u_int32_t cycle_count; /* Last cycle_count (can detect wrap-around) */
195 ((AH9300(ah)->ah_proc_phy_err & HAL_PROCESS_ANI))
211 u_int32_t ast_ani_reset; /* ANI parameters zero'd for non-STA */
317 (iniarray)->ia_array = (const u_int32_t *)(array); \
318 (iniarray)->ia_rows = (rows); \
319 (iniarray)->ia_columns = (columns); \
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/freebsd/sys/dev/iwn/
H A Dif_iwn.c1 /*-
2 * Copyright (c) 2007-2009 Damien Bergamini <damien.bergamini@free.fr>
6 * Copyright (c) 2013 Cedric GROSS <c.gross@kreiz-it.fr>
84 { 0x8086, IWN_DID_6x05_1, "Intel Centrino Advanced-N 6205" },
85 { 0x8086, IWN_DID_1000_1, "Intel Centrino Wireless-N 1000" },
86 { 0x8086, IWN_DID_1000_2, "Intel Centrino Wireless-N 1000" },
87 { 0x8086, IWN_DID_6x05_2, "Intel Centrino Advanced-N 6205" },
88 { 0x8086, IWN_DID_6050_1, "Intel Centrino Advanced-N + WiMAX 6250" },
89 { 0x8086, IWN_DID_6050_2, "Intel Centrino Advanced-N + WiMAX 6250" },
90 { 0x8086, IWN_DID_x030_1, "Intel Centrino Wireless-N 1030" },
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