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Searched full:crg_ctrl (Results 1 – 12 of 12) sorted by relevance

/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi3660.dtsi343 crg_ctrl: crg_ctrl@fff35000 { label
352 hisi,rst-syscon = <&crg_ctrl>;
362 pmuctrl: crg_ctrl@fff34000 {
407 clocks = <&crg_ctrl HI3660_OSC32K>,
408 <&crg_ctrl HI3660_OSC32K>,
409 <&crg_ctrl HI3660_OSC32K>;
420 clocks = <&crg_ctrl HI3660_CLK_GATE_I2C0>;
434 clocks = <&crg_ctrl HI3660_CLK_GATE_I2C1>;
448 clocks = <&crg_ctrl HI3660_CLK_GATE_I2C3>;
462 clocks = <&crg_ctrl HI3660_CLK_GATE_I2C7>;
[all …]
H A Dhi3670.dtsi148 crg_ctrl: crg_ctrl@fff35000 { label
158 hisi,rst-syscon = <&crg_ctrl>;
167 pmuctrl: crg_ctrl@fff34000 {
207 clocks = <&crg_ctrl HI3670_CLK_GATE_UART0>,
208 <&crg_ctrl HI3670_PCLK>;
219 clocks = <&crg_ctrl HI3670_CLK_GATE_UART1>,
220 <&crg_ctrl HI3670_PCLK>;
229 clocks = <&crg_ctrl HI3670_CLK_GATE_UART2>,
230 <&crg_ctrl HI3670_PCLK>;
241 clocks = <&crg_ctrl HI3670_CLK_GATE_UART3>,
[all …]
H A Dhi3660-coresight.dtsi17 clocks = <&crg_ctrl HI3660_PCLK>;
35 clocks = <&crg_ctrl HI3660_PCLK>;
53 clocks = <&crg_ctrl HI3660_PCLK>;
71 clocks = <&crg_ctrl HI3660_PCLK>;
89 clocks = <&crg_ctrl HI3660_PCLK>;
138 clocks = <&crg_ctrl HI3660_PCLK>;
164 clocks = <&crg_ctrl HI3660_PCLK>;
182 clocks = <&crg_ctrl HI3660_PCLK>;
200 clocks = <&crg_ctrl HI3660_PCLK>;
218 clocks = <&crg_ctrl HI3660_PCLK>;
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Dhisilicon,phy-hi3670-pcie.yaml72 clocks = <&crg_ctrl HI3670_CLK_GATE_PCIEPHY_REF>,
73 <&crg_ctrl HI3670_CLK_GATE_PCIEAUX>,
74 <&crg_ctrl HI3670_PCLK_GATE_PCIE_PHY>,
75 <&crg_ctrl HI3670_PCLK_GATE_PCIE_SYS>,
76 <&crg_ctrl HI3670_ACLK_GATE_PCIE>;
H A Dhisilicon,hi3660-usb3.yaml48 hisilicon,pericrg-syscon = <&crg_ctrl>;
H A Dhisilicon,hi3670-usb3.yaml59 hisilicon,pericrg-syscon = <&crg_ctrl>;
/linux/Documentation/devicetree/bindings/clock/
H A Dhi3670-clock.txt30 crg_ctrl: clock-controller@fff35000 {
40 clocks = <&crg_ctrl HI3670_CLK_GATE_UART0>,
41 <&crg_ctrl HI3670_PCLK>;
H A Dhi3660-clock.txt34 crg_ctrl: clock-controller@fff35000 {
44 clocks = <&crg_ctrl HI3660_CLK_MUX_UART0>,
45 <&crg_ctrl HI3660_PCLK>;
/linux/Documentation/devicetree/bindings/pci/
H A Dhisilicon,kirin-pcie.yaml99 clocks = <&crg_ctrl HI3660_PCIEPHY_REF>,
100 <&crg_ctrl HI3660_CLK_GATE_PCIEAUX>,
101 <&crg_ctrl HI3660_PCLK_GATE_PCIE_PHY>,
102 <&crg_ctrl HI3660_PCLK_GATE_PCIE_SYS>,
103 <&crg_ctrl HI3660_ACLK_GATE_PCIE>;
/linux/Documentation/devicetree/bindings/pwm/
H A Dpwm-hibvt.txt20 clocks = <&crg_ctrl HI3516CV300_PWM_CLK>;
21 resets = <&crg_ctrl 0x38 0>;
/linux/Documentation/devicetree/bindings/ufs/
H A Dhisilicon,ufs.yaml81 clocks = <&crg_ctrl HI3670_CLK_GATE_UFSIO_REF>,
82 <&crg_ctrl HI3670_CLK_GATE_UFS_SUBSYS>;
/linux/Documentation/devicetree/bindings/soc/hisilicon/
H A Dhisilicon,hi3660-usb3-otg-bc.yaml42 hisilicon,pericrg-syscon = <&crg_ctrl>;