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Searched full:crg_ctrl (Results 1 – 16 of 16) sorted by relevance

/freebsd/sys/contrib/device-tree/src/arm64/hisilicon/
H A Dhi3660.dtsi343 crg_ctrl: crg_ctrl@fff35000 { label
352 hisi,rst-syscon = <&crg_ctrl>;
362 pmuctrl: crg_ctrl@fff34000 {
407 clocks = <&crg_ctrl HI3660_OSC32K>,
408 <&crg_ctrl HI3660_OSC32K>,
409 <&crg_ctrl HI3660_OSC32K>;
420 clocks = <&crg_ctrl HI3660_CLK_GATE_I2C0>;
434 clocks = <&crg_ctrl HI3660_CLK_GATE_I2C1>;
448 clocks = <&crg_ctrl HI3660_CLK_GATE_I2C3>;
462 clocks = <&crg_ctrl HI3660_CLK_GATE_I2C7>;
[all …]
H A Dhi3670.dtsi148 crg_ctrl: crg_ctrl@fff35000 { label
158 hisi,rst-syscon = <&crg_ctrl>;
167 pmuctrl: crg_ctrl@fff34000 {
207 clocks = <&crg_ctrl HI3670_CLK_GATE_UART0>,
208 <&crg_ctrl HI3670_PCLK>;
219 clocks = <&crg_ctrl HI3670_CLK_GATE_UART1>,
220 <&crg_ctrl HI3670_PCLK>;
229 clocks = <&crg_ctrl HI3670_CLK_GATE_UART2>,
230 <&crg_ctrl HI3670_PCLK>;
241 clocks = <&crg_ctrl HI3670_CLK_GATE_UART3>,
[all …]
H A Dhi3660-coresight.dtsi17 clocks = <&crg_ctrl HI3660_PCLK>;
34 clocks = <&crg_ctrl HI3660_PCLK>;
51 clocks = <&crg_ctrl HI3660_PCLK>;
68 clocks = <&crg_ctrl HI3660_PCLK>;
85 clocks = <&crg_ctrl HI3660_PCLK>;
134 clocks = <&crg_ctrl HI3660_PCLK>;
160 clocks = <&crg_ctrl HI3660_PCLK>;
177 clocks = <&crg_ctrl HI3660_PCLK>;
194 clocks = <&crg_ctrl HI3660_PCLK>;
211 clocks = <&crg_ctrl HI3660_PCLK>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dkirin-pcie.txt42 clocks = <&crg_ctrl HI3660_PCIEPHY_REF>,
43 <&crg_ctrl HI3660_CLK_GATE_PCIEAUX>,
44 <&crg_ctrl HI3660_PCLK_GATE_PCIE_PHY>,
45 <&crg_ctrl HI3660_PCLK_GATE_PCIE_SYS>,
46 <&crg_ctrl HI3660_ACLK_GATE_PCIE>;
H A Dhisilicon,kirin-pcie.yaml98 clocks = <&crg_ctrl HI3660_PCIEPHY_REF>,
99 <&crg_ctrl HI3660_CLK_GATE_PCIEAUX>,
100 <&crg_ctrl HI3660_PCLK_GATE_PCIE_PHY>,
101 <&crg_ctrl HI3660_PCLK_GATE_PCIE_SYS>,
102 <&crg_ctrl HI3660_ACLK_GATE_PCIE>;
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dhisilicon,phy-hi3670-pcie.yaml72 clocks = <&crg_ctrl HI3670_CLK_GATE_PCIEPHY_REF>,
73 <&crg_ctrl HI3670_CLK_GATE_PCIEAUX>,
74 <&crg_ctrl HI3670_PCLK_GATE_PCIE_PHY>,
75 <&crg_ctrl HI3670_PCLK_GATE_PCIE_SYS>,
76 <&crg_ctrl HI3670_ACLK_GATE_PCIE>;
H A Dphy-hi3660-usb3.txt22 hisilicon,pericrg-syscon = <&crg_ctrl>;
H A Dhisilicon,hi3660-usb3.yaml48 hisilicon,pericrg-syscon = <&crg_ctrl>;
H A Dhisilicon,hi3670-usb3.yaml59 hisilicon,pericrg-syscon = <&crg_ctrl>;
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dhi3670-clock.txt30 crg_ctrl: clock-controller@fff35000 {
40 clocks = <&crg_ctrl HI3670_CLK_GATE_UART0>,
41 <&crg_ctrl HI3670_PCLK>;
H A Dhi3660-clock.txt34 crg_ctrl: clock-controller@fff35000 {
44 clocks = <&crg_ctrl HI3660_CLK_MUX_UART0>,
45 <&crg_ctrl HI3660_PCLK>;
/freebsd/sys/contrib/device-tree/Bindings/pwm/
H A Dpwm-hibvt.txt20 clocks = <&crg_ctrl HI3516CV300_PWM_CLK>;
21 resets = <&crg_ctrl 0x38 0>;
/freebsd/sys/contrib/device-tree/Bindings/ufs/
H A Dufs-hisi.txt35 clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>,
36 <&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>;
H A Dhisilicon,ufs.yaml81 clocks = <&crg_ctrl HI3670_CLK_GATE_UFSIO_REF>,
82 <&crg_ctrl HI3670_CLK_GATE_UFS_SUBSYS>;
/freebsd/sys/contrib/device-tree/Bindings/reset/
H A Dhisilicon,hi3660-reset.yaml
/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Dcoresight.txt257 clocks = <&crg_ctrl HI3660_PCLK>;