cpu\-offset (full) in projects: linux - OpenGrok search results

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Searched +full:cpu +full:- +full:offset (Results 1 – 25 of 1065) sorted by relevance

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/linux/tools/testing/selftests/rseq/
H A D	param_test.c	1 // SPDX-License-Identifier: LGPL-2.1 44 static __thread __attribute__((tls_model("initial-exec"))) 49 static __thread __attribute__((tls_model("initial-exec"), unused)) 113 "ahi %%" INJECT_ASM_REG ", -1\n\t" \ 204 "addiu " INJECT_ASM_REG ", -1\n\t" \ 226 "addi " INJECT_ASM_REG "," INJECT_ASM_REG ", -1\n\t" \ 250 "l.addi " INJECT_ASM_REG "," INJECT_ASM_REG ", -1\n\t" \ 269 if (loc_nr_loops == -1 && opt_modulo) { \ 270 if (yield_mod_cnt == opt_modulo - 1) { \ 329 int rseq_membarrier_expedited(int cpu) in rseq_membarrier_expedited() argument [all …]
/linux/arch/arm/mach-zynq/
H A D	slcr.c	1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * Copyright (c) 2011-2013 Xilinx Inc. 18 #define SLCR_A9_CPU_RST_CTRL_OFFSET 0x244 /* CPU Software Reset Control / 33 zynq_slcr_write - Write to a register in SLCR block 36 * @offset: Register offset in SLCR block 40 static int zynq_slcr_write(u32 val, u32 offset) in zynq_slcr_write() argument 42 return regmap_write(zynq_slcr_regmap, offset, val); in zynq_slcr_write() 46 * zynq_slcr_read - Read a register in SLCR block 49 * @offset: Register offset in SLCR block 53 static int zynq_slcr_read(u32 *val, u32 offset) in zynq_slcr_read() argument [all …]
/linux/drivers/gpu/drm/i915/gem/selftests/
H A D	i915_gem_coherency.c	2 * SPDX-License-Identifier: MIT 23 static int cpu_set(struct context ctx, unsigned long offset, u32 v) in cpu_set() argument 27 u32 cpu; in cpu_set() local 30 i915_gem_object_lock(ctx->obj, NULL); in cpu_set() 31 err = i915_gem_object_prepare_write(ctx->obj, &needs_clflush); in cpu_set() 35 page = i915_gem_object_get_page(ctx->obj, offset >> PAGE_SHIFT); in cpu_set() 36 cpu = kmap_local_page(page) + offset_in_page(offset); in cpu_set() 39 drm_clflush_virt_range(cpu, sizeof(cpu)); in cpu_set() 41 cpu = v; in cpu_set() 44 drm_clflush_virt_range(cpu, sizeof(*cpu)); in cpu_set() [all …]
/linux/tools/testing/selftests/kvm/lib/arm64/
H A D	gic_v3.c	1 // SPDX-License-Identifier: GPL-2.0 48 GUEST_ASSERT(count--); in gicv3_gicd_wait_for_rwp() 53 static inline volatile void gicr_base_cpu(u32 cpu) in gicr_base_cpu() argument 56 return GICR_BASE_GVA + cpu SZ_64K * 2; in gicr_base_cpu() 59 static void gicv3_gicr_wait_for_rwp(u32 cpu) in gicv3_gicr_wait_for_rwp() argument 63 while (readl(gicr_base_cpu(cpu) + GICR_CTLR) & GICR_CTLR_RWP) { in gicv3_gicr_wait_for_rwp() 64 GUEST_ASSERT(count--); in gicv3_gicr_wait_for_rwp() 124 * All other fields are read-only, so no need to read CTLR first. In in gicv3_set_eoi_split() 132 u32 gicv3_reg_readl(u32 cpu_or_dist, u64 offset) in gicv3_reg_readl() argument 136 return readl(base + offset); in gicv3_reg_readl() [all …]
/linux/arch/x86/include/asm/uv/
H A D	uv_hub.h	9 * Copyright (C) 2007-2014 Silicon Graphics, Inc. All rights reserved. 33 * M - The low M bits of a physical address represent the offset 38 * N - Number of bits in the node portion of a socket physical 41 * NASID - network ID of a router, Mbrick or Cbrick. Nasid values of 44 * right shift the NASID by 1 to exclude the always-zero bit. 47 * GNODE - NASID right shifted by 1 bit. Most mmrs contain gnodes instead 50 * PNODE - the low N bits of the GNODE. The PNODE is the most useful variant 53 * GPA - (global physical address) a socket physical address converted 62 * +--------------------------------+---------------------+ 64 * +--------------------------------+---------------------+ [all …]
/linux/drivers/gpu/drm/lima/
H A D	lima_vm.c	1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* Copyright 2017-2019 Qiang Yu <yuq825@gmail.com> */ 5 #include <linux/dma-mapping.h> 26 #define LIMA_VM_PT_MASK ((1 << LIMA_VM_PD_SHIFT) - 1) 27 #define LIMA_VM_BT_MASK ((1 << LIMA_VM_PB_SHIFT) - 1) 43 vm->bts[pbe].cpu[bte] = 0; in lima_vm_unmap_range() 52 if (!vm->bts[pbe].cpu) { in lima_vm_map_page() 57 vm->bts[pbe].cpu = dma_alloc_wc( in lima_vm_map_page() 58 vm->dev->dev, LIMA_PAGE_SIZE << LIMA_VM_NUM_PT_PER_BT_SHIFT, in lima_vm_map_page() 59 &vm->bts[pbe].dma, GFP_KERNEL \| __GFP_NOWARN \| __GFP_ZERO); in lima_vm_map_page() [all …]
/linux/arch/x86/kernel/apic/
H A D	x2apic_savic.c	1 // SPDX-License-Identifier: GPL-2.0-only 3 * AMD Secure AVIC Support (SEV-SNP Guests) 12 #include <linux/percpu-defs.h> 31 static inline void get_reg_bitmap(unsigned int cpu, unsigned int offset) in get_reg_bitmap() argument 33 return &per_cpu_ptr(savic_page, cpu)->regs[offset]; in get_reg_bitmap() 36 static inline void update_vector(unsigned int cpu, unsigned int offset, in update_vector() argument 39 void bitmap = get_reg_bitmap(cpu, offset); in update_vector() 51 * result in #VC exception (for non-accelerated register accesses) 95 "APIC register read offset 0x%x not aligned at 16 bytes", reg)) in savic_read() 98 /* IRR and ALLOWED_IRR offset range */ in savic_read() [all …]
/linux/arch/arm/mach-hisi/
H A D	platsmp.c	1 // SPDX-License-Identifier: GPL-2.0-only 5 * Based on arch/arm/mach-vexpress/platsmp.c, Copyright (C) 2002 ARM Ltd. 23 void hi3xxx_set_cpu_jump(int cpu, void *jump_addr) in hi3xxx_set_cpu_jump() argument 25 cpu = cpu_logical_map(cpu); in hi3xxx_set_cpu_jump() 26 if (!cpu \|\| !ctrl_base) in hi3xxx_set_cpu_jump() 28 writel_relaxed(__pa_symbol(jump_addr), ctrl_base + ((cpu - 1) << 2)); in hi3xxx_set_cpu_jump() 31 int hi3xxx_get_cpu_jump(int cpu) in hi3xxx_get_cpu_jump() argument 33 cpu = cpu_logical_map(cpu); in hi3xxx_get_cpu_jump() 34 if (!cpu \|\| !ctrl_base) in hi3xxx_get_cpu_jump() 36 return readl_relaxed(ctrl_base + ((cpu - 1) << 2)); in hi3xxx_get_cpu_jump() [all …]
/linux/arch/s390/mm/
H A D	maccess.c	1 // SPDX-License-Identifier: GPL-2.0 3 * Access kernel memory without faulting -- s390 specific implementation. 14 #include <linux/cpu.h> 17 #include <asm/asm-extable.h> 30 unsigned long aligned, offset, count; in s390_kernel_write_odd() local 34 offset = (unsigned long) dst & 7UL; in s390_kernel_write_odd() 35 size = min(8UL - offset, size); in s390_kernel_write_odd() 36 count = size - 1; in s390_kernel_write_odd() 46 : "a" (&tmp), "a" (&tmp[offset]), "a" (src) in s390_kernel_write_odd() 52 * __s390_kernel_write - write to kernel memory bypassing DAT [all …]
/linux/include/linux/
H A D	relay.h	1 /* SPDX-License-Identifier: GPL-2.0 / 5 Copyright (C) 2002, 2003 - Tom Zanussi (zanussi@us.ibm.com), IBM Corp 6 * Copyright (C) 1999, 2000, 2001, 2002 - Karim Yaghmour (karim@opersys.com) 48 * Per-cpu relay channel buffer 53 void data; / start of current sub-buffer / 54 size_t offset; / current offset into sub-buffer / member 55 size_t subbufs_produced; / count of sub-buffers produced / 56 size_t subbufs_consumed; / count of sub-buffers consumed / 66 size_t padding; /* padding counts per sub-buffer / 69 unsigned int cpu; / this buf's cpu */ member [all …]
H A D	nd.h	1 /* SPDX-License-Identifier: GPL-2.0-only / 3 Copyright(c) 2013-2015 Intel Corporation. All rights reserved. 41 * struct nvdimm_pmu - data structure for nvdimm perf driver 44 * @cpu: designated cpu for counter access. 45 * @node: node for cpu hotplug notifier link. 46 * @cpuhp_state: state for cpu hotplug notification. 47 * @arch_cpumask: cpumask to get designated cpu for counter access. 52 int cpu; member 72 return -ENXIO; in register_nvdimm_pmu() 90 * struct nd_namespace_common - core infrastructure of a namespace [all …]
/linux/block/
H A D	blk-mq-cpumap.c	1 // SPDX-License-Identifier: GPL-2.0 3 * CPU <-> hardware queue mapping helpers 5 * Copyright (C) 2013-2014 Jens Axboe 12 #include <linux/cpu.h> 18 #include "blk-mq.h" 30 * blk_mq_num_possible_queues - Calc nr of queues for multiqueue devices 45 * blk_mq_num_online_queues - Calc nr of queues for multiqueue devices 62 unsigned int queue, cpu, nr_masks; in blk_mq_map_queues() local 64 masks = group_cpus_evenly(qmap->nr_queues, &nr_masks); in blk_mq_map_queues() 66 for_each_possible_cpu(cpu) in blk_mq_map_queues() [all …]
/linux/tools/perf/arch/arm/util/
H A D	cs-etm.c	1 // SPDX-License-Identifier: GPL-2.0 6 #include "../../../util/cs-etm.h" 14 #include <linux/coresight-pmu.h> 37 #include "cs-etm.h" 73 static bool cs_etm_is_ete(struct perf_pmu cs_etm_pmu, struct perf_cpu cpu); 74 static int cs_etm_get_ro(struct perf_pmu pmu, struct perf_cpu cpu, const char path, __u64 val); 75 static bool cs_etm_pmu_path_exists(struct perf_pmu pmu, struct perf_cpu cpu, const char path); in cs_etm_get_version() 78 struct perf_cpu cpu) in cs_etm_get_version() 76 cs_etm_get_version(struct perf_pmu * cs_etm_pmu,struct perf_cpu cpu) cs_etm_get_version() argument 89 cs_etm_validate_context_id(struct perf_pmu * cs_etm_pmu,struct evsel * evsel,struct perf_cpu cpu) cs_etm_validate_context_id() argument 148 cs_etm_validate_timestamp(struct perf_pmu * cs_etm_pmu,struct evsel * evsel,struct perf_cpu cpu) cs_etm_validate_timestamp() argument 204 struct perf_cpu cpu; cs_etm_validate_config() local 554 struct perf_cpu cpu; cs_etm_info_priv_size() local 583 cs_etm_get_ro(struct perf_pmu * pmu,struct perf_cpu cpu,const char * path,__u64 * val) cs_etm_get_ro() argument 600 cs_etm_get_ro_signed(struct perf_pmu * pmu,struct perf_cpu cpu,const char * path,__u64 * out_val) cs_etm_get_ro_signed() argument 620 cs_etm_pmu_path_exists(struct perf_pmu * pmu,struct perf_cpu cpu,const char * path) cs_etm_pmu_path_exists() argument 638 cs_etm_is_ete(struct perf_pmu * cs_etm_pmu,struct perf_cpu cpu) cs_etm_is_ete() argument 653 cs_etm_get_legacy_trace_id(struct perf_cpu cpu) cs_etm_get_legacy_trace_id() argument 659 cs_etm_save_etmv4_header(__u64 data[],struct auxtrace_record * itr,struct perf_cpu cpu) cs_etm_save_etmv4_header() argument 691 cs_etm_save_ete_header(__u64 data[],struct auxtrace_record * itr,struct perf_cpu cpu) cs_etm_save_ete_header() argument 722 cs_etm_get_metadata(struct perf_cpu cpu,u32 * offset,struct auxtrace_record * itr,struct perf_record_auxtrace_info * info) cs_etm_get_metadata() argument 788 u32 offset; cs_etm_info_fill() local 796 struct perf_cpu cpu; cs_etm_info_fill() local [all...]
/linux/arch/mips/boot/dts/mti/
H A D	sead3.dts	`1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 8 #include <dt-bindings/interrupt-controller/mips-gic.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 13 compatible = "mti,sead-3"; 14 model = "MIPS SEAD-3"; 17 stdout-path = "serial1:115200"; 26 cpu@0 { 36 cpu_intc: interrupt-controller { [all …]`
/linux/drivers/macintosh/
H A D	windfarm_pm121.c	`1 // SPDX-License-Identifier: GPL-2.0-only 16 * that none of the code has been re-used, it's a complete 17 * re-implementation 21 * controls with a tiny difference. The control-ids of hard-drive-fan 22 * and cpu-fan is swapped. 28 * new_min = ((((average_power * slope) >> 16) + offset) >> 16) + min_value 34 * offset : -19563152 38 * offset : -15650652 44 * offset : -15650652 48 * offset : -19563152 [all …]`
/linux/tools/power/x86/x86_energy_perf_policy/
H A D	x86_energy_perf_policy.8	1 .\" This page Copyright (C) 2010 - 2015 Len Brown <len.brown@intel.com> 5 x86_energy_perf_policy \- Manage Energy vs. Performance Policy 10 .RB "scope: \-\-cpu\ cpu-list \| \-\-pkg\ pkg-list" 12 .RB "cpu-list, pkg-list: # \| #,# \| #-# \| all" 14 .RB "field: \-\-all \| \-\-epb \| \-\-hwp-epp \| \-\-hwp-min \| \-\-hwp-max \| \-\-hwp-desired" 16 .RB "other: (\-\-force \| \-\-hwp-enable \| \-\-turbo-enable) value)" 18 .RB "soc-slider: --soc-slider-balance # \| --soc-slider-offset # \| --platform-profile <name>" 20 .RB "value: # \| default \| performance \| balance-performance \| balance-power \| power" 23 displays and updates energy-performance policy settings specific to 27 While \fBx86_energy_perf_policy\fP can manage energy-performance policy [all …]
/linux/drivers/crypto/cavium/nitrox/
H A D	nitrox_isr.c	1 // SPDX-License-Identifier: GPL-2.0 15 * - NPS packet ring, AQMQ ring and ZQMQ ring 24 * nps_pkt_slc_isr - IRQ handler for NPS solicit port 32 struct nitrox_cmdq *cmdq = qvec->cmdq; in nps_pkt_slc_isr() 34 slc_cnts.value = readq(cmdq->compl_cnt_csr_addr); in nps_pkt_slc_isr() 37 tasklet_hi_schedule(&qvec->resp_tasklet); in nps_pkt_slc_isr() 56 unsigned long value, offset; in clear_nps_pkt_err_intr() local 64 offset = NPS_PKT_SLC_ERR_TYPE; in clear_nps_pkt_err_intr() 65 value = nitrox_read_csr(ndev, offset); in clear_nps_pkt_err_intr() 66 nitrox_write_csr(ndev, offset, value); in clear_nps_pkt_err_intr() [all …]
/linux/tools/power/x86/turbostat/
H A D	turbostat.8	`3 turbostat \- Report processor frequency and idle statistics 12 .RB [ "\--interval seconds" ] 15 idle power-state statistics, temperature and power on X86 processors. 19 in one-shot upon its completion. 22 The 5-second interval can be changed using the --interval option. 26 Options can be specified with a single or double '-', and only as much of the option 27 name as necessary to disambiguate it from others is necessary. Note that options are case-sensitiv [all...]`
/linux/scripts/gdb/linux/
H A D	cpus.py	`4 # per-cpu tools 6 # Copyright (c) Siemens AG, 2011-2013 27 return gdb.selected_thread().num - 1 31 raise gdb.GdbError("Sorry, obtaining the current CPU is not yet " 35 def per_cpu(var_ptr, cpu): argument 36 if cpu == -1: 37 cpu = get_current_cpu() 39 offset = gdb.parse_and_eval( 40 "trap_block[{0}].__per_cpu_base".format(str(cpu))) 43 offset = gdb.parse_and_eval( [all …]`
/linux/Documentation/devicetree/bindings/arm/hisilicon/controller/
H A D	sysctrl.yaml	`1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Wei Xu <xuwei5@hisilicon.com> 19 offset. In addition, the HiP01 system controller has some specific control 23 Hisilicon system controller --> hisilicon,sysctrl 24 HiP01 system controller --> hisilicon,hip01-sysctrl 25 Hi6220 system controller --> hisilicon,hi6220-sysctrl 26 Hi3519 system controller --> hisilicon,hi3519-sysctrl 29 - if: [all …]`
/linux/drivers/soc/samsung/
H A D	exynos-pmu.c	1 // SPDX-License-Identifier: GPL-2.0 3 // Copyright (c) 2011-2014 Samsung Electronics Co., Ltd. 6 // Exynos - CPU PMU(Power Management Unit) support 22 #include <linux/soc/samsung/exynos-regs-pmu.h> 23 #include <linux/soc/samsung/exynos-pmu.h> 25 #include "exynos-pmu.h" 33 * Serialization lock for CPU hot plug and cpuidle ACPM hint 48 void pmu_raw_writel(u32 val, u32 offset) in pmu_raw_writel() argument 50 writel_relaxed(val, pmu_base_addr + offset); in pmu_raw_writel() 53 u32 pmu_raw_readl(u32 offset) in pmu_raw_readl() argument [all …]
/linux/tools/testing/selftests/bpf/
H A D	bpf_arena_alloc.h	`1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) / 7 #define __round_mask(x, y) ((__typeof__(x))((y)-1)) 10 #define round_up(x, y) ((((x)-1) \| __round_mask(x, y))+1) 23 __u32 cpu = bpf_get_smp_processor_id(); in bpf_alloc() local 24 void __arena page = page_frag_cur_page[cpu]; in bpf_alloc() 26 int offset; bpf_alloc() local [all...]`
/linux/arch/loongarch/include/asm/
H A D	io.h	1 /* SPDX-License-Identifier: GPL-2.0 / 3 Copyright (C) 2020-2022 Loongson Technology Corporation Limited 12 #include <asm/cpu.h> 14 #include <asm/pgtable-bits.h> 25 static inline void __iomem ioremap_prot(phys_addr_t offset, unsigned long size, in ioremap_prot() argument 28 if (offset > TO_PHYS_MASK) in ioremap_prot() 33 return (void __iomem )(unsigned long)(CACHE_BASE + offset); in ioremap_prot() 35 return (void __iomem )(unsigned long)(UNCACHE_BASE + offset); in ioremap_prot() 37 return (void __iomem )(unsigned long)(WRITECOMBINE_BASE + offset); in ioremap_prot() 43 #define ioremap(offset, size) \ argument [all …]
/linux/arch/arm/boot/dts/st/
H A D	stih418-b2264.dts	`1 // SPDX-License-Identifier: GPL-2.0-only 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 11 compatible = "st,stih418-b2264", "st,stih418"; 14 stdout-path = &sbc_serial0; 23 cpu@0 { 24 operating-points-v2 = <&cpu_opp_table>; 25 /* u-boot puts hpen in SBC dmem at 0xb8 offset */ 26 cpu-release-addr = <0x94100b8>; 28 cpu@1 { [all …]`
/linux/kernel/sched/
H A D	stats.c	1 // SPDX-License-Identifier: GPL-2.0 13 prev_wait_start = schedstat_val(stats->wait_start); in __update_stats_wait_start() 16 wait_start -= prev_wait_start; in __update_stats_wait_start() 18 __schedstat_set(stats->wait_start, wait_start); in __update_stats_wait_start() 24 u64 delta = rq_clock(rq) - schedstat_val(stats->wait_start); in __update_stats_wait_end() 33 __schedstat_set(stats->wait_start, delta); in __update_stats_wait_end() 41 __schedstat_set(stats->wait_max, in __update_stats_wait_end() 42 max(schedstat_val(stats->wait_max), delta)); in __update_stats_wait_end() 43 __schedstat_inc(stats->wait_count); in __update_stats_wait_end() 44 __schedstat_add(stats->wait_sum, delta); in __update_stats_wait_end() [all …]

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