9  * Copyright (C) 2007-2014 Silicon Graphics, Inc. All rights reserved.
33  *	M       - The low M bits of a physical address represent the offset
38  *	N	- Number of bits in the node portion of a socket physical
41  *	NASID   - network ID of a router, Mbrick or Cbrick. Nasid values of
44  *		  right shift the NASID by 1 to exclude the always-zero bit.
47  *	GNODE   - NASID right shifted by 1 bit. Most mmrs contain gnodes instead
50  *	PNODE   - the low N bits of the GNODE. The PNODE is the most useful variant
53  *	GPA	- (global physical address) a socket physical address converted
62  *  +--------------------------------+---------------------+
64  *  +--------------------------------+---------------------+
65  *          |<-------53 - M bits --->|<--------M bits ----->
67  *	M - number of node offset bits (35 .. 40)
70  *  Memory/UV-HUB Processor Socket Address Format:
71  *  +----------------+---------------+---------------------+
73  *  +----------------+---------------+---------------------+
74  *                   <--- N bits --->|<--------M bits ----->
76  *	M - number of node offset bits (35 .. 40)
77  *	N - number of PNODE bits (0 .. 10)
91  *		pppppppppplc0cch	Nehalem-EX (12 bits in hdw reg)
92  *		ppppppppplcc0cch	Westmere-EX (12 bits in hdw reg)
115  * This value is also the value of the maximum number of non-router NASIDs
145  * available in the L3 cache on the cpu socket for the node.
183 /* CPU specific info with a pointer to the hub common info struct */
192 #define uv_cpu_info_per(cpu)	(&per_cpu(__uv_cpu_info, cpu))  argument
203 	return (struct uv_hub_info_s *)uv_cpu_info->p_uv_hub_info;  in _uv_hub_info()
207 static inline struct uv_hub_info_s *uv_cpu_hub_info(int cpu)  in uv_cpu_hub_info()  argument
209 	return (struct uv_hub_info_s *)uv_cpu_info_per(cpu)->p_uv_hub_info;  in uv_cpu_hub_info()
214 	return uv_hub_info->hub_type;  in uv_hub_type()
219 	uv_hub_info->hub_type = uvmask;  in uv_hub_type_set()
225  * This is a software convention - NOT the hardware revision numbers in
273  *	in this file - not by other kernel code.
274  *		n -  NASID (full 15-bit global nasid)
275  *		g -  GNODE (full 15-bit global nasid, right shifted 1)
276  *		p -  PNODE (local part of nsids, right shifted 1)
279 		(((n) >> uv_hub_info->nasid_shift) & uv_hub_info->pnode_mask)
280 #define UV_PNODE_TO_GNODE(p)		((p) |uv_hub_info->gnode_extra)
282 		(UV_PNODE_TO_GNODE(p) << uv_hub_info->nasid_shift)
332 #define UV_GLOBAL_MMR64_BASE		(uv_hub_info->global_mmr_base)
338 #define UV_GLOBAL_MMR64_PNODE_SHIFT	(uv_hub_info->global_mmr_shift)
348 /* Local Bus from cpu's perspective */
356  * used by the system controller to monitor system-wide operation.
358  * 8 cpus per core, 2 threads per cpu) there are 32 cpu threads on
365 				 LOCAL_BUS_SIZE - \
383 /* global bits offset - number of local address bits in gpa for this UV arch */
386 	return uv_hub_info->gpa_shift;  in uv_gpa_shift()
393 	struct uv_gam_range_s *gr = uv_hub_info->gr_table;  in uv_gam_range()
394 	unsigned long pal = (pa & uv_hub_info->gpa_mask) >> UV_GAM_RANGE_SHFT;  in uv_gam_range()
395 	int i, num = uv_hub_info->gr_table_len;  in uv_gam_range()
399 			if (pal < gr->limit)  in uv_gam_range()
411 	int base = gr->base;  in uv_gam_range_base()
416 	return uv_hub_info->gr_table[base].limit;  in uv_gam_range_base()
419 /* socket phys RAM --> UV global NASID (UV4+) */
422 	return uv_gam_range(paddr)->nasid;  in uv_soc_phys_ram_to_nasid()
426 /* socket virtual --> UV global NASID (UV4+) */
432 /* socket phys RAM --> UV global physical address */
435 	unsigned int m_val = uv_hub_info->m_val;  in uv_soc_phys_ram_to_gpa()
437 	if (paddr < uv_hub_info->lowmem_remap_top)  in uv_soc_phys_ram_to_gpa()
438 		paddr |= uv_hub_info->lowmem_remap_base;  in uv_soc_phys_ram_to_gpa()
441 		paddr |= uv_hub_info->gnode_upper;  in uv_soc_phys_ram_to_gpa()
442 		paddr = ((paddr << uv_hub_info->m_shift)  in uv_soc_phys_ram_to_gpa()
443 						>> uv_hub_info->m_shift) |  in uv_soc_phys_ram_to_gpa()
444 			((paddr >> uv_hub_info->m_val)  in uv_soc_phys_ram_to_gpa()
445 						<< uv_hub_info->n_lshift);  in uv_soc_phys_ram_to_gpa()
448 						<< uv_hub_info->gpa_shift;  in uv_soc_phys_ram_to_gpa()
453 /* socket virtual --> UV global physical address */
466 /* UV global physical address --> socket phys RAM */
470 	unsigned long remap_base = uv_hub_info->lowmem_remap_base;  in uv_gpa_to_soc_phys_ram()
471 	unsigned long remap_top =  uv_hub_info->lowmem_remap_top;  in uv_gpa_to_soc_phys_ram()
472 	unsigned int m_val = uv_hub_info->m_val;  in uv_gpa_to_soc_phys_ram()
475 		gpa = ((gpa << uv_hub_info->m_shift) >> uv_hub_info->m_shift) |  in uv_gpa_to_soc_phys_ram()
476 			((gpa >> uv_hub_info->n_lshift) << uv_hub_info->m_val);  in uv_gpa_to_soc_phys_ram()
478 	paddr = gpa & uv_hub_info->gpa_mask;  in uv_gpa_to_soc_phys_ram()
480 		paddr -= remap_base;  in uv_gpa_to_soc_phys_ram()
484 /* gpa -> gnode */
487 	unsigned int n_lshift = uv_hub_info->n_lshift;  in uv_gpa_to_gnode()
492 	return uv_gam_range(gpa)->nasid >> 1;  in uv_gpa_to_gnode()
495 /* gpa -> pnode */
498 	return uv_gpa_to_gnode(gpa) & uv_hub_info->pnode_mask;  in uv_gpa_to_pnode()
501 /* gpa -> node offset */
504 	unsigned int m_shift = uv_hub_info->m_shift;  in uv_gpa_to_offset()
509 	return (gpa & uv_hub_info->gpa_mask) - uv_gam_range_base(gpa);  in uv_gpa_to_offset()
515 	return s2nid ? s2nid[socket - uv_hub_info->min_socket] : socket;  in _uv_socket_to_node()
520 	return _uv_socket_to_node(socket, uv_hub_info->socket_to_node);  in uv_socket_to_node()
525 	unsigned short *p2s = uv_hub_info->pnode_to_socket;  in uv_pnode_to_socket()
527 	return p2s ? p2s[pnode - uv_hub_info->min_pnode] : pnode;  in uv_pnode_to_socket()
530 /* pnode, offset --> socket virtual */
531 static inline void *uv_pnode_offset_to_vaddr(int pnode, unsigned long offset)  in uv_pnode_offset_to_vaddr()  argument
533 	unsigned int m_val = uv_hub_info->m_val;  in uv_pnode_offset_to_vaddr()
538 		return __va(((unsigned long)pnode << m_val) | offset);  in uv_pnode_offset_to_vaddr()
544 		return __va((unsigned long)offset);  in uv_pnode_offset_to_vaddr()
546 	base = (unsigned long)(uv_hub_info->gr_table[sockid - 1].limit);  in uv_pnode_offset_to_vaddr()
547 	return __va(base << UV_GAM_RANGE_SHFT | offset);  in uv_pnode_offset_to_vaddr()
553 	int pnode = apicid >> uv_hub_info->apic_pnode_shift;  in uv_apicid_to_pnode()
554 	unsigned short *s2pn = uv_hub_info->socket_to_pnode;  in uv_apicid_to_pnode()
556 	return s2pn ? s2pn[pnode - uv_hub_info->min_socket] : pnode;  in uv_apicid_to_pnode()
563 static inline unsigned long *uv_global_mmr32_address(int pnode, unsigned long offset)  in uv_global_mmr32_address()  argument
566 		       UV_GLOBAL_MMR32_PNODE_BITS(pnode) | offset);  in uv_global_mmr32_address()
569 static inline void uv_write_global_mmr32(int pnode, unsigned long offset, unsigned long val)  in uv_write_global_mmr32()  argument
571 	writeq(val, uv_global_mmr32_address(pnode, offset));  in uv_write_global_mmr32()
574 static inline unsigned long uv_read_global_mmr32(int pnode, unsigned long offset)  in uv_read_global_mmr32()  argument
576 	return readq(uv_global_mmr32_address(pnode, offset));  in uv_read_global_mmr32()
583 static inline volatile void __iomem *uv_global_mmr64_address(int pnode, unsigned long offset)  in uv_global_mmr64_address()  argument
586 		    UV_GLOBAL_MMR64_PNODE_BITS(pnode) | offset);  in uv_global_mmr64_address()
589 static inline void uv_write_global_mmr64(int pnode, unsigned long offset, unsigned long val)  in uv_write_global_mmr64()  argument
591 	writeq(val, uv_global_mmr64_address(pnode, offset));  in uv_write_global_mmr64()
594 static inline unsigned long uv_read_global_mmr64(int pnode, unsigned long offset)  in uv_read_global_mmr64()  argument
596 	return readq(uv_global_mmr64_address(pnode, offset));  in uv_read_global_mmr64()
599 static inline void uv_write_global_mmr8(int pnode, unsigned long offset, unsigned char val)  in uv_write_global_mmr8()  argument
601 	writeb(val, uv_global_mmr64_address(pnode, offset));  in uv_write_global_mmr8()
604 static inline unsigned char uv_read_global_mmr8(int pnode, unsigned long offset)  in uv_read_global_mmr8()  argument
606 	return readb(uv_global_mmr64_address(pnode, offset));  in uv_read_global_mmr8()
613 static inline unsigned long *uv_local_mmr_address(unsigned long offset)  in uv_local_mmr_address()  argument
615 	return __va(UV_LOCAL_MMR_BASE | offset);  in uv_local_mmr_address()
618 static inline unsigned long uv_read_local_mmr(unsigned long offset)  in uv_read_local_mmr()  argument
620 	return readq(uv_local_mmr_address(offset));  in uv_read_local_mmr()
623 static inline void uv_write_local_mmr(unsigned long offset, unsigned long val)  in uv_write_local_mmr()  argument
625 	writeq(val, uv_local_mmr_address(offset));  in uv_write_local_mmr()
628 static inline unsigned char uv_read_local_mmr8(unsigned long offset)  in uv_read_local_mmr8()  argument
630 	return readb(uv_local_mmr_address(offset));  in uv_read_local_mmr8()
633 static inline void uv_write_local_mmr8(unsigned long offset, unsigned char val)  in uv_write_local_mmr8()  argument
635 	writeb(val, uv_local_mmr_address(offset));  in uv_write_local_mmr8()
638 /* Blade-local cpu number of current cpu. Numbered 0 .. <# cpus on the blade> */
641 	return uv_cpu_info->blade_cpu_id;  in uv_blade_processor_id()
644 /* Blade-local cpu number of cpu N. Numbered 0 .. <# cpus on the blade> */
645 static inline int uv_cpu_blade_processor_id(int cpu)  in uv_cpu_blade_processor_id()  argument
647 	return uv_cpu_info_per(cpu)->blade_cpu_id;  in uv_cpu_blade_processor_id()
656 /* Blade number of current cpu. Numbered 0 .. <#blades -1> */
659 	return uv_hub_info->numa_blade_id;  in uv_numa_blade_id()
665  * .. UV5 needs conversion when sub-numa clustering is enabled.
669 	unsigned short *n2s = uv_hub_info->node_to_socket;  in uv_node_to_blade_id()
674 /* Convert a CPU number to the UV blade number */
675 static inline int uv_cpu_to_blade_id(int cpu)  in uv_cpu_to_blade_id()  argument
677 	return uv_cpu_hub_info(cpu)->numa_blade_id;  in uv_cpu_to_blade_id()
683 	unsigned short *s2p = uv_hub_info->socket_to_pnode;  in uv_blade_to_pnode()
688 /* Nid of memory node on blade. -1 if no blade-local memory */
691 	return uv_hub_info_list(uv_blade_to_node(bid))->memory_nid;  in uv_blade_to_memory_nid()
697 	return uv_hub_info_list(uv_blade_to_node(bid))->nr_possible_cpus;  in uv_blade_nr_possible_cpus()
703 	return uv_hub_info_list(uv_blade_to_node(bid))->nr_online_cpus;  in uv_blade_nr_online_cpus()
706 /* Convert a cpu id to the PNODE of the blade containing the cpu */
707 static inline int uv_cpu_to_pnode(int cpu)  in uv_cpu_to_pnode()  argument
709 	return uv_cpu_hub_info(cpu)->pnode;  in uv_cpu_to_pnode()
715 	return uv_hub_info_list(nid)->pnode;  in uv_node_to_pnode()
742 /* BMC sets a bit this MMR non-zero before sending an NMI */
770 #define uv_cpu_nmi_per(cpu)		(per_cpu(uv_cpu_nmi, cpu))  argument
771 #define uv_hub_nmi_per(cpu)		(uv_cpu_nmi_per(cpu).hub)  argument
785 	return uv_hub_info->hub_revision;  in uv_get_min_hub_revision_id()