1 // SPDX-License-Identifier: GPL-2.0-only
3  * intel_tcc.c - Library for Intel TCC (thermal control circuitry) MSR access
10 #include <asm/intel-family.h>
14  * struct temp_masks - Bitmasks for temperature readings
15  * @tcc_offset:			TCC offset in MSR_TEMPERATURE_TARGET
129 		memcpy(&intel_tcc_temp_masks, (const void *)id->driver_data,  in intel_tcc_init()
141  * intel_tcc_get_offset_mask() - Returns the bitmask to read TCC offset
143  * Get the model-specific bitmask to extract TCC_OFFSET from the MSR
145  * not support TCC offset.
147  * Return: The model-specific bitmask for TCC offset.
156  * get_temp_mask() - Returns the model-specific bitmask for temperature
160  * Get the model-specific bitmask to extract the temperature reading from the
165  * Return: The model-specific bitmask for temperature reading
174  * intel_tcc_get_tjmax() - returns the default TCC activation Temperature
175  * @cpu: cpu that the MSR should be run on, nagative value means any cpu.
182 int intel_tcc_get_tjmax(int cpu)  in intel_tcc_get_tjmax()  argument
187 	if (cpu < 0)  in intel_tcc_get_tjmax()
190 		err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, &low, &high);  in intel_tcc_get_tjmax()
196 	return val ? val : -ENODATA;  in intel_tcc_get_tjmax()
201  * intel_tcc_get_offset() - returns the TCC Offset value to Tjmax
202  * @cpu: cpu that the MSR should be run on, nagative value means any cpu.
204  * Get the TCC offset value to Tjmax. The effective thermal throttling or TCC
205  * activation temperature equals "Tjmax" - "TCC Offset", in degrees C.
207  * Return: Tcc offset value in degrees C on success, negative error code otherwise.
209 int intel_tcc_get_offset(int cpu)  in intel_tcc_get_offset()  argument
214 	if (cpu < 0)  in intel_tcc_get_offset()
217 		err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, &low, &high);  in intel_tcc_get_offset()
226  * intel_tcc_set_offset() - set the TCC offset value to Tjmax
227  * @cpu: cpu that the MSR should be run on, nagative value means any cpu.
228  * @offset: TCC offset value in degree C
230  * Set the TCC Offset value to Tjmax. The effective thermal throttling or TCC
231  * activation temperature equals "Tjmax" - "TCC Offset", in degree C.
236 int intel_tcc_set_offset(int cpu, int offset)  in intel_tcc_set_offset()  argument
242 		return -ENODEV;  in intel_tcc_set_offset()
244 	if (offset < 0 || offset > intel_tcc_temp_masks.tcc_offset)  in intel_tcc_set_offset()
245 		return -EINVAL;  in intel_tcc_set_offset()
247 	if (cpu < 0)  in intel_tcc_set_offset()
250 		err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, &low, &high);  in intel_tcc_set_offset()
256 		return -EPERM;  in intel_tcc_set_offset()
259 	low |= offset << 24;  in intel_tcc_set_offset()
261 	if (cpu < 0)  in intel_tcc_set_offset()
264 		return wrmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, low, high);  in intel_tcc_set_offset()
269  * intel_tcc_get_temp() - returns the current temperature
270  * @cpu: cpu that the MSR should be run on, nagative value means any cpu.
271  * @temp: pointer to the memory for saving cpu temperature.
274  * Get the current temperature returned by the CPU core/package level
279 int intel_tcc_get_temp(int cpu, int *temp, bool pkg)  in intel_tcc_get_temp()  argument
285 	tjmax = intel_tcc_get_tjmax(cpu);  in intel_tcc_get_temp()
289 	if (cpu < 0)  in intel_tcc_get_temp()
292 		err = rdmsr_safe_on_cpu(cpu, msr, &low, &high);  in intel_tcc_get_temp()
298 		return -ENODATA;  in intel_tcc_get_temp()
302 	*temp = tjmax - ((low >> 16) & mask);  in intel_tcc_get_temp()