| /linux/Documentation/admin-guide/thermal/ |
| H A D | intel_powerclamp.rst | 6 - Arjan van de Ven <arjan@linux.intel.com>
7 - Jacob Pan <jacob.jun.pan@linux.intel.com>
12 - Goals and Objectives
15 - Idle Injection
16 - Calibration
19 - Effectiveness and Limitations
20 - Power vs Performance
21 - Scalability
22 - Calibration
23 - Comparison with Alternative Techniques
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| /linux/tools/perf/pmu-events/arch/s390/cf_z13/ |
| H A D | extended.json | 3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …blicDescription": "A directory write to the Level-1 Data cache where the line was originally in a …
10 "Unit": "CPU-M-CF",
14 …"PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookasi…
17 "Unit": "CPU-M-CF",
21 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB1 One-Megabyte Page Writes",
28 …": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer for a on…
[all …]
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| /linux/tools/perf/pmu-events/arch/x86/grandridge/ |
| H A D | uncore-io.json | 4 "Counter": "0,1,2,3",
13 "Counter": "0,1,2,3",
25 "Counter": "0,1,2,3",
37 "Counter": "0,1,2,3",
49 "Counter": "0,1,2,3",
61 "Counter": "0,1,2,3",
73 "Counter": "0,1,2,3",
85 "Counter": "0,1,2,3",
97 "Counter": "0,1,2,3",
109 "Counter": "0,1,2,3",
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| /linux/Documentation/translations/zh_CN/mm/ |
| H A D | mmu_notifier.rst | 28 - 上页表锁
29 - 清除页表项并通知 ([pmd/pte]p_huge_clear_flush_notify())
30 - 设置页表项以指向新页
37 两个地址addrA和addrB，这样|addrA - addrB| >= PAGE_SIZE，我们假设它们是COW的
42 [Time N] --------------------------------------------------------------------
43 CPU-thread-0 {尝试写到addrA}
44 CPU-thread-1 {尝试写到addrB}
45 CPU-thread-2 {}
46 CPU-thread-3 {}
47 DEV-thread-0 {读取addrA并填充设备TLB}
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| /linux/tools/perf/pmu-events/arch/s390/cf_z14/ |
| H A D | extended.json | 3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …blicDescription": "A directory write to the Level-1 Data cache where the line was originally in a …
10 "Unit": "CPU-M-CF",
17 "Unit": "CPU-M-CF",
21 …data cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on this …
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB2 One-Megabyte Page Writes",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page…
31 "Unit": "CPU-M-CF",
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| /linux/tools/perf/pmu-events/arch/s390/cf_z15/ |
| H A D | extended.json | 3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …blicDescription": "A directory write to the Level-1 Data cache where the line was originally in a …
10 "Unit": "CPU-M-CF",
17 "Unit": "CPU-M-CF",
21 …data cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on this …
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB2 One-Megabyte Page Writes",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page…
31 "Unit": "CPU-M-CF",
[all …]
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| /linux/tools/perf/pmu-events/arch/x86/emeraldrapids/ |
| H A D | uncore-io.json | 24 "Counter": "3",
84 "Counter": "0,1,2,3",
102 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-7",
103 "Counter": "0,1,2,3",
110 "PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 0-7",
116 "Counter": "0,1,2,3",
123 …serts of completions with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged …
129 "Counter": "0,1,2,3",
136 …serts of completions with data : Part 1 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged …
142 "Counter": "0,1,2,3",
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| /linux/tools/perf/pmu-events/arch/x86/sapphirerapids/ |
| H A D | uncore-io.json | 24 "Counter": "3",
164 "Counter": "0,1,2,3",
182 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-7",
183 "Counter": "0,1,2,3",
190 "PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 0-7",
196 "Counter": "0,1,2,3",
203 …serts of completions with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged …
209 "Counter": "0,1,2,3",
216 …serts of completions with data : Part 1 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged …
222 "Counter": "0,1,2,3",
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| /linux/tools/perf/pmu-events/arch/x86/graniterapids/ |
| H A D | uncore-io.json | 4 "Counter": "0,1,2,3",
13 "Counter": "0,1,2,3",
25 "Counter": "0,1,2,3",
37 "Counter": "0,1,2,3",
49 "Counter": "0,1,2,3",
61 "Counter": "0,1,2,3",
73 "Counter": "0,1,2,3",
85 "Counter": "0,1,2,3",
97 "Counter": "0,1,2,3",
109 "Counter": "0,1,2,3",
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| /linux/tools/perf/pmu-events/arch/x86/sierraforest/ |
| H A D | uncore-io.json | 4 "Counter": "0,1,2,3",
13 "Counter": "0,1,2,3",
25 "Counter": "0,1,2,3",
37 "Counter": "0,1,2,3",
49 "Counter": "0,1,2,3",
61 "Counter": "0,1,2,3",
73 "Counter": "0,1,2,3",
85 "Counter": "0,1,2,3",
97 "Counter": "0,1,2,3",
109 "Counter": "0,1,2,3",
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| /linux/include/trace/events/ |
| H A D | cpuhp.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
12 TP_PROTO(unsigned int cpu,
17 TP_ARGS(cpu, target, idx, fun),
20 __field( unsigned int, cpu )
27 __entry->cpu = cpu;
28 __entry->target = target;
29 __entry->idx = idx;
30 __entry->fun = fun;
33 TP_printk("cpu: %04u target: %3d step: %3d (%ps)",
34 __entry->cpu, __entry->target, __entry->idx, __entry->fun)
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| /linux/tools/perf/pmu-events/arch/s390/cf_zec12/ |
| H A D | extended.json | 3 "Unit": "CPU-M-CF",
7 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
10 "Unit": "CPU-M-CF",
14 …"PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle…
17 "Unit": "CPU-M-CF",
21 …on": "A directory write to the Level-1 Data cache directory where the returned cache line was sour…
24 "Unit": "CPU-M-CF",
28 … "A directory write to the Level-1 Instruction cache directory where the returned cache line was s…
31 "Unit": "CPU-M-CF",
35 …on": "A directory write to the Level-1 Data cache directory where the returned cache line was sour…
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| /linux/arch/arm/boot/dts/samsung/ |
| H A D | exynos5422-odroidxu3-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel Odroid XU3/XU3-Lite/XU4 boards common device tree source
12 #include <dt-bindings/input/input.h>
13 #include "exynos5422-odroid-core.dtsi"
20 gpio-keys {
21 compatible = "gpio-keys";
22 pinctrl-names = "default";
23 pinctrl-0 = <&power_key>;
25 power-key {
33 gpios = <&gpx0 3 GPIO_ACTIVE_LOW>;
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| H A D | exynos5422-odroidhc1.dts | 1 // SPDX-License-Identifier: GPL-2.0
10 /dts-v1/;
11 #include <dt-bindings/leds/common.h>
12 #include "exynos5422-odroid-core.dtsi"
16 compatible = "hardkernel,odroid-hc1", "samsung,exynos5800", \
19 led-controller {
20 compatible = "pwm-leds";
22 led-1 {
26 pwm-names = "pwm2";
27 max-brightness = <255>;
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| /linux/Documentation/mm/ |
| H A D | mmu_notifier.rst | 8 For secondary TLB (non CPU TLB) like IOMMU TLB or device TLB (when device use
9 thing like ATS/PASID to get the IOMMU to walk the CPU page table to access a
23 - take page table lock
24 - clear page table entry and notify ([pmd/pte]p_huge_clear_flush_notify())
25 - set page table entry to point to new page
33 Two address addrA and addrB such that \|addrA - addrB\| >= PAGE_SIZE we assume
38 [Time N] --------------------------------------------------------------------
39 CPU-thread-0 {try to write to addrA}
40 CPU-thread-1 {try to write to addrB}
41 CPU-thread-2 {}
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| /linux/tools/perf/pmu-events/arch/x86/snowridgex/ |
| H A D | uncore-io.json | 13 …CPU : Card reading from DRAM : Number of DWs (4 bytes) the card requests of the main die. Inclu…
29 …CPU : Card writing to DRAM : Number of DWs (4 bytes) the card requests of the main die. Include…
56 "Counter": "3",
116 "Counter": "0,1,2,3",
134 "Counter": "0,1,2,3",
145 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-7",
146 "Counter": "0,1,2,3",
152 "PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 0-7",
158 "Counter": "0,1,2,3",
164 …serts of completions with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged …
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| /linux/kernel/ |
| H A D | watchdog_buddy.c | 1 // SPDX-License-Identifier: GPL-2.0
3 #include <linux/cpu.h>
7 #include <linux/percpu-defs.h>
11 static unsigned int watchdog_next_cpu(unsigned int cpu) in watchdog_next_cpu() argument
15 next_cpu = cpumask_next_wrap(cpu, &watchdog_cpus); in watchdog_next_cpu()
16 if (next_cpu == cpu) in watchdog_next_cpu()
27 void watchdog_hardlockup_enable(unsigned int cpu) in watchdog_hardlockup_probe()
32 * The new CPU wil in watchdog_hardlockup_enable()
30 watchdog_hardlockup_enable(unsigned int cpu) watchdog_hardlockup_enable() argument
64 watchdog_hardlockup_disable(unsigned int cpu) watchdog_hardlockup_disable() argument
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| /linux/kernel/sched/ |
| H A D | topology.c | 1 // SPDX-License-Identifier: GPL-2.0
43 static int sched_domain_debug_one(struct sched_domain *sd, int cpu, int level, in sched_domain_debug_one() argument
46 struct sched_group *group = sd->groups; in sched_domain_debug_one()
47 unsigned long flags = sd->flags; in sched_domain_debug_one()
52 printk(KERN_DEBUG "%*s domain-%d: ", level, "", level); in sched_domain_debug_one()
54 cpumask_pr_args(sched_domain_span(sd)), sd->name); in sched_domain_debug_one()
56 if (!cpumask_test_cpu(cpu, sched_domain_span(sd))) { in sched_domain_debug_one()
57 printk(KERN_ERR "ERROR: domain->span does not contain CPU%d\n", cpu); in sched_domain_debug_one()
59 if (group && !cpumask_test_cpu(cpu, sched_group_span(group))) { in sched_domain_debug_one()
60 printk(KERN_ERR "ERROR: domain->groups does not contain CPU%d\n", cpu); in sched_domain_debug_one()
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| /linux/tools/perf/pmu-events/arch/x86/icelakex/ |
| H A D | uncore-io.json | 24 "Counter": "3",
84 "Counter": "0,1,2,3",
103 "Counter": "0,1,2,3",
114 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-7",
115 "Counter": "0,1,2,3",
121 "PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 0-7",
127 "Counter": "0,1,2,3",
133 …serts of completions with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged …
139 "Counter": "0,1,2,3",
145 …serts of completions with data : Part 1 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged …
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| /linux/Documentation/translations/zh_CN/core-api/ |
| H A D | workqueue.rst | 1 .. SPDX-License-Identifier: GPL-2.0
2 .. include:: ../disclaimer-zh_CN.rst
4 :Original: Documentation/core-api/workqueue.rst
109 每个与实际CPU绑定的worker-pool通过钩住调度器来实现并发管理。每当
139 参数 - ``@name`` , ``@flags`` 和 ``@max_active`` 。
148 ---------
202 --------------
234 0 w0 starts and burns CPU
236 15 w0 wakes up and burns CPU
238 20 w1 starts and burns CPU
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| /linux/arch/riscv/boot/dts/sophgo/ |
| H A D | sg2044-cpus.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 #address-cells = <2>;
8 #size-cells = <2>;
11 #address-cells = <1>;
12 #size-cells = <0>;
13 timebase-frequency = <50000000>;
15 cpu0: cpu@0 {
18 i-cache-block-size = <64>;
19 i-cache-size = <65536>;
20 i-cache-sets = <512>;
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| /linux/tools/power/x86/intel_pstate_tracer/ |
| H A D | intel_pstate_tracer.py | 2 # SPDX-License-Identifier: GPL-2.0-only
3 # -*- coding: utf-8 -*-
7 - If there is Linux trace file with pstate_sample events enabled, then
9 - If user has not specified a trace file as input via command line parameters,
16 python3-gnuplot 1.8 or higher
18 gnuplot-py, python-gnuplot or python3-gnuplot, gnuplot-nox, ... )
20 HWP (Hardware P-States are disabled)
62 C_USEC = 3
79 print(' ./%s_tracer.py [-c cpus] -t <trace_file> -n <test_name>'%driver_name)
81 …print(' ./%s_tracer.py [--cpu cpus] ---trace_file <trace_file> --name <test_name>'%driver_nam…
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| /linux/arch/arm64/boot/dts/sprd/ |
| H A D | ums512.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/sprd,ums512-clk.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 #address-cells = <2>;
18 #size-cells = <0>;
20 cpu-map {
23 cpu = <&CPU0>;
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| /linux/Documentation/tools/rtla/ |
| H A D | rtla-hwnoise.rst | 1 .. SPDX-License-Identifier: GPL-2.0
6 rtla-hwnoise
8 ------------------------------------------
9 Detect and quantify hardware-related noise
10 ------------------------------------------
24 of threads as a consequence, only non-maskable interrupts and hardware-related
40 In the example below, the **rtla hwnoise** tool is set to run on CPUs *1-7*
41 on a system with 8 cores/16 threads with hyper-threading enabled.
47 # rtla hwnoise -c 1-7 -T 1 -d 10m -q
48 Hardware-related Noise
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| /linux/Documentation/translations/zh_TW/arch/arm64/ |
| H A D | booting.txt | 1 SPDX-License-Identifier: GPL-2.0
15 ---------------------------------------------------------------------
30 ---------------------------------------------------------------------
40 AArch64 異常模型由多個異常級（EL0 - EL3）組成，對於 EL0 和 EL1 異常級
45 這個術語來定義在將控制權交給 Linux 內核前 CPU 上執行的所有軟件。
53 3、解壓內核映像
58 -----------------
69 ---------------
80 3、解壓內核映像
81 -------------
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