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/freebsd/sys/contrib/device-tree/Bindings/arm/tegra/
H A Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
19 - nvidia,tegra124-pmc
[all …]
/freebsd/sys/contrib/device-tree/Bindings/soc/tegra/
H A Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
19 - nvidia,tegra124-pmc
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra210-p2180.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/mfd/max77620.h>
17 stdout-path = "serial0:115200n8";
26 vdd-supply = <&vdd_gpu>;
31 /delete-property/ dmas;
32 /delete-property/ dma-names;
37 /delete-property/ reg-shift;
39 compatible = "nvidia,tegra30-hsuart";
40 reset-names = "serial";
43 compatible = "brcm,bcm43540-bt";
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nvidia/
H A Dtegra20-trimslice.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h>
7 #include "tegra20-cpu-opp.dtsi"
20 stdout-path = "serial0:115200n8";
31 vdd-supply = <&hdmi_vdd_reg>;
32 pll-supply = <&hdmi_pll_reg>;
34 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
35 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
[all …]
H A Dtegra20-tamonten.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 stdout-path = "serial0:115200n8";
24 vdd-supply = <&hdmi_vdd_reg>;
25 pll-supply = <&hdmi_pll_reg>;
27 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
28 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
34 pinctrl-name
[all...]
H A Dtegra20-ventana.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/thermal/thermal.h>
7 #include "tegra20-cpu-opp.dtsi"
8 #include "tegra20-cpu-op
[all...]
H A Dtegra30-cardhu.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/thermal/thermal.h>
5 #include "tegra30-cpu-opp.dtsi"
6 #include "tegra30-cpu-opp-microvol
[all...]
H A Dtegra20-paz00.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/thermal/thermal.h>
8 #include "tegra20-cpu-opp.dtsi"
9 #include "tegra20-cpu-opp-microvolt.dtsi"
25 stdout-path = "serial0:115200n8";
44 vdd-supply = <&hdmi_vdd_reg>;
45 pll-supply = <&hdmi_pll_reg>;
47 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
[all …]
H A Dtegra30-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
16 nvidia,hpd-gpio =
18 pll-supply = <&reg_1v8_avdd_hdmi_pll>;
19 vdd-supply = <&reg_3v3_avdd_hdmi>;
24 lan-reset-
[all...]
H A Dtegra20-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0
22 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
23 nvidia,hpd-gpio =
25 pll-supply = <&reg_1v8_avdd_hdmi_pll>;
26 vdd-supply = <&reg_3v3_avdd_hdmi>;
31 lan-reset-n-hog {
32 gpio-hog;
34 output-high;
35 line-name = "LAN_RESET#";
38 /* Tri-stating GMI_WR_N on SODIMM pin 99 nPWE */
[all …]
H A Dtegra30-apalis-v1.1.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
16 avdd-pexa-supply = <&vdd2_reg>;
17 avdd-pexb-supply = <&vdd2_reg>;
18 avdd-pex-pll-suppl
[all...]
H A Dtegra124-nyan.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/thermal/thermal.h>
14 stdout-path = "serial0:115200n8";
20 * missing a unit-address. However, the bootloader on these Chromebook
22 * Adding the unit-address causes the bootloader to create a /memory
34 /delete-node/ memory@80000000;
40 vdd-supply = <&vdd_3v3_hdmi>;
41 pll-supply = <&vdd_hdmi_pll>;
42 hdmi-supply = <&vdd_5v0_hdmi>;
[all …]
H A Dtegra20-harmony.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
18 stdout-path = "serial0:115200n8";
37 hdmi-supply = <&vdd_5v0_hdmi>;
38 vdd-supply = <&hdmi_vdd_reg>;
39 pll-supply = <&hdmi_pll_reg>;
41 nvidia,ddc-i2
[all...]
H A Dtegra30-apalis.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 avdd-pexa-supply = <&vdd2_reg>;
16 avdd-pexb-supply = <&vdd2_reg>;
17 avdd-pex-pll-suppl
[all...]
H A Dtegra20-seaboard.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
18 stdout-path = "serial0:115200n8";
37 vdd-supply = <&hdmi_vdd_reg>;
38 pll-supply = <&hdmi_pll_reg>;
39 hdmi-supply = <&vdd_hdmi>;
41 nvidia,ddc-i2
[all...]
H A Dtegra114-asus-tf701t.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/input/input.h>
13 chassis-type = "convertible";
29 trusted-foundations {
30 compatible = "tlm,trusted-foundations";
31 tlm,version-major = <2>;
32 tlm,version-minor = <8>;
40 reserved-memory {
[all …]
H A Dtegra20-asus-tf101.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/atmel-maxtouch.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-binding
[all...]
H A Dtegra30-asus-nexus7-grouper-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/gpio-keys.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/power/summit,smb347-charger.h>
6 #include <dt-bindings/thermal/thermal.h>
9 #include "tegra30-cpu-opp.dtsi"
10 #include "tegra30-cpu-opp-microvolt.dtsi"
11 #include "tegra30-asus-lvds-display.dtsi"
27 * pre-existing /chosen node to be available to insert the
33 trusted-foundations {
[all …]
H A Dtegra30-lg-x3.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/gpio-keys.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/mfd/max77620.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #include "tegra30-cpu-opp.dtsi"
11 #include "tegra30-cpu-opp-microvolt.dtsi"
14 chassis-type = "handset";
30 * pre-existing /chosen node to be available to insert the
[all …]
H A Dtegra114-dalmore.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
9 #include <dt-bindings/input/input.h>
23 stdout-path = "serial0:115200n8";
34 hdmi-supply = <&vdd_5v0_hdmi>;
35 vdd-supply = <&vdd_hdmi_reg>;
36 pll-supply = <&palmas_smps3_reg>;
38 nvidia,ddc-i2
[all...]
H A Dtegra20-acer-a500-picasso.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/atmel-maxtouch.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-binding
[all...]
/freebsd/sys/arm/nvidia/tegra124/
H A Dtegra124_pmc.c1 /*-
135 #define WR4(_sc, _r, _v) bus_write_4((_sc)->mem_res, (_r), (_v))
136 #define RD4(_sc, _r) bus_read_4((_sc)->mem_res, (_r))
138 #define PMC_LOCK(_sc) mtx_lock(&(_sc)->mtx)
139 #define PMC_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx)
140 #define PMC_LOCK_INIT(_sc) mtx_init(&(_sc)->mtx, \
141 device_get_nameunit(_sc->dev), "tegra124_pmc", MTX_DEF)
142 #define PMC_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mtx);
143 #define PMC_ASSERT_LOCKED(_sc) mtx_assert(&(_sc)->mtx, MA_OWNED);
144 #define PMC_ASSERT_UNLOCKED(_sc) mtx_assert(&(_sc)->mtx, MA_NOTOWNED);
[all …]
/freebsd/sys/arm64/nvidia/tegra210/
H A Dtegra210_pmc.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
142 #define PMC_LOCK(_sc) mtx_lock(&(_sc)->mtx)
143 #define PMC_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx)
144 #define PMC_LOCK_INIT(_sc) mtx_init(&(_sc)->mtx, \
145 device_get_nameunit(_sc->dev), "tegra210_pmc", MTX_DEF)
146 #define PMC_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mtx);
147 #define PMC_ASSERT_LOCKED(_sc) mtx_assert(&(_sc)->mtx, MA_OWNED);
148 #define PMC_ASSERT_UNLOCKED(_sc) mtx_assert(&(_sc)->mtx, MA_NOTOWNED);
173 {"nvidia,tegra210-pmc", 1},
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dmmc-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ul
[all...]
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3308-roc-cc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
10 model = "Firefly ROC-RK3308-CC board";
11 compatible = "firefly,roc-rk3308-cc", "rockchip,rk3308";
19 stdout-path = "serial2:1500000n8";
22 ir-receiver {
23 compatible = "gpio-ir-receiver";
25 pinctrl-names = "default";
26 pinctrl-0 = <&ir_recv_pin>;
30 compatible = "pwm-ir-tx";
[all …]

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