controller\-data (full) in projects: linux

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Searched +full:controller +full:- +full:data (Results 1 – 25 of 1061) sorted by relevance

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/linux/drivers/input/joystick/
H A D	xpad.c	1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * Copyright (c) 2002 Marko Friedemann <mfr@bmx-chemnitz.de> 16 * - information from http://euc.jp/periphs/xbox-controller.ja.html 17 * - th 569 const u8 data; global() member 723 u8 data[XPAD_PKT_LEN]; global() member 792 xpad_process_packet(struct usb_xpad xpad,u16 cmd,unsigned char * data) xpad_process_packet() argument 864 xpad360_process_packet(struct usb_xpad * xpad,struct input_dev * dev,u16 cmd,unsigned char * data) xpad360_process_packet() argument 992 xpad360w_process_packet(struct usb_xpad * xpad,u16 cmd,unsigned char * data) xpad360w_process_packet() argument 1027 xpadone_process_packet(struct usb_xpad * xpad,u16 cmd,unsigned char * data,u32 len) xpadone_process_packet() argument 1522 xpad_play_effect(struct input_dev * dev,void * data,struct ff_effect * effect) xpad_play_effect() argument [all...]
/linux/include/linux/
H A D	mailbox_controller.h	1 /* SPDX-License-Identifier: GPL-2.0-only / 15 / Sentinel value distinguishing "no active request" from "NULL message data" / 16 #define MBOX_NO_MSG ((void )-1) 18 #define MBOX_TXDONE_BY_IRQ BIT(0) /* controller has remote RTR irq / 19 #define MBOX_TXDONE_BY_POLL BIT(1) / controller can read status of last TX / 23 struct mbox_chan_ops - methods to control mailbox channels 24 * @send_data: The API asks the MBOX controller driver, in atomic 26 * data is accepted for transmission, -EBUSY while rejecting 27 * if the remote hasn't yet read the last data sent. Actual 28 * transmission of data is reported by the controller via [all …]
H A D	mhi.h	`1 /* SPDX-License-Identifier: GPL-2.0 / 3 Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. 10 #include <linux/dma-direction.h> 27 * enum mhi_callback - MHI callback 29 * @MHI_CB_PENDING_DATA: New data available for client to process 51 * enum mhi_flags - Transfer flags 63 * enum mhi_device_type - Device types 64 * @MHI_DEVICE_XFER: Handles data transfer 73 * enum mhi_ch_type - Channel types 89 * struct mhi_buf - MHI Buffer description [all …]`
H A D	mhi_ep.h	1 /* SPDX-License-Identifier: GPL-2.0 / 9 #include <linux/dma-direction.h> 15 struct mhi_ep_channel_config - Channel configuration structure for controller 19 * @dir: Direction that data may flow on this channel 29 * struct mhi_ep_cntrl_config - MHI Endpoint controller configuration 30 * @mhi_version: MHI spec version supported by the controller 43 * struct mhi_ep_db_info - MHI Endpoint doorbell info 53 * struct mhi_ep_buf_info - MHI Endpoint transfer buffer info 59 * @cb: Callback to be executed by controller drivers after transfer completion (async) 74 * struct mhi_ep_cntrl - MHI Endpoint controller structure [all …]
/linux/Documentation/devicetree/bindings/gpio/
H A D	gpio-ep9301.yaml	`1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/gpio/gpio-ep9301.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: EP93xx GPIO controller 10 - Linus Walleij <linusw@kernel.org> 11 - Bartosz Golaszewski <brgl@bgdev.pl> 12 - Nikita Shubin <nikita.shubin@maquefel.me> 17 - const: cirrus,ep9301-gpio 18 - items: [all …]`
/linux/drivers/usb/musb/
H A D	ux500_dma.c	1 // SPDX-License-Identifier: GPL-2.0+ 8 * Copyright (C) 2011 ST-Ericsson SA 18 #include <linux/dma-mapping.h> 22 #include <linux/platform_data/usb-musb-ux500.h> 32 struct ux500_dma_controller controller; member 43 struct dma_controller controller; member 54 struct ux500_dma_channel ux500_channel = channel->private_data; in ux500_dma_callback() 55 struct musb_hw_ep hw_ep = ux500_channel->hw_ep; in ux500_dma_callback() 56 struct musb musb = hw_ep->musb; in ux500_dma_callback() 59 dev_dbg(musb->controller, "DMA rx transfer done on hw_ep=%d\n", in ux500_dma_callback() [all …]
/linux/Documentation/driver-api/usb/
H A D	writing_musb_glue_layer.rst	12 use Universal Host Controller Interface (UHCI) or Open Host Controller 15 Instead, these embedded UDC rely on the USB On-the-Go (OTG) 18 Dual-Role Controller (MUSB HDRC) found in the Mentor Graphics Inventra™ 21 As a self-taught exercise I have written an MUSB glue layer for the 28 .. _musb-basics: 33 To get started on the topic, please read USB On-the-Go Basics (see 42 Linux USB stack is a layered architecture in which the MUSB controller 43 hardware sits at the lowest. The MUSB controller driver abstract the 44 MUSB controller hardware to the Linux USB stack:: 46 ------------------------ [all …]
/linux/drivers/usb/gadget/udc/
H A D	Kconfig	1 # SPDX-License-Identifier: GPL-2.0 4 # (a) a peripheral controller, and 7 # NOTE: Gadget support DOES NOT depend on host-side CONFIG_USB !! 9 # - Host systems (like PCs) need CONFIG_USB (with "A" jacks). 10 # - Peripherals (like PDAs) need CONFIG_USB_GADGET (with "B" jacks). 11 # - Some systems have both kinds of controllers. 13 # With help from a special transceiver and a "Mini-AB" jack, systems with 14 # both kinds of controller can also support "USB On-the-Go" (CONFIG_USB_OTG). 18 # USB Peripheral Controller Support 22 # - integrated/SOC controllers first [all …]
/linux/drivers/pinctrl/samsung/
H A D	pinctrl-exynos-arm.c	1 // SPDX-License-Identifier: GPL-2.0+ 20 #include <linux/soc/samsung/exynos-regs-pmu.h> 22 #include "pinctrl-samsung.h" 23 #include "pinctrl-exynos.h" 35 /* Retention control for S5PV210 are located at the end of clock controller / 49 unsigned int pud_val = drvdata->pud_val; in s5pv210_pud_value_init() 58 void __iomem clk_base = (void __iomem )drvdata->retention_ctrl->priv; in s5pv210_retention_disable() 69 const struct samsung_retention_data data) in s5pv210_retention_init() argument 75 ctrl = devm_kzalloc(drvdata->dev, sizeof(ctrl), GFP_KERNEL); in s5pv210_retention_init() 77 return ERR_PTR(-ENOMEM); in s5pv210_retention_init() [all …]
/linux/Documentation/devicetree/bindings/media/
H A D	microchip,csi2dc.yaml	1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Microchip CSI2 Demux Controller (CSI2DC) 10 - Eugen Hristev <eugen.hristev@microchip.com> 13 CSI2DC - Camera Serial Interface 2 Demux Controller 15 CSI2DC is a hardware block that receives incoming data from either from an 17 It filters IDI packets based on their data type and virtual channel 20 controller. 22 CSI2DC can act a simple bypass bridge if the incoming data is coming from [all …]
/linux/Documentation/spi/
H A D	spi-summary.rst	5 02-Feb-2012 8 ------------ 15 and parallel data lines with "Master Out, Slave In" (MOSI) or "Master In, 17 clocking modes through which data is exchanged; mode-0 and mode-3 are most 18 commonly used. Each clock cycle shifts data out and data in; the clock 19 doesn't cycle except when there is a data bit to shift. Not all data bits 32 - SPI may be used for request/response style device protocols, as with 35 - It may also be used to stream data in either direction (half duplex), 38 - Some devices may use eight bit words. Others may use different word 39 lengths, such as streams of 12-bit or 20-bit digital samples. [all …]
/linux/Documentation/wmi/devices/
H A D	msi-wmi-platform.rst	1 .. SPDX-License-Identifier: GPL-2.0-or-later 4 MSI WMI Platform Features driver (msi-wmi-platform) 11 by the embedded controller, with the ACPI firmware exposing a standard ACPI WMI interface on top 12 of the embedded controller interface. 18 data using the `bmfdec <https://github.com/pali/bmfdec>`_ utility: 24 guid("{ABBC0F60-8EA1-11d1-00A0-C90629100000}")] 26 [WmiDataId(1), read, write, Description("16 bytes of data")] uint8 Bytes[16]; 31 guid("{ABBC0F63-8EA1-11d1-00A0-C90629100000}")] 33 [WmiDataId(1), read, write, Description("32 bytes of data")] uint8 Bytes[32]; 38 guid("{ABBC0F6E-8EA1-11d1-00A0-C90629100000}")] [all …]
/linux/drivers/mtd/nand/raw/
H A D	technologic-nand-controller.c	1 // SPDX-License-Identifier: GPL-2.0 3 * Technologic Systems TS72xx NAND controller driver 33 struct nand_controller controller; member 47 switch (chip->ecc.engine_type) { in ts72xx_nand_attach_chip() 49 return -EINVAL; in ts72xx_nand_attach_chip() 51 if (chip->ecc.algo == NAND_ECC_ALGO_UNKNOWN) in ts72xx_nand_attach_chip() 52 chip->ecc.algo = NAND_ECC_ALGO_HAMMING; in ts72xx_nand_attach_chip() 53 chip->ecc.algo = NAND_ECC_ALGO_HAMMING; in ts72xx_nand_attach_chip() 62 struct ts72xx_nand_data *data = chip_to_ts72xx(chip); in ts72xx_nand_ctrl() local 63 unsigned char bits = ioread8(data->ctrl) & ~GENMASK(2, 0); in ts72xx_nand_ctrl() [all …]
H A D	cs553x_nand.c	1 // SPDX-License-Identifier: GPL-2.0-only 9 * This is a device driver for the NAND flash controller found on 11 * mtd-id for command line partitioning is cs553x_nand_cs[0-3] 12 * where 0-3 reflects the chip select for NAND. 34 #define MSR_NANDF_DATA 0x5140001b /* NAND Flash Data Timing MSR / 54 / Registers within the NAND flash controller BAR -- memory mapped / 56 #define MM_NAND_CTL 0x800 / Any even address 0x800-0x80e / 57 #define MM_NAND_IO 0x801 / Any odd address 0x801-0x80f / 65 / Registers within the NAND flash controller BAR -- I/O mapped / 98 to_cs553x(struct nand_controller controller) in to_cs553x() argument [all …]
/linux/drivers/reset/
H A D	reset-scmi.c	1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2019-2021 ARM Ltd. 11 #include <linux/reset-controller.h> 17 * struct scmi_reset_data - reset controller information structure 18 * @rcdev: reset controller entity 19 * @ph: ARM SCMI protocol handle used for communication with system controller 27 #define to_scmi_handle(p) (to_scmi_reset_data(p)->ph) 30 * scmi_reset_assert() - assert device reset 31 * @rcdev: reset controller entity 44 return reset_ops->assert(ph, id); in scmi_reset_assert() [all …]
H A D	reset-ti-sci.c	1 // SPDX-License-Identifier: GPL-2.0-only 3 * Texas Instrument's System Control Interface (TI-SCI) reset driver 5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/ 14 #include <linux/reset-controller.h> 18 * struct ti_sci_reset_control - reset control structure 19 * @dev_id: SoC-specific device identifier 21 * @lock: synchronize reset_mask read-modify-writes 30 * struct ti_sci_reset_data - reset controller information structure 31 * @rcdev: reset controller entity 32 * @dev: reset controller device pointer [all …]
/linux/drivers/dma/
H A D	acpi-dma.c	1 // SPDX-License-Identifier: GPL-2.0-only 3 * ACPI helpers for DMA request / controller 5 * Based on of-dma.c 15 #include <linux/dma-mapping.h> 32 * acpi_dma_parse_resource_group - match device and parse resource group 35 * @adma: struct acpi_dma of the given DMA controller 53 if (grp->shared_info_length != sizeof(struct acpi_csrt_shared_info)) in acpi_dma_parse_resource_group() 54 return -ENODEV; in acpi_dma_parse_resource_group() 62 if (resource_type(rentry->res) == IORESOURCE_MEM) in acpi_dma_parse_resource_group() 63 mem = rentry->res->start; in acpi_dma_parse_resource_group() [all …]
H A D	of-dma.c	1 // SPDX-License-Identifier: GPL-2.0-only 3 * Device tree helpers for DMA request / controller 7 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 24 * of_dma_find_controller - Get a DMA controller in DT DMA helpers list 27 * Finds a DMA controller with matching device node and number for dma cells 29 * to the DMA data stored is returned. A NULL pointer is returned if no match is 37 if (ofdma->of_node == dma_spec->np) in of_dma_find_controller() 40 pr_debug("%s: can't find DMA controller %pOF\n", __func__, in of_dma_find_controller() 41 dma_spec->np); in of_dma_find_controller() 47 * of_dma_router_xlate - translation function for router devices [all …]
/linux/drivers/spi/
H A D	spi-stm32.c	1 // SPDX-License-Identifier: GPL-2.0 3 // STMicroelectronics STM32 SPI Controller driver 5 // Copyright (C) 2017, STMicroelectronics - All Rights Reserved 12 #include <linux/dma-mapping.h> 202 #define STM32_SPI_HOST_MODE(stm32_spi) (!(stm32_spi)->device_mode) 203 #define STM32_SPI_DEVICE_MODE(stm32_spi) ((stm32_spi)->device_mode) 210 * struct stm32_spi_reg - stm32 SPI register & bitfield desc 222 * struct stm32_spi_regspec - stm32 registers definition, compatible dependent data 231 * @rx: SPI RX data register 232 * @tx: SPI TX data register [all …]
H A D	spi-davinci.c	1 // SPDX-License-Identifier: GPL-2.0-or-later 17 #include <linux/dma-mapping.h> 87 /* SPI Controller registers / 111 struct davinci_spi_platform_data - Platform data for SPI master device on DaVinci 117 * controller withn the SoC. Possible values are 0 and 1. 119 * @cshold_bug: set this to true if the SPI controller on your chip requires 134 * struct davinci_spi_config - Per-chip-select configuration for SPI slave devices 138 * @odd_parity: polarity of parity flag at the end of transmit data stream. 139 * 0 - odd parity, 1 - even parity. 141 * data stream. [all …]
/linux/drivers/pinctrl/
H A D	core.h	1 /* SPDX-License-Identifier: GPL-2.0-only / 5 Copyright (C) 2011 ST-Ericsson SA 6 * Written on behalf of Linaro for ST-Ericsson 14 #include <linux/radix-tree.h> 30 * struct pinctrl_dev - pin control class device 31 * @node: node to include this pin controller in the global pin controller list 32 * @desc: the pin controller descriptor supplied when initializing this pin 33 * controller 34 * @pin_desc_tree: each pin descriptor for this pin controller is stored in 40 * @gpio_ranges: a list of GPIO ranges that is handled by this pin controller, [all …]
/linux/include/linux/spi/
H A D	spi.h	1 /* SPDX-License-Identifier: GPL-2.0-or-later 26 /* Max no. of data lanes supported per spi device / 41 INTERFACES between SPI controller-side drivers and SPI target protocol handlers, 47 * struct spi_statistics - statistics for spi transfers 48 * @syncp: seqcount to protect members in this struct for per-cpu update 49 * on 32-bit systems 51 * @messages: number of spi-messages handled 100 u64_stats_update_begin(&__lstats->syncp); \ 101 u64_stats_add(&__lstats->field, count); \ 102 u64_stats_update_end(&__lstats->syncp); \ [all …]
/linux/drivers/slimbus/
H A D	slimbus.h	1 /* SPDX-License-Identifier: GPL-2.0 / 3 Copyright (c) 2011-2017, The Linux Foundation 48 /* Data channel management messages / 91 struct slim_framer - Represents SLIMbus framer. 92 * Every controller may have multiple framers. There is 1 active framer device 94 * Manager is responsible for framer hand-over. 111 * struct slim_msg_txn - Message to be sent by the controller. 120 * (relevant for message-codes involving read operation) 152 * enum slim_clk_state: SLIMbus controller's clock state used internally for 158 * @SLIM_CLK_PAUSED: SLIMbus controller clock has paused. [all …]
/linux/drivers/mtd/nand/
H A D	qpic_common.c	1 // SPDX-License-Identifier: GPL-2.0-only 9 #include <linux/dma-mapping.h> 16 #include <linux/mtd/nand-qpic-common.h> 19 * qcom_free_bam_transaction() - Frees the BAM transaction memory 20 * @nandc: qpic nand controller 26 struct bam_transaction bam_txn = nandc->bam_txn; in qcom_free_bam_transaction() 33 qcom_alloc_bam_transaction() - allocate BAM transaction 34 * @nandc: qpic nand controller 43 unsigned int num_cw = nandc->max_cwperpage; in qcom_alloc_bam_transaction() 48 ((sizeof(bam_txn->bam_ce) QPIC_PER_CW_CMD_ELEMENTS) + in qcom_alloc_bam_transaction() [all …]
/linux/Documentation/devicetree/bindings/auxdisplay/
H A D	hit,hd44780.yaml	1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Hitachi HD44780 Character LCD Controller 10 - Geert Uytterhoeven <geert@linux-m68k.org> 13 The Hitachi HD44780 Character LCD Controller is commonly used on character 15 interface, which can be used in either 4-bit or 8-bit mode. By using a 24 data-gpios: 26 GPIO pins connected to the data signal lines DB0-DB7 (8-bit mode) or 27 DB4-DB7 (4-bit mode) of the LCD Controller's bus interface. [all …]

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