/linux/drivers/input/joystick/ |
H A D | xpad.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * Copyright (c) 2002 Marko Friedemann <mfr@bmx-chemnitz.de> 16 * - information from http://euc.jp/periphs/xbox-controller.ja.html 17 * - the iForce driver drivers/char/joystick/iforce.c 18 * - the skeleton-driver drivers/usb/usb-skeleton.c 19 * - Xbox 360 information http://www.free60.org/wiki/Gamepad 20 * - Xbox One information https://github.com/quantus/xbox-one-controller-protocol 23 * - ITO Takayuki for providing essential xpad information on his website 24 * - Vojtech Pavlik - iforce driver / input subsystem 25 * - Greg Kroah-Hartman - usb-skeleton driver [all …]
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/linux/Documentation/devicetree/bindings/gpio/ |
H A D | gpio-ep9301.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/gpio/gpio-ep9301.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: EP93xx GPIO controller 10 - Linus Walleij <linus.walleij@linaro.org> 11 - Bartosz Golaszewski <brgl@bgdev.pl> 12 - Nikita Shubin <nikita.shubin@maquefel.me> 17 - const: cirrus,ep9301-gpio 18 - items: [all …]
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/linux/drivers/usb/musb/ |
H A D | ux500_dma.c | 1 // SPDX-License-Identifier: GPL-2.0+ 8 * Copyright (C) 2011 ST-Ericsson SA 18 #include <linux/dma-mapping.h> 22 #include <linux/platform_data/usb-musb-ux500.h> 32 struct ux500_dma_controller *controller; member 43 struct dma_controller controller; member 54 struct ux500_dma_channel *ux500_channel = channel->private_data; in ux500_dma_callback() 55 struct musb_hw_ep *hw_ep = ux500_channel->hw_ep; in ux500_dma_callback() 56 struct musb *musb = hw_ep->musb; in ux500_dma_callback() 59 dev_dbg(musb->controller, "DMA rx transfer done on hw_ep=%d\n", in ux500_dma_callback() [all …]
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/linux/drivers/dma/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 10 DMA engines can do asynchronous data transfers without 65 Enable support for Altera / Intel mSGDMA controller. 93 Enable support for Audio DMA Controller found on Apple Silicon SoCs. 96 tristate "Arm DMA-350 support" 101 Enable support for the Arm DMA-350 controller. 109 Support the Atmel AHB DMA controller. 116 Support the Atmel XDMA controller. 119 tristate "Analog Devices AXI-DMAC DMA support" 125 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA [all …]
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H A D | of-dma.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Device tree helpers for DMA request / controller 7 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 24 * of_dma_find_controller - Get a DMA controller in DT DMA helpers list 27 * Finds a DMA controller with matching device node and number for dma cells 29 * to the DMA data stored is returned. A NULL pointer is returned if no match is 37 if (ofdma->of_node == dma_spec->np) in of_dma_find_controller() 40 pr_debug("%s: can't find DMA controller %pOF\n", __func__, in of_dma_find_controller() 41 dma_spec->np); in of_dma_find_controller() 47 * of_dma_router_xlate - translation function for router devices [all …]
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/linux/drivers/usb/gadget/udc/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 4 # (a) a peripheral controller, and 7 # NOTE: Gadget support ** DOES NOT ** depend on host-side CONFIG_USB !! 9 # - Host systems (like PCs) need CONFIG_USB (with "A" jacks). 10 # - Peripherals (like PDAs) need CONFIG_USB_GADGET (with "B" jacks). 11 # - Some systems have both kinds of controllers. 13 # With help from a special transceiver and a "Mini-AB" jack, systems with 14 # both kinds of controller can also support "USB On-the-Go" (CONFIG_USB_OTG). 18 # USB Peripheral Controller Support 22 # - integrated/SOC controllers first [all …]
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/linux/drivers/pinctrl/samsung/ |
H A D | pinctrl-exynos-arm.c | 1 // SPDX-License-Identifier: GPL-2.0+ 20 #include <linux/soc/samsung/exynos-regs-pmu.h> 22 #include "pinctrl-samsung.h" 23 #include "pinctrl-exynos.h" 35 /* Retention control for S5PV210 are located at the end of clock controller */ 49 unsigned int *pud_val = drvdata->pud_val; in s5pv210_pud_value_init() 58 void __iomem *clk_base = (void __iomem *)drvdata->retention_ctrl->priv; in s5pv210_retention_disable() 69 const struct samsung_retention_data *data) in s5pv210_retention_init() argument 75 ctrl = devm_kzalloc(drvdata->dev, sizeof(*ctrl), GFP_KERNEL); in s5pv210_retention_init() 77 return ERR_PTR(-ENOMEM); in s5pv210_retention_init() [all …]
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/linux/Documentation/devicetree/bindings/media/ |
H A D | microchip,csi2dc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Microchip CSI2 Demux Controller (CSI2DC) 10 - Eugen Hristev <eugen.hristev@microchip.com> 13 CSI2DC - Camera Serial Interface 2 Demux Controller 15 CSI2DC is a hardware block that receives incoming data from either from an 17 It filters IDI packets based on their data type and virtual channel 20 controller. 22 CSI2DC can act a simple bypass bridge if the incoming data is coming from [all …]
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/linux/drivers/isdn/capi/ |
H A D | kcapi.c | 40 /* ------------------------------------------------------------- */ 45 u32 controller; member 48 /* ------------------------------------------------------------- */ 63 /* -------- controller ref counting -------------------------------------- */ 68 if (!try_module_get(ctr->owner)) in capi_ctr_get() 76 module_put(ctr->owner); in capi_ctr_put() 79 /* ------------------------------------------------------------- */ 83 if (contr < 1 || contr - 1 >= CAPI_MAXCONTR) in get_capi_ctr_by_nr() 86 return capi_controller[contr - 1]; in get_capi_ctr_by_nr() 93 if (applid < 1 || applid - 1 >= CAPI_MAXAPPL) in __get_capi_appl_by_nr() [all …]
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/linux/Documentation/wmi/devices/ |
H A D | msi-wmi-platform.rst | 1 .. SPDX-License-Identifier: GPL-2.0-or-later 4 MSI WMI Platform Features driver (msi-wmi-platform) 11 by the embedded controller, with the ACPI firmware exposing a standard ACPI WMI interface on top 12 of the embedded controller interface. 18 data using the `bmfdec <https://github.com/pali/bmfdec>`_ utility: 24 guid("{ABBC0F60-8EA1-11d1-00A0-C90629100000}")] 26 [WmiDataId(1), read, write, Description("16 bytes of data")] uint8 Bytes[16]; 31 guid("{ABBC0F63-8EA1-11d1-00A0-C90629100000}")] 33 [WmiDataId(1), read, write, Description("32 bytes of data")] uint8 Bytes[32]; 38 guid("{ABBC0F6E-8EA1-11d1-00A0-C90629100000}")] [all …]
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/linux/include/linux/ |
H A D | mhi_ep.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 9 #include <linux/dma-direction.h> 15 * struct mhi_ep_channel_config - Channel configuration structure for controller 19 * @dir: Direction that data may flow on this channel 29 * struct mhi_ep_cntrl_config - MHI Endpoint controller configuration 30 * @mhi_version: MHI spec version supported by the controller 43 * struct mhi_ep_db_info - MHI Endpoint doorbell info 53 * struct mhi_ep_buf_info - MHI Endpoint transfer buffer info 59 * @cb: Callback to be executed by controller drivers after transfer completion (async) 74 * struct mhi_ep_cntrl - MHI Endpoint controller structure [all …]
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/linux/drivers/mtd/nand/raw/ |
H A D | technologic-nand-controller.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Technologic Systems TS72xx NAND controller driver 33 struct nand_controller controller; member 47 switch (chip->ecc.engine_type) { in ts72xx_nand_attach_chip() 49 return -EINVAL; in ts72xx_nand_attach_chip() 51 if (chip->ecc.algo == NAND_ECC_ALGO_UNKNOWN) in ts72xx_nand_attach_chip() 52 chip->ecc.algo = NAND_ECC_ALGO_HAMMING; in ts72xx_nand_attach_chip() 53 chip->ecc.algo = NAND_ECC_ALGO_HAMMING; in ts72xx_nand_attach_chip() 62 struct ts72xx_nand_data *data = chip_to_ts72xx(chip); in ts72xx_nand_ctrl() local 63 unsigned char bits = ioread8(data->ctrl) & ~GENMASK(2, 0); in ts72xx_nand_ctrl() [all …]
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/linux/Documentation/spi/ |
H A D | spi-summary.rst | 5 02-Feb-2012 8 ------------ 15 and parallel data lines with "Master Out, Slave In" (MOSI) or "Master In, 17 clocking modes through which data is exchanged; mode-0 and mode-3 are most 18 commonly used. Each clock cycle shifts data out and data in; the clock 19 doesn't cycle except when there is a data bit to shift. Not all data bits 32 - SPI may be used for request/response style device protocols, as with 35 - It may also be used to stream data in either direction (half duplex), 38 - Some devices may use eight bit words. Others may use different word 39 lengths, such as streams of 12-bit or 20-bit digital samples. [all …]
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/linux/drivers/reset/ |
H A D | reset-scmi.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2019-2021 ARM Ltd. 11 #include <linux/reset-controller.h> 17 * struct scmi_reset_data - reset controller information structure 18 * @rcdev: reset controller entity 19 * @ph: ARM SCMI protocol handle used for communication with system controller 27 #define to_scmi_handle(p) (to_scmi_reset_data(p)->ph) 30 * scmi_reset_assert() - assert device reset 31 * @rcdev: reset controller entity 44 return reset_ops->assert(ph, id); in scmi_reset_assert() [all …]
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H A D | reset-ti-sci.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Texas Instrument's System Control Interface (TI-SCI) reset driver 5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/ 14 #include <linux/reset-controller.h> 18 * struct ti_sci_reset_control - reset control structure 19 * @dev_id: SoC-specific device identifier 21 * @lock: synchronize reset_mask read-modify-writes 30 * struct ti_sci_reset_data - reset controller information structure 31 * @rcdev: reset controller entity 32 * @dev: reset controller device pointer [all …]
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/linux/drivers/edac/ |
H A D | mpc85xx_edac.c | 2 * Freescale MPC85xx Memory Controller kernel module 8 * 2006-2007 (c) MontaVista Software, Inc. This file is licensed under 52 struct mpc85xx_pci_pdata *pdata = pci->pvt_info; in mpc85xx_pci_check() 55 err_detect = in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR); in mpc85xx_pci_check() 59 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, err_detect); in mpc85xx_pci_check() 67 in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_ATTRIB)); in mpc85xx_pci_check() 69 in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_ADDR)); in mpc85xx_pci_check() 71 in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EXT_ADDR)); in mpc85xx_pci_check() 73 in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DL)); in mpc85xx_pci_check() 75 in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DH)); in mpc85xx_pci_check() [all …]
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H A D | altera_edac.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 * Copyright (C) 2017-2018, Intel Corporation 10 #include <linux/arm-smccc.h> 14 /* SDRAM Controller CtrlCfg Register */ 17 /* SDRAM Controller CtrlCfg Register Bit Masks */ 25 /* SDRAM Controller Address Width Register */ 28 /* SDRAM Controller Address Widths Field Register */ 38 /* SDRAM Controller Interface Data Width Register */ 41 /* SDRAM Controller Interface Data Width Defines */ 45 /* SDRAM Controller DRAM Status Register */ [all …]
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H A D | synopsys_edac.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 * Copyright (C) 2012 - 2014 Xilinx, Inc. 19 /* Number of cs_rows needed per memory controller */ 22 /* Number of channels per memory controller */ 33 /* Synopsys DDR memory controller registers that are relevant to ECC */ 43 /* ECC data[31:0] register */ 94 /* ZynqMP Enhanced DDR memory controller registers that are relevant to ECC */ 268 * struct ecc_error_info - ECC error log information. 273 * @data: Data causing the error. 282 u32 data; member [all …]
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/linux/drivers/pinctrl/ |
H A D | core.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 5 * Copyright (C) 2011 ST-Ericsson SA 6 * Written on behalf of Linaro for ST-Ericsson 14 #include <linux/radix-tree.h> 30 * struct pinctrl_dev - pin control class device 31 * @node: node to include this pin controller in the global pin controller list 32 * @desc: the pin controller descriptor supplied when initializing this pin 33 * controller 34 * @pin_desc_tree: each pin descriptor for this pin controller is stored in 40 * @gpio_ranges: a list of GPIO ranges that is handled by this pin controller, [all …]
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/linux/drivers/spi/ |
H A D | spi-stm32.c | 1 // SPDX-License-Identifier: GPL-2.0 3 // STMicroelectronics STM32 SPI Controller driver 5 // Copyright (C) 2017, STMicroelectronics - All Rights Reserved 12 #include <linux/dma-mapping.h> 202 #define STM32_SPI_HOST_MODE(stm32_spi) (!(stm32_spi)->device_mode) 203 #define STM32_SPI_DEVICE_MODE(stm32_spi) ((stm32_spi)->device_mode) 206 * struct stm32_spi_reg - stm32 SPI register & bitfield desc 218 * struct stm32_spi_regspec - stm32 registers definition, compatible dependent data 227 * @rx: SPI RX data register 228 * @tx: SPI TX data register [all …]
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H A D | spi-davinci.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 16 #include <linux/dma-mapping.h> 22 #include <linux/platform_data/spi-davinci.h> 88 /* SPI Controller registers */ 103 /* SPI Controller driver's private data. */ 134 static void davinci_spi_rx_buf_u8(u32 data, struct davinci_spi *dspi) in davinci_spi_rx_buf_u8() argument 136 if (dspi->rx) { in davinci_spi_rx_buf_u8() 137 u8 *rx = dspi->rx; in davinci_spi_rx_buf_u8() 138 *rx++ = (u8)data; in davinci_spi_rx_buf_u8() 139 dspi->rx = rx; in davinci_spi_rx_buf_u8() [all …]
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/linux/drivers/slimbus/ |
H A D | slimbus.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 * Copyright (c) 2011-2017, The Linux Foundation 48 /* Data channel management messages */ 91 * struct slim_framer - Represents SLIMbus framer. 92 * Every controller may have multiple framers. There is 1 active framer device 94 * Manager is responsible for framer hand-over. 111 * struct slim_msg_txn - Message to be sent by the controller. 120 * (relevant for message-codes involving read operation) 152 * enum slim_clk_state: SLIMbus controller's clock state used internally for 158 * @SLIM_CLK_PAUSED: SLIMbus controller clock has paused. [all …]
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/linux/include/linux/spi/ |
H A D | spi.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later 38 * INTERFACES between SPI controller-side drivers and SPI target protocol handlers, 44 * struct spi_statistics - statistics for spi transfers 45 * @syncp: seqcount to protect members in this struct for per-cpu update 46 * on 32-bi 188 struct spi_controller *controller; global() member 284 spi_set_drvdata(struct spi_device * spi,void * data) spi_set_drvdata() argument 800 spi_controller_set_devdata(struct spi_controller * ctlr,void * data) spi_controller_set_devdata() argument 928 unsigned long long data[]; /* Guarantee ull alignment */ global() member [all...] |
/linux/Documentation/devicetree/bindings/auxdisplay/ |
H A D | hit,hd44780.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Hitachi HD44780 Character LCD Controller 10 - Geert Uytterhoeven <geert@linux-m68k.org> 13 The Hitachi HD44780 Character LCD Controller is commonly used on character 15 interface, which can be used in either 4-bit or 8-bit mode. By using a 24 data-gpios: 26 GPIO pins connected to the data signal lines DB0-DB7 (8-bit mode) or 27 DB4-DB7 (4-bit mode) of the LCD Controller's bus interface. [all …]
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/linux/drivers/hwmon/ |
H A D | asus_rog_ryujin.c | 1 // SPDX-License-Identifier: GPL-2.0+ 34 /* Controller status (speeds) report offsets */ 40 /* Controller duty report offsets */ 75 "Controller fan 1 speed", 76 "Controller fan 2 speed", 77 "Controller fan 3 speed", 78 "Controller fan 4 speed", 97 /* Sensor data */ 99 u16 speed_input[6]; /* Pump, internal fan and four controller fan speeds in RPM */ 100 u8 duty_input[3]; /* Pump, internal fan and controller fan duty in PWM */ [all …]
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