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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsCondMov.td1 //===-- MipsCondMov.td - Describe Mips Conditional Moves --*- tablegen -*--===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This is the Conditional Moves implementation.
11 //===----------------------------------------------------------------------===//
13 // Conditional moves:
16 // conditional move instructions.
54 // select patterns
59 def : MipsPat<(select (i32 (setge CRC:$lhs, CRC:$rhs)), DRC:$T, DRC:$F),
61 def : MipsPat<(select (i32 (setuge CRC:$lhs, CRC:$rhs)), DRC:$T, DRC:$F),
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H A DMips16InstrInfo.td1 //===- Mips16InstrInfo.td - Target Description for Mips16 -*- tablegen -*-=//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
30 // keeping the sp-relative load and the other varieties separate at the
32 // emitted by -verify-machineinstrs and the output ends up correct as long
48 // I-type instruction format
118 // EXT-CCRR Instruction format
148 // EXT-I instruction format
155 // EXT-I8 instruction format
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/
H A DControlHeightReduction.cpp1 //===-- ControlHeightReduction.cpp - Control Height Reduction -------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This pass merges conditional blocks of code and reduces the number of
10 // conditional branches in the hot paths based on profiles.
12 //===----------------------------------------------------------------------===//
52 static cl::opt<bool> DisableCHR("disable-chr", cl::init(false), cl::Hidden,
55 static cl::opt<bool> ForceCHR("force-chr", cl::init(false), cl::Hidden,
59 "chr-bias-threshold", cl::init(0.99), cl::Hidden,
63 "chr-merge-threshold", cl::init(2), cl::Hidden,
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DSelectOptimize.cpp1 //===--- SelectOptimize.cpp - Convert select to branches if profitable ---===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This pass converts selects to conditional jumps when profitable.
11 //===----------------------------------------------------------------------===//
47 #define DEBUG_TYPE "select-optimize"
50 "Number of select groups considered for conversion to branch");
52 "Number of select groups converted due to expensive cold operand");
54 "Number of select groups converted due to high-predictability");
56 "Number of select groups not converted due to unpredictability");
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H A DEarlyIfConversion.cpp1 //===-- EarlyIfConversion.cpp - If-conversion on SSA form machine code ----===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // Early if-conversion is for out-of-order CPUs that don't have a lot of
10 // predicable instructions. The goal is to eliminate conditional branches that
16 //===----------------------------------------------------------------------===//
43 #define DEBUG_TYPE "early-ifcvt"
48 BlockInstrLimit("early-ifcvt-limit", cl::init(30), cl::Hidden,
51 // Stress testing mode - disable heuristics.
52 static cl::opt<bool> Stress("stress-early-ifcvt", cl::Hidden,
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/freebsd/sys/arm64/coresight/
H A Dcoresight_etm4x.h1 /*-
2 * Copyright (c) 2018-2020 Ruslan Bukin <br@bsdpad.com>
7 * FA8650-15-C-7558 ("CADETS"), as part of the DARPA Transparent Computing
37 #define TRCPROCSELR 0x008 /* Trace PE Select Control Register */
49 #define TRCCONFIGR_COND_S 8 /* Conditional instruction tracing bit. */
52 #define TRCCONFIGR_COND_LDR (1 << TRCCONFIGR_COND_S) /* Conditional load instructions are traced. …
53 #define TRCCONFIGR_COND_STR (2 << TRCCONFIGR_COND_S) /* Conditional store instructions are traced.…
54 #define TRCCONFIGR_COND_LDRSTR (3 << TRCCONFIGR_COND_S) /* Conditional load and store instructions…
55 #define TRCCONFIGR_COND_ALL (7 << TRCCONFIGR_COND_S) /* All conditional instructions are traced. */
99 … << 10) /* The trace unit does not trace the address or value portions of PC-relative transfers. */
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DSimplifyCFG.cpp1 //===- SimplifyCFG.cpp - Code to perform CFG simplification ---------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
96 "simplifycfg-require-and-preserve-domtree", cl::Hidden,
102 // a select, so the "clamp" idiom (of a min followed by a max) will be caught.
103 // To catch this, we need to fold a compare and a select, hence '2' being the
106 "phi-node-folding-threshold", cl::Hidden, cl::init(2),
111 "two-entry-phi-node-folding-threshold", cl::Hidden, cl::init(4),
113 "to speculatively execute to fold a 2-entry PHI node into a "
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/freebsd/usr.bin/bmake/tests/shell/select/
H A DMakefile.test2 # We just select the builtin shells and check whether it is really
4 # normally don't have a ksh, we make this test conditional. This means
27 @ps -x -opid,command | awk '$$1=='$$$$' { print $$2; }'
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430BranchSelector.cpp1 //===-- MSP430BranchSelector.cpp - Emit long conditional branches ---------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 // conditional branches need more than 10 bits of displacement to reach their
15 //===----------------------------------------------------------------------===//
28 #define DEBUG_TYPE "msp430-branch-select"
31 BranchSelectEnabled("msp430-branch-select", cl::Hidden, cl::init(true),
67 // instructions have the signed 10-bit word offset field, so first we need to in isInRage()
68 // convert the distance from bytes to words, then check if it fits in 10-bit in isInRage()
83 // Give the blocks of the function a dense, in-order, numbering. in measureFunction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiInstrInfo.cpp1 //===-- LanaiInstrInfo.cpp - Lanai Instruction Information ------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
41 llvm_unreachable("Impossible reg-to-reg copy"); in copyPhysReg()
56 DL = Position->getDebugLoc(); in storeRegToStackSlot()
76 DL = Position->getDebugLoc(); in loadRegFromStackSlot()
108 if (BaseOpA->isIdenticalTo(*BaseOpB)) { in areMemAccessesTriviallyDisjoint()
172 {MO_ABS_HI, "lanai-hi"}, in getSerializableDirectMachineOperandTargetFlags()
173 {MO_ABS_LO, "lanai-lo"}, in getSerializableDirectMachineOperandTargetFlags()
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/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.h1 //===-- M68kISelLowering.h - M68k DAG Lowering Interface -------
49 SELECT, global() enumerator
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZPostRewrite.cpp1 //==---- SystemZPostRewrite.cpp - Select pseudos after RegAlloc ---*- C++ -*-=//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
14 //===----------------------------------------------------------------------===//
25 #define DEBUG_TYPE "systemz-postrewrite"
27 STATISTIC(LOCRMuxJumps, "Number of LOCRMux jump-sequences (lower is better)");
65 INITIALIZE_PASS(SystemZPostRewrite, "systemz-post-rewrite",
73 // MI is a load-register-on-condition pseudo instruction. Replace it with
82 Register DestReg = MBBI->getOperand(0).getReg(); in selectLOCRMux()
83 Register SrcReg = MBBI->getOperand(2).getReg(); in selectLOCRMux()
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/freebsd/crypto/openssl/include/internal/
H A Dconstant_time.h2 * Copyright 2014-2024 The OpenSSL Project Authors. All Rights Reserved.
18 /*-
21 * of a conditional in constant time. For example,
42 /* Convenience method for getting an 8-bit mask. */
51 /* Convenience method for getting an 8-bit mask. */
57 /* Convenience method for getting an 8-bit mask. */
59 /* Convenience method for getting a 32-bit mask. */
65 /* Convenience method for getting an 8-bit mask. */
70 /* Convenience method for getting an 8-bit mask. */
73 /*-
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.h1 //===- ARMISelLowering.h - ARM DAG Lowering Interface -----------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
60 Wrapper, // Wrapper - A wrapper node for TargetConstantPool,
62 WrapperPIC, // WrapperPIC - A wrapper node for TargetGlobalAddress in
64 WrapperJT, // WrapperJT - A wrapper node for TargetJumpTable
71 CALL_NOLINK, // Function call with branch not branch-and-link.
72 tSECALL, // CMSE non-secure function call.
74 BRCOND, // Conditional branch.
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DDFAJumpThreading.cpp1 //===- DFAJumpThreading.cpp - Threads a switch statement inside a loop ----===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
31 // The switch variable is always a known constant so that all conditional
37 // Representing the optimization in C-like pseudocode: the code pattern on the
58 //===----------------------------------------------------------------------===//
88 #define DEBUG_TYPE "dfa-jump-threading"
95 ClViewCfgBefore("dfa-jump-view-cfg-before",
100 "dfa-early-exit-heuristic",
105 "dfa-max-path-length",
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H A DJumpThreading.cpp1 //===- JumpThreading.cpp - Thread control through conditional blocks ------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
82 #define DEBUG_TYPE "jump-threading"
89 BBDuplicateThreshold("jump-threading-threshold",
95 "jump-threading-implication-search-threshold",
101 "jump-threading-phi-threshold",
106 "jump-threading-across-loop-headers",
111 DefaultBBDupThreshold = (T == -1) ? BBDuplicateThreshold : unsigned(T); in JumpThreadingPass()
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/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/MCTargetDesc/
H A DM68kMCCodeEmitter.cpp1 //===-- M68kMCCodeEmitter.cpp - Convert M68k code emitter -------*
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/freebsd/contrib/ncurses/progs/
H A Dtset.c2 * Copyright 2020-2021,2024 Thomas E. Dickey *
3 * Copyright 1998-2016,2017 Free Software Foundation, Inc. *
31 * Author: Zeyd M. Ben-Halim <zmbenhal@netcom.com> 1992,1995 *
33 * and: Thomas E. Dickey 1996-on *
53 * tset.c - terminal initialization utility
60 /*-
117 int cmp = LOWERCASE(*a) - LOWERCASE(*b); in CaselessCmp()
122 return LOWERCASE(*a) - LOWERCASE(*b); in CaselessCmp()
153 if ((int) len < (int) sizeof(temp) - 12) { in failed()
159 _nc_STRNCAT(temp, msg, sizeof(temp), sizeof(temp) - strlen(temp) - 2); in failed()
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/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DIVDescriptors.cpp1 //===- llvm/Analysis/IVDescriptors.cpp - IndVar Descriptors -----*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
30 #define DEBUG_TYPE "iv-descriptors"
34 for (const Use &Use : I->operands()) in areAllUsesIn()
64 /// Determines if Phi may have been type-promoted. If Phi has a single user
71 if (!Phi->hasOneUse()) in lookThroughAnd()
75 Instruction *I, *J = cast<Instruction>(Phi->use_begin()->getUser()); in lookThroughAnd()
77 // Matches either I & 2^x-1 or 2^x-1 & I. If we find a match, we update RT in lookThroughAnd()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h1 //==-- AArch64ISelLowering.h - AArch64 DAG Lowering Interface ----*- C++ -*-==//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
52 WrapperLarge, // 4-instruction MOVZ/MOVK sequence for 64-bit addresses.
94 BRCOND, // Conditional branch instruction; "b.cond".
96 CSINV, // Conditional select invert.
97 CSNEG, // Conditional select negate.
98 CSINC, // Conditional select increment.
177 // Conditional compares. Operands: left,right,falsecc,cc,flags
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCBranchSelector.cpp1 //===-- PPCBranchSelector.cpp - Emit long conditional branches ------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 // conditional branches need more than 16 bits of displacement to reach their
15 //===----------------------------------------------------------------------===//
31 #define DEBUG_TYPE "ppc-branch-select"
51 int FirstImpreciseBlock = -1;
73 INITIALIZE_PASS(PPCBSel, "ppc-branch-select", "PowerPC Branch Selector",
76 /// createPPCBranchSelectionPass - returns an instance of the Branch Selection
91 const Align ParentAlign = MBB.getParent()->getAlignment(); in GetAlignmentAdjustment()
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/freebsd/secure/usr.bin/openssl/man/
H A Dopenssl-fipsinstall.118 .\" Set up some character translations and predefined strings. \*(-- will
24 .tr \(*W-
27 . ds -- \(*W-
29 . if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
30 . if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
37 . ds -- \|\(em\|
71 .\" Fear. Run. Save yourself. No user-serviceable parts.
81 . ds #H ((1u-(\\\\n(.fu%2u))*.13m)
97 . ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
98 . ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
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/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaISelLowering.h1 //===- XtensaISelLowering.h - Xtensa DAG Lowering Interface -----*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
33 // Wraps a TargetGlobalAddress that should be loaded using PC-relative
38 // Select with condition operator - This selects between a true value and
40 // the lhs and rhs (ops #0 and #1) of a conditional expression with the
/freebsd/crypto/openssl/doc/man1/
H A Dopenssl-fipsinstall.pod.in2 {- OpenSSL::safe::output_do_not_edit_headers(); -}
6 openssl-fipsinstall - perform FIPS configuration installation
11 [B<-help>]
12 [B<-in> I<configfilename>]
13 [B<-out> I<configfilename>]
14 [B<-module> I<modulefilename>]
15 [B<-provider_name> I<providername>]
16 [B<-section_name> I<sectionname>]
17 [B<-verify>]
18 [B<-mac_name> I<macname>]
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h1 //===- llvm/CodeGen/TargetInstrInfo.h - Instruction Info --------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
107 //---------------------------------------------------------------------------
109 /// TargetInstrInfo - Interface to description of machine instruction set
175 /// converting to different instructions or making non-trivial changes
182 /// Do not call this method for a non-commutable instruction.
194 /// The predefined result indices cannot be re-defined.
205 /// if they exist (-1 otherwise). Some targets use pseudo instructions in
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