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Searched full:cmu_hsi0 (Results 1 – 9 of 9) sorted by relevance

/linux/Documentation/devicetree/bindings/clock/
H A Dsamsung,exynos990-clock.yaml70 - description: CMU_HSI0 BUS clock (from CMU_TOP)
71 - description: CMU_HSI0 USB31DRD clock (from CMU_TOP)
72 - description: CMU_HSI0 USBDP_DEBUG clock (from CMU_TOP)
73 - description: CMU_HSI0 DPGTC clock (from CMU_TOP)
123 cmu_hsi0: clock-controller@10a00000 {
H A Dsamsung,exynosautov920-clock.yaml106 - description: CMU_MISC/CMU_HSI0 NOC clock (from CMU_TOP)
/linux/arch/arm64/boot/dts/exynos/google/
H A Dgs101.dtsi1262 cmu_hsi0: clock-controller@11000000 { label
1282 clocks = <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_ACLK_PHYCTRL>,
1283 <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_I_USB20_PHY_REFCLK_26>,
1284 <&cmu_hsi0 CLK_GOUT_HSI0_UASC_HSI0_CTRL_ACLK>,
1285 <&cmu_hsi0 CLK_GOUT_HSI0_UASC_HSI0_CTRL_PCLK>,
1286 <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_I_USBDPPHY_SCL_APB_PCLK>;
1296 clocks = <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_BUS_CLK_EARLY>,
1297 <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_I_USB31DRD_SUSPEND_CLK_26>,
1298 <&cmu_hsi0 CLK_GOUT_HSI0_UASC_HSI0_LINK_ACLK>,
1299 <&cmu_hsi0 CLK_GOUT_HSI0_UASC_HSI0_LINK_PCLK>;
[all …]
/linux/include/dt-bindings/clock/
H A Dsamsung,exynosautov920.h227 /* CMU_HSI0 */
H A Dsamsung,exynos990.h212 /* CMU_HSI0 */
H A Dgoogle,gs101.h316 /* CMU_HSI0 */
/linux/arch/arm64/boot/dts/exynos/
H A Dexynos990.dtsi240 cmu_hsi0: clock-controller@10a00000 { label
H A Dexynosautov920.dtsi520 cmu_hsi0: clock-controller@16000000 { label
/linux/drivers/clk/samsung/
H A Dclk-gs101.c1917 /* ---- CMU_HSI0 ------------------------------------------------------------ */
1919 /* Register Offset definitions for CMU_HSI0 (0x11000000) */
2118 /* List of parent clocks for Muxes in CMU_HSI0 */