Searched full:cmu_fsys (Results 1 – 10 of 10) sorted by relevance
/freebsd/sys/contrib/device-tree/src/arm64/exynos/ |
H A D | exynos5433.dtsi | 416 cmu_fsys: clock-controller@156e0000 { 1760 clocks = <&cmu_fsys CLK_ACLK_USBDRD30>, 1761 <&cmu_fsys CLK_SCLK_USBDRD30>, 1762 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK>, 1763 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK>; 1772 clocks = <&cmu_fsys CLK_SCLK_USBDRD30>, 1773 <&cmu_fsys CLK_ACLK_USBDRD30>, 1774 <&cmu_fsys CLK_SCLK_USBDRD30>; 1786 clocks = <&cmu_fsys CLK_ACLK_USBDRD30>, <&xxti>, 1787 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOC 415 cmu_fsys: clock-controller@156e0000 { global() label [all...] |
H A D | exynos5433-tm2-common.dtsi | 261 &cmu_fsys { 264 <&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>, 265 <&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>, 266 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>, 267 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>, 268 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>, 269 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>, 276 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>, 277 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>, 278 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PH [all...] |
H A D | exynos7885.dtsi | 244 cmu_fsys: clock-controller@13400000 { 306 clocks = <&cmu_fsys CLK_GOUT_MMC_EMBD_ACLK>, 307 <&cmu_fsys CLK_GOUT_MMC_EMBD_SDCLKIN>; 243 cmu_fsys: clock-controller@13400000 { global() label
|
/freebsd/sys/contrib/device-tree/Bindings/pci/ |
H A D | samsung,exynos-pcie.yaml | 104 clocks = <&cmu_fsys CLK_PCIE>, <&cmu_fsys CLK_PCLK_PCIE_PHY>;
|
/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/ |
H A D | exynos7885.h | 134 /* CMU_FSYS */
|
H A D | exynos5260-clk.h | 262 /* List Of Clocks For CMU_FSYS */
|
H A D | exynos5433.h | 508 /* CMU_FSYS */
|
/freebsd/sys/contrib/device-tree/Bindings/clock/ |
H A D | exynos5433-clock.txt | 20 - "samsung,exynos5433-cmu-fsys" - clock controller compatible for CMU_FSYS 248 cmu_fsys: clock-controller@156e0000 {
|
H A D | samsung,exynos7885-clock.yaml | 103 - description: CMU_FSYS bus clock (from CMU_TOP)
|
H A D | samsung,exynos5433-clock.yaml | 39 # CMU_FSYS which generates clocks for USB/UFS/SDMMC/TSI/PDMA IPs
|