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/linux/drivers/clk/xilinx/
H A DKconfig21 tristate "Xilinx Clocking Wizard"
25 Support for the Xilinx Clocking Wizard IP core clock generator.
26 Adds support for clocking wizard and compatible.
27 This driver supports the Xilinx clocking wizard programmable clock
/linux/Documentation/devicetree/bindings/clock/ti/
H A Ddpll.txt43 "ssc-deltam" - DPLL supports spread spectrum clocking (SSC), contains
45 "ssc-modfreq" - DPLL supports spread spectrum clocking (SSC), contains
59 - ti,ssc-deltam : DPLL supports spread spectrum clocking, frequency
61 - ti,ssc-modfreq-hz : DPLL supports spread spectrum clocking, spread
63 - ti,ssc-downspread : DPLL supports spread spectrum clocking, boolean
/linux/Documentation/devicetree/bindings/clock/
H A Dmediatek,mt8186-fhctl.yaml7 title: MediaTek frequency hopping and spread spectrum clocking control
15 Spread spectrum clocking (SSC) is another function provided by this hardware.
35 description: The percentage of spread spectrum clocking for one PLL.
/linux/tools/perf/pmu-events/arch/arm64/ampere/emag/
H A Dclock.json7 "PublicDescription": "FSU clocking gated off cycle",
10 "BriefDescription": "FSU clocking gated off cycle"
/linux/drivers/ata/
H A Dpata_ns87415.c59 u16 clocking; in ns87415_set_mode() local
68 clocking = 17 - clamp_val(t.active, 2, 17); in ns87415_set_mode()
69 clocking |= (16 - clamp_val(t.recover, 1, 16)) << 4; in ns87415_set_mode()
71 clocking |= (clocking << 8); in ns87415_set_mode()
72 pci_write_config_word(dev, timing, clocking); in ns87415_set_mode()
331 /* Select PIO0 8bit clocking */ in ns87415_fixup()
H A Dpata_sc1200.c39 * Return the PCI bus clocking for the SC1200 chipset configuration
53 /* Clock generator configuration 0x901E its 8/9 are the PCI clocking in sc1200_clock()
/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-mpc.yaml38 fsl,preserve-clocking:
86 fsl,preserve-clocking;
/linux/Documentation/devicetree/bindings/net/
H A Dintel,ixp4xx-hss.yaml105 use internal clocking as opposed to external clocking
/linux/Documentation/admin-guide/pm/
H A Dcpufreq_drivers.rst94 Processor Clocking Control Driver
113 Processor Clocking Control (PCC) is an interface between the platform
129 https://acpica.org/sites/acpica/files/Processor-Clocking-Control-v1p0.pdf
184 * assumes responsibility for managing the hardware clocking controls in order
/linux/Documentation/devicetree/bindings/sound/
H A Dti,j721e-cpb-audio.yaml23 Clocking setup for j721e:
32 Clocking setup for j7200:
H A Dti,j721e-cpb-ivi-audio.yaml30 Clocking setup for 48KHz family:
37 Clocking setup for 44.1KHz family:
H A Dcirrus,lochnagar.yaml17 Audio system topology, clocking and power can all be controlled through
/linux/arch/powerpc/boot/dts/
H A Dpdm360ng.dts94 fsl,preserve-clocking;
112 fsl,preserve-clocking;
/linux/sound/soc/codecs/
H A Dcs35l35.h24 #define CS35L35_CLK_CTL1 0x0A /* Clocking Ctl 1 */
25 #define CS35L35_CLK_CTL2 0x0B /* Clocking Ctl 2 */
26 #define CS35L35_CLK_CTL3 0x0C /* Clocking Ctl 3 */
H A Dcs42l73.h28 #define CS42L73_XSPMMCC 0x0D /* XSP Master Mode Clocking Control. */
30 #define CS42L73_ASPMMCC 0x0F /* ASP Master Mode Clocking Control. */
32 #define CS42L73_VSPMMCC 0x11 /* VSP Master Mode Clocking Control. */
/linux/include/dt-bindings/clock/
H A Dlochnagar.h3 * Device Tree defines for Lochnagar clocking
/linux/drivers/mfd/
H A Dwm8994-regmap.c73 { 0x0200, 0x0000 }, /* R512 - AIF1 Clocking (1) */
74 { 0x0201, 0x0000 }, /* R513 - AIF1 Clocking (2) */
75 { 0x0204, 0x0000 }, /* R516 - AIF2 Clocking (1) */
76 { 0x0205, 0x0000 }, /* R517 - AIF2 Clocking (2) */
77 { 0x0208, 0x0000 }, /* R520 - Clocking (1) */
78 { 0x0209, 0x0000 }, /* R521 - Clocking (2) */
302 { 0x0200, 0x0000 }, /* R512 - AIF1 Clocking (1) */
303 { 0x0201, 0x0000 }, /* R513 - AIF1 Clocking (2) */
304 { 0x0204, 0x0000 }, /* R516 - AIF2 Clocking (1) */
305 { 0x0205, 0x0000 }, /* R517 - AIF2 Clocking (2) */
[all …]
/linux/drivers/fsi/
H A Dcf-fsi-fw.h36 #define FW_OPTION_CONT_CLOCK 0x00000002 /* Continuous clocking supported */
42 #define FW_CONTROL_CONT_CLOCK 0x00000002 /* Continuous clocking enabled */
/linux/drivers/clk/versatile/
H A DKconfig11 Supports clocking on ARM Reference designs:
/linux/Documentation/driver-api/
H A Dslimbus.rst36 Framer device is responsible for clocking the bus, and transmitting frame-sync
49 responsible to select the active-framer for clocking the bus.
/linux/Documentation/devicetree/bindings/hwmon/
H A Dcirrus,lochnagar.yaml17 Audio system topology, clocking and power can all be controlled through
/linux/arch/powerpc/boot/
H A Dbamboo.c9 * Clocking code based on code by:
/linux/arch/powerpc/platforms/52xx/
H A DKconfig18 - CDM configuration (clocking) is setup correctly by firmware,
/linux/Documentation/devicetree/bindings/net/wireless/
H A Dti,wl1251.txt9 - spi-max-frequency : Maximum SPI clocking speed of device in Hz
/linux/Documentation/devicetree/bindings/spi/
H A Dnvidia,tegra20-sflash.yaml46 description: Maximum SPI clocking speed of the controller in Hz.

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