| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | xlnx,clocking-wizard.yaml | 4 $id: http://devicetree.org/schemas/clock/xlnx,clocking-wizard.yaml#
7 title: Xilinx clocking wizard
13 The clocking wizard is a soft ip clocking block of Xilinx versal. It
20 - xlnx,clocking-wizard
21 - xlnx,clocking-wizard-v5.2
22 - xlnx,clocking-wizard-v6.0
46 runtime reconfguration of the clocking primitive MMCM/PLL.
75 compatible = "xlnx,clocking-wizard";
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| H A D | mediatek,mt8186-fhctl.yaml | 7 title: MediaTek frequency hopping and spread spectrum clocking control
15 Spread spectrum clocking (SSC) is another function provided by this hardware.
35 description: The percentage of spread spectrum clocking for one PLL.
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| /linux/drivers/clk/xilinx/ |
| H A D | Kconfig | 21 tristate "Xilinx Clocking Wizard"
25 Support for the Xilinx Clocking Wizard IP core clock generator.
26 Adds support for clocking wizard and compatible.
27 This driver supports the Xilinx clocking wizard programmable clock
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| /linux/include/media/i2c/ |
| H A D | upd64083.h | 28 /* YCS mode: Y/C separation (burst locked clocking) */
30 /* YCS+ mode: 2D Y/C separation and YCNR (burst locked clocking) */
35 /* MNNR mode: frame comb type YNR+C delay (line locked clocking) */
37 /* YCNR mode: frame recursive YCNR (burst locked clocking) */
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| /linux/Documentation/devicetree/bindings/clock/ti/ |
| H A D | dpll.txt | 43 "ssc-deltam" - DPLL supports spread spectrum clocking (SSC), contains
45 "ssc-modfreq" - DPLL supports spread spectrum clocking (SSC), contains
59 - ti,ssc-deltam : DPLL supports spread spectrum clocking, frequency
61 - ti,ssc-modfreq-hz : DPLL supports spread spectrum clocking, spread
63 - ti,ssc-downspread : DPLL supports spread spectrum clocking, boolean
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| /linux/drivers/ata/ |
| H A D | pata_ns87415.c | 59 u16 clocking; in ns87415_set_mode() local
68 clocking = 17 - clamp_val(t.active, 2, 17); in ns87415_set_mode()
69 clocking |= (16 - clamp_val(t.recover, 1, 16)) << 4; in ns87415_set_mode()
71 clocking |= (clocking << 8); in ns87415_set_mode()
72 pci_write_config_word(dev, timing, clocking); in ns87415_set_mode()
331 /* Select PIO0 8bit clocking */ in ns87415_fixup()
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| /linux/tools/perf/pmu-events/arch/arm64/ampere/emag/ |
| H A D | clock.json | 7 "PublicDescription": "FSU clocking gated off cycle",
10 "BriefDescription": "FSU clocking gated off cycle"
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| /linux/Documentation/devicetree/bindings/i2c/ |
| H A D | i2c-mpc.yaml | 38 fsl,preserve-clocking:
86 fsl,preserve-clocking;
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| /linux/Documentation/admin-guide/pm/ |
| H A D | cpufreq_drivers.rst | 94 Processor Clocking Control Driver
113 Processor Clocking Control (PCC) is an interface between the platform
129 https://acpica.org/sites/acpica/files/Processor-Clocking-Control-v1p0.pdf
184 * assumes responsibility for managing the hardware clocking controls in order
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| /linux/Documentation/devicetree/bindings/net/ |
| H A D | intel,ixp4xx-hss.yaml | 105 use internal clocking as opposed to external clocking
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| /linux/drivers/mfd/ |
| H A D | wm8994-regmap.c | 73 { 0x0200, 0x0000 }, /* R512 - AIF1 Clocking (1) */
74 { 0x0201, 0x0000 }, /* R513 - AIF1 Clocking (2) */
75 { 0x0204, 0x0000 }, /* R516 - AIF2 Clocking (1) */
76 { 0x0205, 0x0000 }, /* R517 - AIF2 Clocking (2) */
77 { 0x0208, 0x0000 }, /* R520 - Clocking (1) */
78 { 0x0209, 0x0000 }, /* R521 - Clocking (2) */
302 { 0x0200, 0x0000 }, /* R512 - AIF1 Clocking (1) */
303 { 0x0201, 0x0000 }, /* R513 - AIF1 Clocking (2) */
304 { 0x0204, 0x0000 }, /* R516 - AIF2 Clocking (1) */
305 { 0x0205, 0x0000 }, /* R517 - AIF2 Clocking (2) */
[all …]
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| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | ti,j721e-cpb-audio.yaml | 23 Clocking setup for j721e:
32 Clocking setup for j7200:
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| H A D | ti,j721e-cpb-ivi-audio.yaml | 30 Clocking setup for 48KHz family:
37 Clocking setup for 44.1KHz family:
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| /linux/sound/soc/codecs/ |
| H A D | cs35l35.h | 24 #define CS35L35_CLK_CTL1 0x0A /* Clocking Ctl 1 */
25 #define CS35L35_CLK_CTL2 0x0B /* Clocking Ctl 2 */
26 #define CS35L35_CLK_CTL3 0x0C /* Clocking Ctl 3 */
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| H A D | cs42l73.h | 28 #define CS42L73_XSPMMCC 0x0D /* XSP Master Mode Clocking Control. */
30 #define CS42L73_ASPMMCC 0x0F /* ASP Master Mode Clocking Control. */
32 #define CS42L73_VSPMMCC 0x11 /* VSP Master Mode Clocking Control. */
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| /linux/arch/powerpc/boot/dts/ |
| H A D | pdm360ng.dts | 94 fsl,preserve-clocking;
112 fsl,preserve-clocking;
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| /linux/drivers/fsi/ |
| H A D | cf-fsi-fw.h | 36 #define FW_OPTION_CONT_CLOCK 0x00000002 /* Continuous clocking supported */
42 #define FW_CONTROL_CONT_CLOCK 0x00000002 /* Continuous clocking enabled */
|
| /linux/Documentation/driver-api/ |
| H A D | slimbus.rst | 36 Framer device is responsible for clocking the bus, and transmitting frame-sync
49 responsible to select the active-framer for clocking the bus.
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| /linux/Documentation/sound/soc/ |
| H A D | index.rst | 17 clocking
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| /linux/include/dt-bindings/clock/ |
| H A D | lochnagar.h | 3 * Device Tree defines for Lochnagar clocking
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| /linux/drivers/clk/versatile/ |
| H A D | Kconfig | 11 Supports clocking on ARM Reference designs:
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| /linux/Documentation/devicetree/bindings/watchdog/ |
| H A D | nuvoton,npcm-wdt.txt | 15 Required clocking property, have to be one of:
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| /linux/Documentation/devicetree/bindings/hwmon/ |
| H A D | cirrus,lochnagar.yaml | 17 Audio system topology, clocking and power can all be controlled through
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| /linux/arch/powerpc/boot/ |
| H A D | bamboo.c | 9 * Clocking code based on code by:
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| /linux/drivers/clk/ |
| H A D | Kconfig | 40 Supports the clocking subsystem of the WM831x/2x series of
197 clocking support and five output dividers. The driver only supports
353 This driver supports the clocking features of the Cirrus Logic
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