| /linux/Documentation/devicetree/bindings/display/imx/ |
| H A D | nxp,imx8mq-dcss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/display/imx/nxp,imx8mq-dcss.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Laurentiu Palcu <laurentiu.palcu@nxp.com>
17 2.2) or MIPI-DSI. The DCSS is intended to support up to 4kp60 displays. HDR10
23 const: nxp,imx8mq-dcss
27 - description: DCSS base address and size, up to IRQ steer start
28 - description: DCSS BLKCTL base address and size
32 - description: Context loader completion and error interrupt
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| /linux/Documentation/devicetree/bindings/net/bluetooth/ |
| H A D | nokia,h4p-bluetooth.txt | 2 ---------------------
13 - compatible: should contain "nokia,h4p-bluetooth" as well as one of the following:
14 * "brcm,bcm2048-nokia"
15 * "ti,wl1271-bluetooth-nokia"
16 - reset-gpios: GPIO specifier, used to reset the BT module (active low)
17 - bluetooth-wakeup-gpios: GPIO specifier, used to wakeup the BT module (active high)
18 - host-wakeup-gpios: GPIO specifier, used to wakeup the host processor (active high)
19 - clock-names: should be "sysclk"
20 - clocks: should contain a clock specifier for every name in clock-names
24 - None
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| H A D | brcm,bluetooth.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
13 This binding describes Broadcom UART-attached bluetooth chips.
18 - items:
19 - enum:
20 - infineon,cyw43439-bt
21 - const: brcm,bcm4329-bt
22 - enum:
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| /linux/Documentation/devicetree/bindings/usb/ |
| H A D | hisilicon,histb-xhci.txt | 6 - compatible: should be "hisilicon,hi3798cv200-xhci"
7 - reg: specifies physical base address and size of the registers
8 - interrupts : interrupt used by the controller
9 - clocks: a list of phandle + clock-specifier pairs, one for each
10 entry in clock-names
11 - clock-names: must contain
12 "bus": for bus clock
13 "utmi": for utmi clock
14 "pipe": for pipe clock
15 "suspend": for suspend clock
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| H A D | ti,am62-usb.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/usb/ti,am62-usb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI's AM62 wrapper module for the Synopsys USBSS-DRD controller
10 - Aswath Govindraju <a-govindraju@ti.com>
14 const: ti,am62-usb
19 - description: USB CFG register space
20 - description: USB PHY2 register space
24 power-domains:
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| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | renesas,rzv2h-cpg.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/renesas,rzv2h-cpg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/{G3E,V2H(P),V2N} Clock Pulse Generator (CPG)
10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
13 On Renesas RZ/{G3E,V2H(P),V2N} SoCs, the CPG (Clock Pulse Generator) handles
14 generation and control of clock signals for the IP modules, generation and
21 - renesas,r9a09g047-cpg # RZ/G3E
22 - renesas,r9a09g056-cpg # RZ/V2N
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| /linux/Documentation/devicetree/bindings/pci/ |
| H A D | hisilicon-histb-pcie.txt | 6 Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml.
11 - compatible: Should be one of the following strings:
12 "hisilicon,hi3798cv200-pcie"
13 - reg: Should contain sysctl, rc_dbi, config registers location and length.
14 - reg-names: Must include the following entries:
16 "rc-dbi": configuration space of PCIe controller;
18 - bus-range: PCI bus numbers covered.
19 - interrupts: MSI interrupt.
20 - interrupt-names: Must include "msi" entries.
21 - clocks: List of phandle and clock specifier pairs as listed in clock-names
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| H A D | ti,j721e-pci-ep.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/pci/ti,j721e-pci-ep.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Kishon Vijay Abraham I <kishon@ti.com>
16 - const: ti,j721e-pcie-ep
17 - const: ti,j784s4-pcie-ep
18 - description: PCIe EP controller in AM64
20 - const: ti,am64-pcie-ep
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| /linux/Documentation/devicetree/bindings/hsi/ |
| H A D | omap-ssi.txt | 9 - compatible: Should include "ti,omap3-ssi" or "ti,omap4-hsi"
10 - reg-names: Contains the values "sys" and "gdd" (in this order).
11 - reg: Contains a matching register specifier for each entry
12 in reg-names.
13 - interrupt-names: Contains the value "gdd_mpu".
14 - interrupts: Contains matching interrupt information for each entry
15 in interrupt-names.
16 - ranges: Represents the bus address mapping between the main
18 - clock-names: Must include the following entries:
19 "ssi_ssr_fck": The OMAP clock of that name
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| /linux/Documentation/devicetree/bindings/media/ |
| H A D | hix5hd2-ir.txt | 1 Device-Tree bindings for hix5hd2 ir IP
4 - compatible: Should contain "hisilicon,hix5hd2-ir", or:
5 - "hisilicon,hi3796cv300-ir" for Hi3796CV300 IR device.
6 - reg: Base physical address of the controller and length of memory
8 - interrupts: interrupt-specifier for the sole interrupt generated by
9 the device. The interrupt specifier format depends on the interrupt
11 - clocks: clock phandle and specifier pair.
14 - linux,rc-map-name: see rc.txt file in the same directory.
15 - hisilicon,power-syscon: DEPRECATED. Don't use this in new dts files.
21 compatible = "hisilicon,hix5hd2-ir";
[all …]
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| H A D | st-rc.txt | 1 Device-Tree bindings for ST IRB IP
4 - compatible: Should contain "st,comms-irb".
5 - reg: Base physical address of the controller and length of memory
7 - interrupts: interrupt-specifier for the sole interrupt generated by
8 the device. The interrupt specifier format depends on the interrupt
10 - rx-mode: can be "infrared" or "uhf". This property specifies the L1
11 protocol used for receiving remote control signals. rx-mode should
13 - tx-mode: should be "infrared". This property specifies the L1
14 protocol used for transmitting remote control signals. tx-mode should
18 - pinctrl-names, pinctrl-0: the pincontrol settings to configure muxing
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| H A D | ti,omap3isp.txt | 4 The DT definitions can be found in include/dt-bindings/media/omap3-isp.h.
9 compatible : must contain "ti,omap3-isp"
15 interrupts : the ISP interrupt specifier
16 iommus : phandle and IOMMU specifier for the IOMMU that serves the ISP
17 syscon : the phandle and register offset to the Complex I/O or CSI-PHY
19 ti,phy-type : 0 -- OMAP3ISP_PHY_TYPE_COMPLEX_IO (e.g. 3430)
20 1 -- OMAP3ISP_PHY_TYPE_CSIPHY (e.g. 3630)
21 #clock-cells : Must be 1 --- the ISP provides two external clocks,
24 clock bindings in ../clock/clock-bindings.txt.
27 ---------------------
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| /linux/Documentation/devicetree/bindings/arm/ |
| H A D | vexpress-config.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/vexpress-config.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andre Przywara <andre.przywara@arm.com>
16 function and device numbers - see motherboard's TRM for more details.
20 const: arm,vexpress,config-bus
22 arm,vexpress,config-bridge:
31 const: arm,vexpress-muxfpga
33 arm,vexpress-sysreg,func:
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| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | adi,axi-spdif-tx.txt | 1 ADI AXI-SPDIF controller
4 - compatible : Must be "adi,axi-spdif-tx-1.00.a"
5 - reg : Must contain SPDIF core's registers location and length
6 - clocks : Pairs of phandle and specifier referencing the controller's clocks.
7 The controller expects two clocks, the clock used for the AXI interface and
8 the clock used as the sampling rate reference clock sample.
9 - clock-names: "axi" for the clock to the AXI interface, "ref" for the sample
10 rate reference clock.
11 - dmas: Pairs of phandle and specifier for the DMA channel that is used by
13 - dma-names : Must be "tx"
[all …]
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| H A D | adi,axi-i2s.txt | 1 ADI AXI-I2S controller
7 - compatible : Must be "adi,axi-i2s-1.00.a"
8 - reg : Must contain I2S core's registers location and length
9 - clocks : Pairs of phandle and specifier referencing the controller's clocks.
10 The controller expects two clocks, the clock used for the AXI interface and
11 the clock used as the sampling rate reference clock sample.
12 - clock-names : "axi" for the clock to the AXI interface, "ref" for the sample
13 rate reference clock.
14 - dmas: Pairs of phandle and specifier for the DMA channels that are used by
17 - dma-names : "tx" for the transmit channel, "rx" for the receive channel.
[all …]
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| /linux/Documentation/devicetree/bindings/display/hisilicon/ |
| H A D | hisi-ade.txt | 1 Device-Tree bindings for hisilicon ADE display controller driver
8 - compatible: value should be "hisilicon,hi6220-ade".
9 - reg: physical base address and length of the ADE controller's registers.
10 - hisilicon,noc-syscon: ADE NOC QoS syscon.
11 - resets: The ADE reset controller node.
12 - interrupt: the ldi vblank interrupt number used.
13 - clocks: a list of phandle + clock-specifier pairs, one for each entry
14 in clock-names.
15 - clock-names: should contain:
16 "clk_ade_core" for the ADE core clock.
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| /linux/Documentation/devicetree/bindings/powerpc/4xx/ |
| H A D | cpm.txt | 1 PPC4xx Clock Power Management (CPM) node
4 - compatible : compatible list, currently only "ibm,cpm"
5 - dcr-access-method : "native"
6 - dcr-reg : < DCR register range >
9 - er-offset : All 4xx SoCs with a CPM controller have
15 er-offset = <1>.
16 - unused-units : specifier consist of one cell. For each
20 - idle-doze : specifier consist of one cell. For each
24 - standby : specifier consist of one cell. For each
28 - suspend : specifier consist of one cell. For each
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| /linux/Documentation/devicetree/bindings/pwm/ |
| H A D | pwm-hibvt.txt | 4 -compatible: should contain one SoC specific compatible string
6 "hisilicon,hi3516cv300-pwm"
7 "hisilicon,hi3519v100-pwm"
8 "hisilicon,hi3559v100-shub-pwm"
9 "hisilicon,hi3559v100-pwm
10 - reg: physical base address and length of the controller's registers.
11 - clocks: phandle and clock specifier of the PWM reference clock.
12 - resets: phandle and reset specifier for the PWM controller reset.
13 - #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of
18 compatible = "hisilicon,hi3516cv300-pwm";
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| /linux/Documentation/devicetree/bindings/display/bridge/ |
| H A D | ti,sn65dsi86.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Douglas Anderson <dianders@chromium.org>
23 enable-gpios:
25 description: GPIO specifier for bridge_en pin (active high).
27 suspend-gpios:
29 description: GPIO specifier for GPIO1 pin on bridge (active low).
31 no-hpd:
37 vccio-supply:
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| /linux/Documentation/devicetree/bindings/reset/ |
| H A D | reset.txt | 9 a reset provider (e.g. power management or clock module) and received by a
10 reset consumer (the module being reset, or a module managing when a sub-
15 specifier - a list of DT cells that represents the reset signal within the
16 provider. The length (number of cells) and semantics of the reset specifier
35 #reset-cells: Number of cells in a reset specifier; Typically 0 for nodes
41 rst: reset-controller {
42 #reset-cells = <1>;
48 resets: List of phandle and reset specifier pairs, one pair
51 #reset-cells, then only the phandle portion of the pair will
55 reset-names: List of reset signal name strings sorted in the same order as
[all …]
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| /linux/Documentation/devicetree/bindings/remoteproc/ |
| H A D | ti,keystone-rproc.txt | 5 sub-systems that are used to offload some of the processor-intensive tasks or
8 These processor sub-systems usually contain additional sub-modules like L1
15 Each DSP Core sub-system is represented as a single DT node, and should also
22 --------------------
25 - compatible: Should be one of the following,
26 "ti,k2hk-dsp" for DSPs on Keystone 2 66AK2H/K SoCs
27 "ti,k2l-dsp" for DSPs on Keystone 2 66AK2L SoCs
28 "ti,k2e-dsp" for DSPs on Keystone 2 66AK2E SoCs
29 "ti,k2g-dsp" for DSPs on Keystone 2 66AK2G SoCs
31 - reg: Should contain an entry for each value in 'reg-names'.
[all …]
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| /linux/Documentation/devicetree/bindings/net/ |
| H A D | mdio.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
17 bus. These should follow the generic ethernet-phy.yaml document, or
22 pattern: '^mdio(-(bus|external))?(@.+|-([0-9]+))?$'
24 "#address-cells":
27 "#size-cells":
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| /linux/Documentation/devicetree/bindings/interconnect/ |
| H A D | interconnect.txt | 16 consumers, such as in the case where two network-on-chip fabrics interface
20 - compatible : contains the interconnect provider compatible string
21 - #interconnect-cells : number of cells in a interconnect specifier needed to
28 compatible = "qcom,msm8916-snoc";
29 #interconnect-cells = <1>;
31 clock-names = "bus_clk", "bus_a_clk";
46 interconnects : Pairs of phandles and interconnect provider specifier to denote
54 interconnect-names : List of interconnect path name strings sorted in the same
56 interconnect-names to match interconnect paths with interconnect
57 specifier pairs.
[all …]
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| /linux/Documentation/devicetree/bindings/watchdog/ |
| H A D | realtek,otto-wdt.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/watchdog/realtek,otto-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sander Vanheule <sander@svanheule.net>
14 prescaled clock ticks, which is ca. 43s with a bus clock of 200MHz. The
17 - Phase 1: During this phase, the WDT can be pinged to reset the timeout.
18 - Phase 2: Starts after phase 1 has timed out, and only serves to give the
24 - $ref: watchdog.yaml#
29 - realtek,rtl8380-wdt
[all …]
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| /linux/Documentation/devicetree/bindings/mmc/ |
| H A D | ti-omap-hsmmc.txt | 10 --------------------
11 - compatible:
12 Should be "ti,omap2-hsmmc", for OMAP2 controllers
13 Should be "ti,omap3-hsmmc", for OMAP3 controllers
14 Should be "ti,omap3-pre-es3-hsmmc" for OMAP3 controllers pre ES3.0
15 Should be "ti,omap4-hsmmc", for OMAP4 controllers
16 Should be "ti,am33xx-hsmmc", for AM335x controllers
17 Should be "ti,k2g-hsmmc", "ti,omap4-hsmmc" for 66AK2G controllers.
20 ---------------------------------
22 - ti,hwmods: Must be "mmc<n>", n is controller instance starting 1.
[all …]
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