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/freebsd/sys/dev/clk/
H A Dclknode_if.m1 #-
23 # OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 struct clknode *clk;
43 # Recalculate frequency
44 # req - in/out recalulated frequency
47 struct clknode *clk;
52 # Set frequency
53 # fin - parent (input)frequency.
54 # fout - requested output freqency. If clock cannot change frequency,
55 # then must return new requested frequency for his parent
[all …]
H A Dclk_fixed.c1 /*-
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
47 #include <dev/clk/clk_fixed.h>
52 static int clknode_fixed_init(struct clknode *clk, device_t dev);
53 static int clknode_fixed_recalc(struct clknode *clk, uint64_t *freq);
54 static int clknode_fixed_set_freq(struct clknode *clk, uint64_t fin,
75 clknode_fixed_init(struct clknode *clk, device_t dev) in clknode_fixed_init() argument
79 sc = clknode_get_softc(clk); in clknode_fixed_init()
80 if (sc->freq == 0) in clknode_fixed_init()
81 clknode_init_parent_idx(clk, 0); in clknode_fixed_init()
[all …]
H A Dclk.c1 /*-
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
49 #include <dev/clk/clk.h>
57 struct clk;
65 static int clknode_method_init(struct clknode *clk, device_t dev);
66 static int clknode_method_recalc_freq(struct clknode *clk, uint64_t *freq);
67 static int clknode_method_set_freq(struct clknode *clk, uint64_t fin,
69 static int clknode_method_set_gate(struct clknode *clk, bool enable);
70 static int clknode_method_set_mux(struct clknode *clk, int idx);
87 * Clock node - basic element for modeling SOC clock graph. It holds the clock
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dqca,ar803x.yaml1 # SPDX-License-Identifier: GPL-2.0+
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heine
[all...]
H A Dmotorcomm,yt8xxx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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/freebsd/sys/dev/qcom_clk/
H A Dqcom_clk_rcg2.c1 /*-
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 #include <dev/clk/clk.h>
35 #include <dev/clk/clk_div.h>
36 #include <dev/clk/clk_fixed.h>
37 #include <dev/clk/clk_mux.h>
52 ((sc)->cmd_rcgr + (sc)->cfg_offset + QCOM_CLK_RCG2_CFG_REG)
54 ((sc)->cmd_rcgr + QCOM_CLK_RCG2_CMD_REG)
56 ((sc)->cmd_rcgr + (sc)->cfg_offset + QCOM_CLK_RCG2_M_REG)
58 ((sc)->cmd_rcgr + (sc)->cfg_offset + QCOM_CLK_RCG2_N_REG)
[all …]
H A Dqcom_clk_apssdiv.c1 /*-
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 #include <dev/clk/clk.h>
35 #include <dev/clk/clk_div.h>
36 #include <dev/clk/clk_fixed.h>
37 #include <dev/clk/clk_mux.h>
66 qcom_clk_apssdiv_calc_rate(struct clknode *clk, uint64_t freq, uint32_t cdiv) in qcom_clk_apssdiv_calc_rate() argument
71 * The divisor isn't a linear map with a linear pre-divisor. in qcom_clk_apssdiv_calc_rate()
85 qcom_clk_apssdiv_recalc(struct clknode *clk, uint64_t *freq) in qcom_clk_apssdiv_recalc() argument
90 sc = clknode_get_softc(clk); in qcom_clk_apssdiv_recalc()
[all …]
H A Dqcom_clk_fdiv.c1 /*-
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 #include <dev/clk/clk.h>
35 #include <dev/clk/clk_div.h>
36 #include <dev/clk/clk_fixed.h>
37 #include <dev/clk/clk_mux.h>
48 * It likely should just live in the extres/clk code.
57 qcom_clk_fdiv_recalc(struct clknode *clk, uint64_t *freq) in qcom_clk_fdiv_recalc() argument
61 sc = clknode_get_softc(clk); in qcom_clk_fdiv_recalc()
64 printf("%s: called; NULL or 0 frequency\n", __func__); in qcom_clk_fdiv_recalc()
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mm-evk.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
9 #include <dt-bindings/usb/pd.h>
14 stdout-path = &uart2;
22 hdmi-connector {
23 compatible = "hdmi-connector";
29 remote-endpoint = <&adv7535_out>;
35 compatible = "gpio-leds";
36 pinctrl-names = "default";
[all …]
H A Dimx8mn-evk.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/usb/pd.h>
11 stdout-path = &uart2;
14 gpio-leds {
15 compatible = "gpio-leds";
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_gpio_led>;
22 default-state = "on";
26 hdmi-connector {
27 compatible = "hdmi-connector";
[all …]
H A Dimx8mq-evk.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de>
7 /dts-v1/;
13 compatible = "fsl,imx8mq-evk", "fsl,imx8mq";
16 stdout-path = &uart1;
24 pcie0_refclk: pcie0-refclk {
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
27 clock-frequency = <100000000>;
30 reg_pcie1: regulator-pcie {
[all …]
H A Dimx8mq-hummingboard-pulse.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (C) 2018 Jon Nettleton <jon@solid-run.com>
6 /dts-v1/;
8 #include "dt-bindings/usb/pd.h"
9 #include "imx8mq-sr-som.dtsi"
13 compatible = "solidrun,hummingboard-pulse", "fsl,imx8mq";
16 stdout-path = &uart1;
19 reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
20 compatible = "regulator-fixed";
21 pinctrl-names = "default";
[all …]
H A Dimx8mp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mp-clock.h>
7 #include <dt-bindings/power/imx8mp-power.h>
8 #include <dt-bindings/reset/imx8mp-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interconnect/fsl,imx8mp.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
15 #include "imx8mp-pinfunc.h"
[all …]
H A Dimx8mq.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de>
7 #include <dt-bindings/clock/imx8mq-clock.h>
8 #include <dt-bindings/power/imx8mq-power.h>
9 #include <dt-bindings/reset/imx8mq-reset.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include "dt-bindings/input/input.h"
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/interconnect/imx8mq.h>
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/zte/
H A Dzx296718.dtsi5 * This file is dual-licensed: you can use it either under the terms
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
44 #include <dt-bindings/input/input.h>
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/gpio/gpio.h>
47 #include <dt-bindings/clock/zx296718-clock.h>
51 #address-cells = <1>;
52 #size-cells = <1>;
53 interrupt-parent = <&gic>;
67 #address-cells = <2>;
[all …]
/freebsd/sys/kern/
H A Dsubr_clockcalib.c1 /*-
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * clockcalib(clk, clkname):
35 * Return the frequency of the provided timer, as calibrated against the
36 * current best-available timecounter.
39 clockcalib(uint64_t (*clk)(void), const char *clkname) in clockcalib()
54 /*- in clockcalib()
55 * The idea here is to compute a best-fit linear regression between in clockcalib()
57 * that line multiplied by the frequency of the reference clock gives in clockcalib()
58 * us the frequency we're looking for. in clockcalib()
[all …]
/freebsd/sys/arm/mv/clk/
H A Dperiph_clk_d.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 #include <dev/clk/clk.h>
39 #include <dev/clk/clk_div.h>
40 #include <dev/clk/clk_fixed.h>
41 #include <dev/clk/clk_gate.h>
42 #include <dev/clk/clk_mux.h>
53 * Register chain: mux (select proper TBG) -> div1 (first frequency divider) ->
54 * div2 (second frequency divider) -> mux (select divided freq.
[all …]
H A Dperiph_clk_fixed.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 #include <dev/clk/clk.h>
39 #include <dev/clk/clk_div.h>
40 #include <dev/clk/clk_fixed.h>
41 #include <dev/clk/clk_gate.h>
42 #include <dev/clk/clk_mux.h>
53 * Register clock with fixed frequency divider clock. Chain consists of:
54 * fixed clock (output from xtal/2) -> mux (choose fixed or xtal frequency)
[all …]
H A Dperiph_clk_mux_gate.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 #include <dev/clk/clk.h>
39 #include <dev/clk/clk_div.h>
40 #include <dev/clk/clk_fixed.h>
41 #include <dev/clk/clk_gate.h>
42 #include <dev/clk/clk_mux.h>
54 * Register chain: fixed (freq/2) -> mux (choose fixed or parent frequency) ->
68 dev_id = device_def->common_def.device_id; in a37x0_periph_register_mux_gate()
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/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dnvidia,tegra114-spi.txt4 - compatible : For Tegra114, must contain "nvidia,tegra114-spi".
5 Otherwise, must contain '"nvidia,<chip>-spi", "nvidia,tegra114-spi"' where
7 - reg: Should contain SPI registers location and length.
8 - interrupts: Should contain SPI interrupts.
9 - clock-names : Must include the following entries:
10 - spi
11 - resets : Must contain an entry for each entry in reset-names.
13 - reset-names : Must include the following entries:
14 - spi
15 - dmas : Must contain an entry for each entry in clock-names.
[all …]
/freebsd/sys/contrib/device-tree/Bindings/iio/adc/
H A Dst,stm32-dfsdm-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
11 - Olivier Moysan <olivier.moysan@foss.st.com>
14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
17 - Sigma delta modulators (motor control, metering...)
18 - PDM microphones (audio digital microphone)
28 - st,stm32h7-dfsdm
[all …]
/freebsd/sys/arm64/rockchip/
H A Drk3399_emmcphy.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
46 #include <dev/clk/clk.h>
102 { "rockchip,rk3399-emmc-phy", 1 },
109 clk_t clk; member
112 #define LOWEST_SET_BIT(mask) ((((mask) - 1) & (mask)) ^ (mask))
150 SYSCON_WRITE_4(sc->syscon, GRF_EMMCPHY_CON6, in rk_emmcphy_enable()
156 SYSCON_WRITE_4(sc->syscon, GRF_EMMCPHY_CON0, in rk_emmcphy_enable()
163 SYSCON_WRITE_4(sc->syscon, GRF_EMMCPHY_CON6, (mask << 16) | val); in rk_emmcphy_enable()
[all …]
/freebsd/sys/dev/usb/controller/
H A Dusb_nop_xceiv.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
44 #include <dev/clk/clk.h>
53 clk_t clk; member
58 {"usb-nop-xceiv", 1},
89 if (sc->clk_freq != 0) { in usb_nop_xceiv_phy_enable()
91 error = clk_set_freq(sc->clk, sc->clk_freq, in usb_nop_xceiv_phy_enable()
95 sc->clk_freq); in usb_nop_xceiv_phy_enable()
99 error = clk_enable(sc->clk); in usb_nop_xceiv_phy_enable()
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/amlogic/
H A Dmeson-gxbb-p20x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include "meson-gxbb.dtsi"
17 stdout-path = "serial0:115200n8";
25 usb_pwr: regulator-usb-pwrs {
26 compatible = "regulator-fixed";
28 regulator-name = "USB_PWR";
30 regulator-min-microvolt = <5000000>;
31 regulator-max-microvolt = <5000000>;
35 enable-active-high;
38 vddio_card: gpio-regulator {
[all …]
/freebsd/sys/arm/nvidia/
H A Dtegra_sdhci.c1 /*-
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
51 #include <dev/clk/clk.h>
95 {"nvidia,tegra124-sdhci", 1},
96 {"nvidia,tegra210-sdhci", 1},
108 clk_t clk; member
122 return (bus_read_4(sc->mem_res, off)); in RD4()
131 return (bus_read_1(sc->mem_res, off)); in tegra_sdhci_read_1()
140 return (bus_read_2(sc->mem_res, off)); in tegra_sdhci_read_2()
150 val32 = bus_read_4(sc->mem_res, off); in tegra_sdhci_read_4()
[all …]

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