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/linux/drivers/rtc/
H A Drtc-sunxi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
104 * The year parameter passed to the driver is usually an offset relative to
106 * relative to the minimum year allowed by the hardware.
108 #define SUNXI_YEAR_OFF(x) ((x)->min - 1900)
146 struct sunxi_rtc_dev *chip = (struct sunxi_rtc_dev *) id; in sunxi_rtc_alarmirq() local
149 val = readl(chip->base + SUNXI_ALRM_IRQ_STA); in sunxi_rtc_alarmirq()
153 writel(val, chip->base + SUNXI_ALRM_IRQ_STA); in sunxi_rtc_alarmirq()
155 rtc_update_irq(chip->rtc, 1, RTC_AF | RTC_IRQF); in sunxi_rtc_alarmirq()
163 static void sunxi_rtc_setaie(unsigned int to, struct sunxi_rtc_dev *chip) in sunxi_rtc_setaie() argument
169 alrm_val = readl(chip->base + SUNXI_ALRM_EN); in sunxi_rtc_setaie()
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H A Drtc-sun6i.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2014, Chen-Yu Tsai <wens@csie.org>
7 * based on rtc-sunxi.c
15 #include <linux/clk-provider.h>
16 #include <linux/clk/sunxi-ng.h>
73 /* General-purpose data */
108 * The year parameter passed to the driver is usually an offset relative to
110 * relative to the minimum year allowed by the hardware.
112 * The year range is 1970 - 2033. This range is selected to match Allwinner's
116 #define SUN6I_YEAR_OFF (SUN6I_YEAR_MIN - 1900)
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H A Drtc-ac100.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * RTC Driver for X-Powers AC100
5 * Copyright (c) 2016 Chen-Yu Tsai
7 * Chen-Yu Tsai <wens@csie.org>
11 #include <linux/clk-provider.h>
61 * The year parameter passed to the driver is usually an offset relative to
63 * relative to the minimum year allowed by the hardware.
65 * The year range is 1970 - 2069. This range is selected to match Allwinner's
70 #define AC100_YEAR_OFF (AC100_YEAR_MIN - 1900)
80 #define AC100_RTC_32K_NAME "ac100-rtc-32k"
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/linux/Documentation/hwmon/
H A Dlm77.rst10 Addresses scanned: I2C 0x48 - 0x4b
20 -----------
23 sensor incorporates a band-gap type temperature sensor,
24 10-bit ADC, and a digital comparator with user-programmable upper
29 applies to all 3 limits. The relative difference is stored in a single
30 register on the chip, which means that the relative difference between
42 read-only. Setting temp1_crit_hyst writes the difference between
43 temp1_crit_hyst and temp1_crit into the chip, and the same relative
H A Demc1403.rst14 - http://ww1.microchip.com/downloads/en/DeviceDoc/1412.pdf
15 - https://ww1.microchip.com/downloads/en/DeviceDoc/1402.pdf
25 - http://ww1.microchip.com/downloads/en/DeviceDoc/1403_1404.pdf
26 - http://ww1.microchip.com/downloads/en/DeviceDoc/1413_1414.pdf
36 - https://ww1.microchip.com/downloads/en/DeviceDoc/1422.pdf
46 - https://ww1.microchip.com/downloads/en/DeviceDoc/1423_1424.pdf
56 …- https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ProductDocuments/DataSheets/20005…
57 - https://ww1.microchip.com/downloads/en/DeviceDoc/EMC1438%20DS%20Rev.%201.0%20(04-29-10).pdf
64 -----------
74 hysteresis mechanism which applies to all limits. The relative difference
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H A Dchipcap2.rst1 .. SPDX-License-Identifier: GPL-2.0-or-later
12 Addresses scanned: -
14 …Datasheet: https://www.amphenol-sensors.com/en/telaire/humidity/527-humidity-sensors/3095-chipcap-2
18 - Javier Carrasco <javier.carrasco.cruz@gmail.com>
21 -----------
24 temperature chip family. Temperature is measured in milli degrees celsius,
25 relative humidity is expressed as a per cent mille. The measurement ranges
28 - Relative humidity: 0 to 100000 pcm (14-bit resolution)
29 - Temperature: -40000 to +125000 m°C (14-bit resolution)
39 might be truncated to match the 14-bit device resolution (6.1 pcm/LSB)
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H A Dmax6650.rst12 Datasheet: http://pdfserv.maxim-ic.com/en/ds/MAX6650-MAX6651.pdf
20 Datasheet: http://pdfserv.maxim-ic.com/en/ds/MAX6650-MAX6651.pdf
23 - Hans J. Koch <hjk@hansjkoch.de>
24 - John Morris <john.morris@spirentcom.com>
25 - Claus Gindhart <claus.gindhart@kontron.com>
28 -----------
33 set, e.g. only one fan-input, instead of 4 for the MAX6651.
47 pwm1 rw relative speed (0-255), 255=max. speed.
55 -----------
57 This driver does not auto-detect devices. You will have to instantiate the
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/linux/include/linux/gpio/
H A Dmachine.h1 /* SPDX-License-Identifier: GPL-2.0 */
22 * struct gpiod_lookup - lookup table
23 * @key: either the name of the chip the GPIO belongs to, or the GPIO line name
26 * @chip_hwnum: hardware number (i.e. relative to the chip) of the GPIO, or
50 * struct gpiod_hog - GPIO line hog table
51 * @chip_label: name of the chip the GPIO belongs to
52 * @chip_hwnum: hardware number (i.e. relative to the chip) of the GPIO
/linux/Documentation/ABI/testing/
H A Dsysfs-bus-iio-mpu60505 Contact: linux-iio@vger.kernel.org
9 [0, 1, 0; 1, 0, 0; 0, 0, -1]. Using this information, it would be
10 easy to tell the relative positions among sensors as well as their
11 positions relative to the board that holds these sensors. Identity matrix
12 [1, 0, 0; 0, 1, 0; 0, 0, 1] means sensor chip and device are perfectly
/linux/drivers/pwm/
H A Dpwm-mc33xs2410.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2024 Liebherr-Electronics and Drives GmbH
5 * Reference Manual : https://www.nxp.com/docs/en/data-sheet/MC33XS2410.pdf
8 * - Supports frequencies between 0.5Hz and 2048Hz with following steps:
9 * - 0.5 Hz steps from 0.5 Hz to 32 Hz
10 * - 2 Hz steps from 2 Hz to 128 Hz
11 * - 8 Hz steps from 8 Hz to 512 Hz
12 * - 32 Hz steps from 32 Hz to 2048 Hz
13 * - Cannot generate a 0 % duty cycle.
14 * - Always produces low output if disabled.
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H A Dpwm-twl-led.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * This driver is a complete rewrite of the former pwm-twl6030.c authorded by:
15 * - The twl6030 hardware only supports two period lengths (128 clock ticks and
17 * - The hardware doesn't support ON = 0, so the active part of a period doesn't
19 * - The hardware could support inverted polarity (with a similar limitation as
21 * - The hardware emits a constant low output when disabled.
22 * - A request for .duty_cycle = 0 results in an output wave with one active
24 * - The driver only implements setting the relative duty cycle.
25 * - The driver doesn't implement .get_state().
38 * - LEDA uses PWMA
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/linux/drivers/bcma/
H A Ddriver_gpio.c6 * Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de>
22 static int bcma_gpio_get_value(struct gpio_chip *chip, unsigned gpio) in bcma_gpio_get_value() argument
24 struct bcma_drv_cc *cc = gpiochip_get_data(chip); in bcma_gpio_get_value()
29 static int bcma_gpio_set_value(struct gpio_chip *chip, unsigned int gpio, in bcma_gpio_set_value() argument
32 struct bcma_drv_cc *cc = gpiochip_get_data(chip); in bcma_gpio_set_value()
39 static int bcma_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) in bcma_gpio_direction_input() argument
41 struct bcma_drv_cc *cc = gpiochip_get_data(chip); in bcma_gpio_direction_input()
47 static int bcma_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, in bcma_gpio_direction_output() argument
50 struct bcma_drv_cc *cc = gpiochip_get_data(chip); in bcma_gpio_direction_output()
57 static int bcma_gpio_request(struct gpio_chip *chip, unsigned gpio) in bcma_gpio_request() argument
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/linux/arch/mips/rb532/
H A Dgpio.c5 * Copyright 2006 Phil Sutter <n0-1@freewrt.org>
37 #include <asm/mach-rc32434/rb.h>
38 #include <asm/mach-rc32434/gpio.h>
41 /* Offsets relative to GPIOBASE */
51 struct gpio_chip chip; member
59 .end = REGBASE + GPIOBASE + sizeof(struct rb532_gpio_reg) - 1,
64 /* rb532_set_bit - sanely set a bit
86 /* rb532_get_bit - read a bit
97 static int rb532_gpio_get(struct gpio_chip *chip, unsigned offset) in rb532_gpio_get() argument
101 gpch = gpiochip_get_data(chip); in rb532_gpio_get()
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/linux/drivers/net/wwan/iosm/
H A Diosm_ipc_mmio.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2020-21 Intel Corporation.
9 #include <linux/io-64-nonatomic-lo-hi.h>
16 * note that MMIO_CI offsets are relative to end of chip info structure
19 /* MMIO chip info size in bytes */
25 /* Boot ROM Chip Info struct */
73 cp_cap = ioread32(ipc_mmio->base + ipc_mmio->offset.cp_capability); in ipc_mmio_update_cp_capability()
75 ipc_mmio->mux_protocol = ((ver >= IOSM_CP_VERSION) && (cp_cap & in ipc_mmio_update_cp_capability()
79 ipc_mmio->has_ul_flow_credit = in ipc_mmio_update_cp_capability()
92 ipc_mmio->dev = dev; in ipc_mmio_init()
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/linux/Documentation/devicetree/bindings/mux/
H A Dmux-consumer.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mux/mux-consumer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Rosin <peda@axentia.se>
14 want to use with a property containing a 'mux-ctrl-list':
16 mux-ctrl-list ::= <single-mux-ctrl> [mux-ctrl-list]
17 single-mux-ctrl ::= <mux-ctrl-phandle> [mux-ctrl-specifier]
18 mux-ctrl-phandle : phandle to mux controller node
19 mux-ctrl-specifier : array of #mux-control-cells specifying the
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/linux/Documentation/devicetree/bindings/pwm/
H A Dpwm.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
16 pattern: "^pwm(@.*|-([0-9]|[1-9][0-9]+))?$"
18 "#pwm-cells":
21 order: the chip-relative PWM number, the PWM period in nanoseconds and
22 optionally a number of flags (defined in <dt-bindings/pwm/pwm.h>).
25 - "#pwm-cells"
30 - |
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H A Dpwm.txt5 -----------------
8 with a property containing a 'pwm-list':
10 pwm-list ::= <single-pwm> [pwm-list]
11 single-pwm ::= <pwm-phandle> <pwm-specifier>
12 pwm-phandle : phandle to PWM controller node
13 pwm-specifier : array of #pwm-cells specifying the given PWM
18 An optional property "pwm-names" may contain a list of strings to label
19 each of the PWM devices listed in the "pwms" property. If no "pwm-names"
23 "pwm-names" property to map the name of the PWM device requested by the
26 The following example could be used to describe a PWM-based backlight
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/linux/kernel/irq/
H A Dgeneric-chip.c1 // SPDX-License-Identifier: GPL-2.0
3 * Library implementing the most common irq chip callback functions
22 * irq_gc_noop - NOOP function
31 * irq_gc_mask_disable_reg - Mask chip via disable register
34 * Chip has separate enable/disable registers instead of a single mask
41 u32 mask = d->mask; in irq_gc_mask_disable_reg()
43 guard(raw_spinlock)(&gc->lock); in irq_gc_mask_disable_reg()
44 irq_reg_writel(gc, mask, ct->regs.disable); in irq_gc_mask_disable_reg()
45 *ct->mask_cache &= ~mask; in irq_gc_mask_disable_reg()
50 * irq_gc_mask_set_bit - Mask chip via setting bit in mask register
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/linux/drivers/staging/media/tegra-video/
H A Dvi.h1 /* SPDX-License-Identifier: GPL-2.0-only */
16 #include <media/media-entity.h>
17 #include <media/v4l2-async.h>
18 #include <media/v4l2-ctrls.h>
19 #include <media/v4l2-device.h>
20 #include <media/v4l2-dev.h>
21 #include <media/v4l2-subdev.h>
22 #include <media/videobuf2-v4l2.h>
44 * struct tegra_vi_ops - Tegra VI operations
45 * @vi_enable: soc-specific operations needed to enable/disable the VI peripheral
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/linux/arch/mips/include/asm/mach-bcm63xx/
H A Dbcm63xx_regs.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * _REG relative to RSET_PERF
9 /* Chip Identifier / Revision register */
91 * control register which is 16-bits wide. That way we do not have any
413 * _REG relative to RSET_TIMER
445 * _REG relative to RSET_WDT
467 * _REG relative to RSET_GPIO
561 * _REG relative to RSET_ENET
652 * _REG relative to RSET_ENETDMA
732 * _REG relative to RSET_ENETDMAC
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/linux/drivers/video/fbdev/sis/
H A Dinitdef.h6 * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
23 * * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
56 #define IS_SIS330 (SiS_Pr->ChipType == SIS_330)
57 #define IS_SIS550 (SiS_Pr->ChipType == SIS_550)
58 #define IS_SIS650 (SiS_Pr->ChipType == SIS_650) /* All versions, incl 651, M65x */
59 #define IS_SIS740 (SiS_Pr->ChipType == SIS_740)
60 #define IS_SIS651 (SiS_Pr->SiS_SysFlags & (SF_Is651 | SF_Is652))
61 #define IS_SISM650 (SiS_Pr->SiS_SysFlags & (SF_IsM650 | SF_IsM652 | SF_IsM653))
63 #define IS_SIS661 (SiS_Pr->ChipType == SIS_661)
64 #define IS_SIS741 (SiS_Pr->ChipType == SIS_741)
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/linux/Documentation/i2c/muxes/
H A Di2c-mux-gpio.rst2 Kernel driver i2c-mux-gpio
8 -----------
10 i2c-mux-gpio is an i2c mux driver providing access to I2C bus segments
15 ---------- ---------- Bus segment 1 - - - - -
16 | | SCL/SDA | |-------------- | |
17 | |------------| |
19 | Linux | GPIO 1..N | MUX |--------------- Devices
20 | |------------| | | |
22 | | | |---------------| |
23 ---------- ---------- - - - - -
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/linux/include/uapi/linux/
H A Dpwm.h1 /* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
10 * struct pwmchip_waveform - Describe a PWM waveform for a pwm_chip's PWM channel
11 * @hwpwm: per-chip relative index of the PWM device
48 * down each value less than 1 ns. Returns 0 on success, -EDOM if the waveform
/linux/drivers/pinctrl/
H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011-2012 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
62 * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support
77 return pctldev->desc->name; in pinctrl_dev_get_name()
83 return dev_name(pctldev->dev); in pinctrl_dev_get_devname()
89 return pctldev->driver_data; in pinctrl_dev_get_drvdata()
94 * get_pinctrl_dev_from_devname() - look up pin controller device
110 if (!strcmp(dev_name(pctldev->dev), devname)) { in get_pinctrl_dev_from_devname()
129 if (device_match_of_node(pctldev->dev, np)) { in get_pinctrl_dev_from_of_node()
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/linux/arch/mips/include/asm/sibyte/
H A Dsb1250_defs.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
24 * 'long long' (64-bit integer) support.
33 * for chip features only present in certain chip revisions.
35 * SIBYTE_HDR_FEATURES may be defined to be the mask value chip/revision
43 * Generate defines only for that revision of chip.
45 * #if SIBYTE_HDR_FEATURE(chip,pass)
48 * that particular chip type are enabled in SIBYTE_HDR_FEATURES.
52 * Note that there is no implied ordering between chip types.
54 * Note also that 'chip' and 'pass' must textually exactly
59 * #if SIBYTE_HDR_FEATURE_UP_TO(chip,pass)
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