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/linux/include/linux/
H A Dbootconfig.h1 /* SPDX-License-Identifier: GPL-2.0 */
28 #define BOOTCONFIG_ALIGN_MASK (BOOTCONFIG_ALIGN - 1)
31 * xbc_calc_checksum() - Calculate checksum of bootconfig
44 while (size--) in xbc_calc_checksum()
53 uint16_t child; member
60 /* Maximum size of boot config is 32KB - 1 */
61 #define XBC_DATA_MAX (XBC_VALUE - 1)
76 * xbc_node_is_value() - Test the node is a value node
83 return node->data & XBC_VALUE; in xbc_node_is_value()
87 * xbc_node_is_key() - Test the node is a key node
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/linux/Documentation/devicetree/bindings/pwm/
H A Dpwm-tipwmss.txt4 - compatible: Must be "ti,<soc>-pwmss".
5 for am33xx - compatible = "ti,am33xx-pwmss";
6 for am4372 - compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
7 for dra746 - compatible = "ti,dra746-pwmss", "ti,am33xx-pwmss"
9 - reg: physical base address and size of the registers map.
10 - address-cells: Specify the number of u32 entries needed in child nodes.
12 - size-cells: specify number of u32 entries needed to specify child nodes size
14 - ranges: describes the address mapping of a memory-mapped bus. Should set to
15 physical address map of child's base address, physical address within
17 3 set of child register maps present, ECAP register space, EQEP
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/linux/Documentation/devicetree/bindings/cpu/
H A Dcpu-topology.txt6 1 - Introduction
12 - socket
13 - cluster
14 - core
15 - thread
18 symmetric multi-threading (SMT) is supported or not.
20 For instance in a system where CPUs support SMT, "cpu" nodes represent all
22 In systems where SMT is not supported "cpu" nodes represent all cores present
25 CPU topology bindings allow one to associate cpu nodes with hierarchical groups
27 tree nodes.
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/linux/Documentation/devicetree/bindings/memory-controllers/
H A Darm,pl172.txt5 - compatible: Must be "arm,primecell" and exactly one from
8 - reg: Must contains offset/length value for controller.
10 - #address-cells: Must be 2. The partition number has to be encoded in the
11 first address cell and it may accept values 0..N-1
12 (N - total number of partitions). The second cell is the
15 - #size-cells: Must be set to 1.
17 - ranges: Must contain one or more chip select memory regions.
19 - clocks: Must contain references to controller clocks.
21 - clock-names: Must contain "mpmcclk" and "apb_pclk".
23 - clock-ranges: Empty property indicating that child nodes can inherit
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H A Dti-aemif.txt4 provide a glue-less interface to a variety of asynchronous memory devices like
11 Davinci DM646x - http://www.ti.com/lit/ug/sprueq7c/sprueq7c.pdf
12 OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf
13 Kestone - http://www.ti.com/lit/ug/sprugz3a/sprugz3a.pdf
17 - compatible: "ti,davinci-aemif"
18 "ti,keystone-aemif"
19 "ti,da850-aemif"
21 - reg: contains offset/length value for AEMIF control registers
24 - #address-cells: Must be 2. The partition number has to be encoded in the
25 first address cell and it may accept values 0..N-1
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H A Dti,gpmc-child.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc-child.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments GPMC Bus Child Nodes
10 - Tony Lindgren <tony@atomide.com>
11 - Roger Quadros <rogerq@kernel.org>
14 This binding is meant for the child nodes of the GPMC node. The node
23 # GPMC Timing properties for child nodes. All are optional and default to 0.
24 gpmc,sync-clk-ps:
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/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-mux.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Rosin <peda@axentia.se>
13 An i2c bus multiplexer/switch will have several child busses that are numbered
14 uniquely in a device dependent manner. The nodes for an i2c bus
15 multiplexer/switch will have one child node for each child bus.
17 For i2c multiplexers/switches that have child nodes that are a mixture of both
18 i2c child busses and other child nodes, the 'i2c-mux' subnode can be used for
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dpinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Rafał Miłecki <rafal@milecki.pl>
14 Pin controller devices should contain the pin configuration nodes that client
17 The contents of each of those pin configuration child nodes is defined
22 The pin configuration nodes need not be direct children of the pin controller
24 whether there is any interaction between the child and intermediate parent
25 nodes, is again defined entirely by the binding for the individual pin
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/linux/drivers/firewire/
H A Dcore-topology.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2004-2006 Kristian Hoegsberg <krh@bitplanet.net>
11 #include <linux/firewire-constants.h>
23 #include "phy-packet-definitions.h"
34 node->color = color; in fw_node_create()
35 node->node_id = LOCAL_BUS | phy_packet_self_id_get_phy_id(sid); in fw_node_create()
36 node->link_on = phy_packet_self_id_zero_get_link_active(sid); in fw_node_create()
38 node->phy_speed = phy_packet_self_id_zero_get_scode(sid); in fw_node_create()
39 node->initiated_reset = phy_packet_self_id_zero_get_initiated_reset(sid); in fw_node_create()
40 node->port_count = port_count; in fw_node_create()
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/linux/Documentation/devicetree/bindings/mtd/
H A Dsamsung-s3c2410.txt4 - compatible : The possible values are:
5 "samsung,s3c2410-nand"
6 "samsung,s3c2412-nand"
7 "samsung,s3c2440-nand"
8 - reg : register's location and length.
9 - #address-cells, #size-cells : see nand-controller.yaml
10 - clocks : phandle to the nand controller clock
11 - clock-names : must contain "nand"
13 Optional child nodes:
14 Child nodes representing the available nand chips.
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/linux/Documentation/sphinx/
H A DrstFlatTable.py2 # -*- coding: utf-8; mode: python -*-
6 flat-table
9 Implementation of the ``flat-table`` reST-directive.
14 The ``flat-table`` (:py:class:`FlatTable`) is a double-stage list similar to
15 the ``list-table`` with some additional features:
17 * *column-span*: with the role ``cspan`` a cell can be extended through
20 * *row-span*: with the role ``rspan`` a cell can be extended through
24 right side of that table-row. With Option ``:fill-cells:`` this behavior
30 * header-rows: [int] count of header rows
31 * stub-columns: [int] count of stub columns
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/linux/drivers/pci/hotplug/
H A Dpnv_php.c1 // SPDX-License-Identifier: GPL-2.0+
16 #include <asm/pnv-pci.h>
17 #include <asm/ppc-pci.h>
24 ((sl)->pdev ? pci_warn((sl)->pdev, x) : dev_warn(&(sl)->bus->dev, x))
42 struct pci_dev *pdev = php_slot->pdev; in pnv_php_disable_irq()
45 if (php_slot->irq > 0) { in pnv_php_disable_irq()
52 free_irq(php_slot->irq, php_slot); in pnv_php_disable_irq()
53 php_slot->irq = 0; in pnv_php_disable_irq()
56 if (php_slot->wq) { in pnv_php_disable_irq()
57 destroy_workqueue(php_slot->wq); in pnv_php_disable_irq()
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/linux/lib/
H A Dradix-tree.c1 // SPDX-License-Identifier: GPL-2.0-or-later
24 #include <linux/radix-tree.h>
30 #include "radix-tree.h"
38 * The radix tree is variable-height, so an insert operation not only has
48 #define RADIX_TREE_PRELOAD_SIZE (RADIX_TREE_MAX_PATH * 2 - 1)
54 #define IDR_INDEX_BITS (8 /* CHAR_BIT */ * sizeof(int) - 1)
57 #define IDR_PRELOAD_SIZE (IDR_MAX_PATH * 2 - 1)
60 * Per-cpu pool of preloaded nodes
82 return parent ? slot - parent->slots : 0; in get_slot_offset()
88 unsigned int offset = (index >> parent->shift) & RADIX_TREE_MAP_MASK; in radix_tree_descend()
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/linux/Documentation/devicetree/bindings/mfd/
H A Dtps65912.txt4 - compatible : Should be "ti,tps65912".
5 - reg : Slave address or chip select number (I2C / SPI).
6 - interrupts : The interrupt line the device is connected to.
7 - interrupt-controller : Marks the device node as an interrupt controller.
8 - #interrupt-cells : The number of cells to describe an IRQ, should be 2.
11 masks from ../interrupt-controller/interrupts.txt.
12 - gpio-controller : Marks the device node as a GPIO Controller.
13 - #gpio-cells : Should be two. The first cell is the pin number and
16 - regulators: : List of child nodes that specify the regulator
17 initialization data. Child nodes must be named
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/linux/arch/powerpc/platforms/pseries/
H A Ddlpar.c1 // SPDX-License-Identifier: GPL-2.0-only
25 #include <asm/rtas-work-area.h>
45 kfree(prop->name); in dlpar_free_cc_property()
46 kfree(prop->value); in dlpar_free_cc_property()
60 name = (char *)ccwa + be32_to_cpu(ccwa->name_offset); in dlpar_parse_cc_property()
61 prop->name = kstrdup(name, GFP_KERNEL); in dlpar_parse_cc_property()
62 if (!prop->name) { in dlpar_parse_cc_property()
67 prop->length = be32_to_cpu(ccwa->prop_length); in dlpar_parse_cc_property()
68 value = (char *)ccwa + be32_to_cpu(ccwa->prop_offset); in dlpar_parse_cc_property()
69 prop->value = kmemdup(value, prop->length, GFP_KERNEL); in dlpar_parse_cc_property()
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/linux/arch/sparc/kernel/
H A Dcpumap.c1 // SPDX-License-Identifier: GPL-2.0
37 int child_start; /* Array index of the first child node */
38 int child_end; /* Array index of the last child node */
39 int rover; /* Child node iterator */
45 int num_nodes; /* Number of nodes in a level in a cpuinfo tree */
51 /* Offsets into nodes[] for each level of the tree */
53 struct cpuinfo_node nodes[] __counted_by(total_nodes);
86 * nodes.
114 id = -EINVAL; in cpuinfo_id()
121 * end index, and number of nodes for each level in the cpuinfo tree. The
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/linux/kernel/bpf/
H A Dlpm_trie.c1 // SPDX-License-Identifier: GPL-2.0-only
26 struct lpm_trie_node __rcu *child[2]; member
50 * lead to more nodes containing more specific matches. Each node also stores
57 * [0xc0, 0xa8, 0x00, 0x00] in big-endian notation. This documentation will
58 * stick to IP-address notation for readability though.
62 * child pointers are %NULL.
64 * +----------------+
69 * +----------------+
73 * node (2) will become a child of (1). In child index depends on the next bit
75 * child[0] of (1):
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/linux/Documentation/devicetree/bindings/spmi/
H A Dspmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephen Boyd <sboyd@kernel.org>
13 The System Power Management (SPMI) controller is a 2-wire bus defined
20 Each SPMI controller has zero or more child nodes (up to 16 ones), each
27 "#address-cells":
30 "#size-cells":
34 "@[0-9a-f]$":
35 description: up to 16 child PMIC nodes
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/linux/drivers/md/bcache/
H A Dbtree.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 * pointers are in the leaves; interior nodes only have pointers to the child
10 * nodes.
12 * In the interior nodes, a struct bkey always points to a child btree node, and
13 * the key is the highest key in the child node - except that the highest key in
15 * of the child node - this would allow us to have variable sized btree nodes
18 * Btree nodes are themselves log structured, but this is hidden fairly
19 * thoroughly. Btree nodes on disk will in practice have extents that overlap
21 * overlapping extents - when we read in a btree node from disk, the first thing
31 * Btree nodes are cached in memory; traversing the btree might require reading
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/linux/drivers/acpi/acpica/
H A Dnswalk.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
4 * Module Name: nswalk - Functions for walking the ACPI namespace
6 * Copyright (C) 2000 - 2023, Intel Corp.
21 * PARAMETERS: parent_node - Parent node whose children we are
23 * child_node - Previous child that was found.
24 * The NEXT child will be returned
26 * RETURN: struct acpi_namespace_node - Pointer to the NEXT child or NULL if
45 return (parent_node->child); in acpi_ns_get_next_node()
50 return (child_node->peer); in acpi_ns_get_next_node()
57 * PARAMETERS: type - Type of node to be searched for
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/linux/fs/jffs2/
H A Dbuild.c2 * JFFS2 -- Journalling Flash File System, Version 2.
4 * Copyright © 2001-2007 Red Hat, Inc.
5 * Copyright © 2004-2010 David Woodhouse <dwmw2@infradead.org>
29 for (; *i < c->inocache_hashsize; (*i)++) { in first_inode_chain()
30 if (c->inocache_list[*i]) in first_inode_chain()
31 return c->inocache_list[*i]; in first_inode_chain()
40 if (ic->next) in next_inode()
41 return ic->next; in next_inode()
58 dbg_fsbuild("building directory inode #%u\n", ic->ino); in jffs2_build_inode_pass1()
60 /* For each child, increase nlink */ in jffs2_build_inode_pass1()
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/linux/tools/include/linux/
H A Drbtree_augmented.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
22 * Please note - only struct rb_augment_callbacks and the prototypes for
26 * See Documentation/core-api/rbtree.rst for documentation and samples.
52 __rb_insert_augmented(node, root, augment->rotate); in rb_insert_augmented()
61 root->rb_leftmost = node; in rb_insert_augmented_cached()
62 rb_insert_augmented(node, &root->rb_roo in rb_insert_augmented_cached()
190 struct rb_node *child = node->rb_right; __rb_erase_augmented() local
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/linux/Documentation/devicetree/bindings/memory-controllers/fsl/
H A Dfsl,imx-weim-peripherals.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,imx-weim-peripherals.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: i.MX WEIM Bus Peripheral Nodes
10 - Shawn Guo <shawnguo@kernel.org>
11 - Sascha Hauer <s.hauer@pengutronix.de>
14 This binding is meant for the child nodes of the WEIM node. The node
23 fsl,weim-cs-timing:
24 $ref: /schemas/types.yaml#/definitions/uint32-array
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/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Dmpc5200.txt2 ----------------------------
4 (c) 2006-2009 Secret Lab Technologies Ltd
8 ------------------
9 For mpc5200 on-chip devices, the format for each compatible value is
10 <chip>-<device>[-<mode>]. The OS should be able to match a device driver
21 "fsl,mpc5200-<device>".
29 compatible = "fsl,mpc5200b-<device>","fsl,mpc5200-<device>";
34 ie. ethernet on mpc5200: compatible = "fsl,mpc5200-fec";
35 ethernet on mpc5200b: compatible = "fsl,mpc5200b-fec", "fsl,mpc5200-fec";
39 "fsl,mpc5200-psc-i2s", not "fsl,mpc5200-i2s". This convention is chosen to
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/linux/Documentation/devicetree/bindings/remoteproc/
H A Dti,k3-r5f-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-r5f-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The TI K3 family of SoCs usually have one or more dual-core Arm Cortex R5F
20 AM64x SoCs do not support LockStep mode, but rather a new non-safety mode
21 called "Single-CPU" mode, where only Core0 is used, but with ability to use
27 Each Dual-Core R5F sub-system is represented as a single DTS node
28 representing the cluster, with a pair of child DT nodes representing
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