1*a404a636SRob Herring# SPDX-License-Identifier: GPL-2.0 2*a404a636SRob Herring%YAML 1.2 3*a404a636SRob Herring--- 4*a404a636SRob Herring$id: http://devicetree.org/schemas/i2c/i2c-mux.yaml# 5*a404a636SRob Herring$schema: http://devicetree.org/meta-schemas/core.yaml# 6*a404a636SRob Herring 7*a404a636SRob Herringtitle: Common i2c bus multiplexer/switch properties. 8*a404a636SRob Herring 9*a404a636SRob Herringmaintainers: 10*a404a636SRob Herring - Peter Rosin <peda@axentia.se> 11*a404a636SRob Herring 12*a404a636SRob Herringdescription: |+ 13*a404a636SRob Herring An i2c bus multiplexer/switch will have several child busses that are numbered 14*a404a636SRob Herring uniquely in a device dependent manner. The nodes for an i2c bus 15*a404a636SRob Herring multiplexer/switch will have one child node for each child bus. 16*a404a636SRob Herring 17*a404a636SRob Herring For i2c multiplexers/switches that have child nodes that are a mixture of both 18*a404a636SRob Herring i2c child busses and other child nodes, the 'i2c-mux' subnode can be used for 19*a404a636SRob Herring populating the i2c child busses. If an 'i2c-mux' subnode is present, only 20*a404a636SRob Herring subnodes of this will be considered as i2c child busses. 21*a404a636SRob Herring 22*a404a636SRob Herringproperties: 23*a404a636SRob Herring $nodename: 24*a404a636SRob Herring pattern: '^(i2c-?)?mux' 25*a404a636SRob Herring 26*a404a636SRob Herring '#address-cells': 27*a404a636SRob Herring const: 1 28*a404a636SRob Herring 29*a404a636SRob Herring '#size-cells': 30*a404a636SRob Herring const: 0 31*a404a636SRob Herring 32*a404a636SRob HerringpatternProperties: 33*a404a636SRob Herring '^i2c@[0-9a-f]+$': 34*a404a636SRob Herring $ref: /schemas/i2c/i2c-controller.yaml 35*a404a636SRob Herring unevaluatedProperties: false 36*a404a636SRob Herring 37*a404a636SRob Herring properties: 38*a404a636SRob Herring reg: 39*a404a636SRob Herring description: The mux selector sub-bus number for the child I2C bus. 40*a404a636SRob Herring maxItems: 1 41*a404a636SRob Herring 42*a404a636SRob HerringadditionalProperties: true 43*a404a636SRob Herring 44*a404a636SRob Herringexamples: 45*a404a636SRob Herring - | 46*a404a636SRob Herring /* 47*a404a636SRob Herring * An NXP pca9548 8 channel I2C multiplexer at address 0x70 48*a404a636SRob Herring * with two NXP pca8574 GPIO expanders attached, one each to 49*a404a636SRob Herring * ports 3 and 4. 50*a404a636SRob Herring */ 51*a404a636SRob Herring i2c { 52*a404a636SRob Herring #address-cells = <1>; 53*a404a636SRob Herring #size-cells = <0>; 54*a404a636SRob Herring 55*a404a636SRob Herring i2c-mux@70 { 56*a404a636SRob Herring compatible = "nxp,pca9548"; 57*a404a636SRob Herring reg = <0x70>; 58*a404a636SRob Herring #address-cells = <1>; 59*a404a636SRob Herring #size-cells = <0>; 60*a404a636SRob Herring 61*a404a636SRob Herring i2c@3 { 62*a404a636SRob Herring #address-cells = <1>; 63*a404a636SRob Herring #size-cells = <0>; 64*a404a636SRob Herring reg = <3>; 65*a404a636SRob Herring 66*a404a636SRob Herring gpio@20 { 67*a404a636SRob Herring compatible = "nxp,pca9555"; 68*a404a636SRob Herring gpio-controller; 69*a404a636SRob Herring #gpio-cells = <2>; 70*a404a636SRob Herring reg = <0x20>; 71*a404a636SRob Herring }; 72*a404a636SRob Herring }; 73*a404a636SRob Herring i2c@4 { 74*a404a636SRob Herring #address-cells = <1>; 75*a404a636SRob Herring #size-cells = <0>; 76*a404a636SRob Herring reg = <4>; 77*a404a636SRob Herring 78*a404a636SRob Herring gpio@20 { 79*a404a636SRob Herring compatible = "nxp,pca9555"; 80*a404a636SRob Herring gpio-controller; 81*a404a636SRob Herring #gpio-cells = <2>; 82*a404a636SRob Herring reg = <0x20>; 83*a404a636SRob Herring }; 84*a404a636SRob Herring }; 85*a404a636SRob Herring }; 86*a404a636SRob Herring }; 87*a404a636SRob Herring... 88