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/linux/Documentation/devicetree/bindings/gpio/
H A Dxlnx,gpio-xilinx.yaml52 description: This option sets this GPIO channel1 bits in input mode.
60 description: This option sets this GPIO channel1 bits in output mode.
69 channel1.
80 description: The value defines the bit width of the GPIO channel1.
110 of each bit of GPIO channel1.
/linux/Documentation/devicetree/bindings/display/bridge/
H A Dfsl,imx8qxp-ldb.yaml24 have to be different. Channel0 outputs odd pixels and channel1 outputs
30 data. In split mode, channel0 outputs odd pixels and channel1 outputs even
/linux/drivers/mfd/
H A Dmxs-lradc.c58 DEFINE_RES_IRQ_NAMED(MX23_LRADC_CH1_IRQ, "mxs-lradc-channel1"),
77 DEFINE_RES_IRQ_NAMED(MX28_LRADC_CH1_IRQ, "mxs-lradc-channel1"),
/linux/arch/arm64/boot/dts/renesas/
H A Dwhite-hawk-common.dtsi36 channel1 {
H A Drz-smarc-common.dtsi90 channel1 {
H A Dgray-hawk-single.dtsi276 channel1 {
H A Dr9a07g043.dtsi434 channel1 {
H A Dr9a07g054.dtsi649 channel1 {
H A Dr9a07g044.dtsi644 channel1 {
H A Dr8a77995.dtsi588 channel1 {
/linux/Documentation/devicetree/bindings/phy/
H A Dfsl,imx8qm-lvds-phy.yaml37 Index 0 is for LVDS channel0 and index 1 is for LVDS channel1.
/linux/Documentation/devicetree/bindings/memory-controllers/ddr/
H A Djedec,lpddr-channel.yaml125 lpddr-channel1 {
/linux/tools/virtio/virtio-trace/
H A DREADME65 id=channel1,name=trace-path-cpu0\
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588-jaguar-ethernet-switch.dtso15 * - two analog inputs (pin10 to channel1 of ADS1015, pin11 to channel2)
/linux/arch/arm/mach-spear/
H A Dtime.c33 #define CLKSRC 1 /* gpt0, channel1 as clocksource */
/linux/drivers/media/platform/ti/davinci/
H A Dvpif.h271 /* inline function to enable/disable channel1 */
302 /* inline function to enable interrupt for channel1 */
/linux/arch/arm/boot/dts/marvell/
H A Ddove.dtsi333 channel1 {
353 channel1 {
/linux/include/sound/
H A Dak4117.h77 #define AK4117_CS12 (1<<5) /* channel status select, 0 = channel1, 1 = channel2 */
/linux/sound/soc/codecs/
H A Dda7218.c745 SOC_SINGLE("AGS Channel1 Switch", DA7218_AGS_ENABLE,
783 SOC_DOUBLE_EXT("ALC Channel1 Switch", DA7218_ALC_CTRL1,
805 SOC_DOUBLE_EXT("Mic Level Detect Channel1 Switch", DA7218_LVL_DET_CTRL,
/linux/drivers/gpu/drm/msm/registers/display/
H A Dmdp4.xml464 <bitfield name="CHANNEL1" pos="7" type="boolean"/>
/linux/drivers/input/misc/
H A Dati_remote2.c97 …PARM_DESC(channel_mask, "Bitmask of channels to accept <15:Channel16>...<1:Channel2><0:Channel1>");
/linux/include/uapi/linux/
H A Dcdrom.h202 __u8 channel1; member
/linux/arch/um/drivers/
H A Dubd_kern.c1359 volume.channel1 = 255; in ubd_ioctl()
/linux/drivers/cdrom/
H A Dcdrom.c3145 volctrl.channel1 = buffer[offset+11]; in mmc_ioctl_cdrom_volume()
3161 buffer[offset + 11] = volctrl.channel1 & mask[offset + 11]; in mmc_ioctl_cdrom_volume()