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/linux/sound/soc/codecs/
H A Dtas571x.c490 BIQUAD_COEFS("CH1 - Biquad 0", TAS5707_CH1_BQ0_REG),
491 BIQUAD_COEFS("CH1 - Biquad 1", TAS5707_CH1_BQ1_REG),
492 BIQUAD_COEFS("CH1 - Biquad 2", TAS5707_CH1_BQ2_REG),
493 BIQUAD_COEFS("CH1 - Biquad 3", TAS5707_CH1_BQ3_REG),
494 BIQUAD_COEFS("CH1 - Biquad 4", TAS5707_CH1_BQ4_REG),
495 BIQUAD_COEFS("CH1 - Biquad 5", TAS5707_CH1_BQ5_REG),
496 BIQUAD_COEFS("CH1 - Biquad 6", TAS5707_CH1_BQ6_REG),
576 SOC_DOUBLE_R_RANGE("CH1 Mixer Volume",
591 BIQUAD_COEFS("CH1 - Biquad 0", TAS5717_CH1_BQ0_REG),
592 BIQUAD_COEFS("CH1
[all...]
H A Dtas675x.c93 REG_SEQ0(TAS675X_PAGE_REG(1, 0xC1), 0x00), /* CH1 DC fault */
229 { "auto-mute-ch1", TAS675X_GPIO_SEL_AUTO_MUTE_CH1 },
415 "DC LDG: abort timeout (CH1/2=0x%02x [%s/%s], CH3/4=0x%02x [%s/%s])\n", in tas675x_set_dcldg_trigger()
442 "DC LDG: LOAD_DIAG timeout (CH1/2=0x%02x [%s/%s], CH3/4=0x%02x [%s/%s])\n", in tas675x_set_dcldg_trigger()
468 "DC LDG: SLEEP timeout (CH1/2=0x%02x [%s/%s], CH3/4=0x%02x [%s/%s])\n", in tas675x_set_dcldg_trigger()
474 dev_dbg(tas->dev, "DC LDG: Completed successfully (CH1/2=0x%02x, CH3/4=0x%02x)\n", in tas675x_set_dcldg_trigger()
532 "AC LDG: CH1/CH2 timeout: %d (state=0x%02x [%s/%s])\n", in tas675x_set_acldg_trigger()
552 dev_dbg(tas->dev, "AC LDG: Completed successfully (CH1/2=0x%02x, CH3/4=0x%02x)\n", in tas675x_set_acldg_trigger()
618 /* 2-bit MSB: CH1=[7:6], CH2=[5:4], CH3=[3:2], CH4=[1:0] */ in tas675x_get_dc_resistance()
807 "Independent", "CH2 follows CH1", "CH1 follows CH2"
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H A Dsta350.c437 SOC_SINGLE_TLV("Ch1 Volume", STA350_C1VOL, 0, 0xff, 1, chvol_tlv),
462 SOC_SINGLE("Ch1 Switch", STA350_MMUTE, STA350_MMUTE_C1M_SHIFT, 1, 1),
469 SOC_SINGLE("Ch1 Tone Control Bypass Switch",
473 SOC_SINGLE("Ch1 EQ Bypass Switch",
477 SOC_SINGLE("Ch1 Master Volume Bypass Switch",
483 SOC_ENUM("Ch1 Binary Output Select", sta350_binary_output_ch1_enum),
486 SOC_ENUM("Ch1 Limiter Select", sta350_limiter_ch1_enum),
528 BIQUAD_COEFS("Ch1 - Biquad 1", 0),
529 BIQUAD_COEFS("Ch1 - Biquad 2", 5),
530 BIQUAD_COEFS("Ch1
[all...]
H A Dsta32x.c443 SOC_SINGLE("Ch1 Switch", STA32X_MMUTE, 1, 1, 1),
446 SOC_SINGLE_TLV("Ch1 Volume", STA32X_C1VOL, 0, 0xff, 1, chvol_tlv),
459 SOC_SINGLE("Ch1 Tone Control Bypass Switch", STA32X_C1CFG, STA32X_CxCFG_TCB_SHIFT, 1, 0),
461 SOC_SINGLE("Ch1 EQ Bypass Switch", STA32X_C1CFG, STA32X_CxCFG_EQBP_SHIFT, 1, 0),
463 SOC_SINGLE("Ch1 Master Volume Bypass Switch", STA32X_C1CFG, STA32X_CxCFG_VBP_SHIFT, 1, 0),
466 SOC_ENUM("Ch1 Limiter Select", sta32x_limiter_ch1_enum),
496 BIQUAD_COEFS("Ch1 - Biquad 1", 0),
497 BIQUAD_COEFS("Ch1 - Biquad 2", 5),
498 BIQUAD_COEFS("Ch1 - Biquad 3", 10),
499 BIQUAD_COEFS("Ch1
[all...]
H A Dak5558.c107 SND_SOC_DAPM_ADC("ADC Ch1", NULL, AK5558_00_POWER_MANAGEMENT1, 0, 0),
124 SND_SOC_DAPM_ADC("ADC Ch1", NULL, AK5558_00_POWER_MANAGEMENT1, 0, 0),
131 {"ADC Ch1", NULL, "AIN1"},
132 {"SDTO", NULL, "ADC Ch1"},
157 {"ADC Ch1", NULL, "AIN1"},
158 {"SDTO", NULL, "ADC Ch1"},
H A Dpeb2466.c559 SND_SOC_DAPM_SUPPLY("CH1 PWR", PEB2466_CR1(1), 0, 0, NULL, 0),
564 SND_SOC_DAPM_DAC("CH1 DIN", "Playback", SND_SOC_NOPM, 0, 0),
569 SND_SOC_DAPM_SIGGEN("CH1 TG1"),
574 SND_SOC_DAPM_SIGGEN("CH1 TG2"),
614 { "CH1 DIN", NULL, "CH1 PWR" },
619 { "CH1 TG1", NULL, "CH1 PWR" },
624 { "CH1 TG2", NULL, "CH1 PW
[all...]
/linux/Documentation/sound/codecs/
H A Dtas675x.rst50 :Description: Analog output gain for all channels (CH1/CH2 and CH3/CH4 pairs).
54 :Register: 0x4A (CH1/CH2), 0x4B (CH3/CH4)
73 :Register: 0x40 (CH1), 0x41 (CH2), 0x42 (CH3), 0x43 (CH4)
111 CH1/2 Volume Combine
114 :Description: Links digital volume controls for CH1 and CH2.
117 :Options: Independent, CH2 follows CH1, CH1 follows CH2
138 :Register: 0x47 bit [0] (CH1), bit [1] (CH2), bit [2] (CH3), bit [3] (CH4)
158 :Register: 0x48 bits [7:4] (CH1), bits [3:0] (CH2),
263 :Register: 0xE2 bits [6:4] (CH1), bits [2:0] (CH2),
295 :Register: 0xBB bits [2:0] (CH1), bits [5:3] (CH2),
[all …]
/linux/drivers/media/usb/pvrusb2/
H A Dpvrusb2-context.c103 struct pvr2_channel *ch1, *ch2; in pvr2_context_check() local
130 for (ch1 = mp->mc_first; ch1; ch1 = ch2) { in pvr2_context_check()
131 ch2 = ch1->mc_next; in pvr2_context_check()
132 if (ch1->check_func) ch1->check_func(ch1); in pvr2_context_check()
/linux/sound/pci/ice1712/
H A Dse.c24 unsigned char ch1, ch2; member
450 uc->value.integer.value[0] = spec->vol[n].ch1; in se200pci_cont_volume_get()
461 uc->value.integer.value[0] = spec->vol[n].ch1; in se200pci_cont_boolean_get()
471 uc->value.enumerated.item[0] = spec->vol[n].ch1; in se200pci_cont_enum_get()
482 spec->vol[n].ch1, in se200pci_cont_update()
488 spec->vol[n].ch1, in se200pci_cont_update()
494 spec->vol[n].ch1, in se200pci_cont_update()
500 spec->vol[n].ch1); in se200pci_cont_update()
504 se200pci_WM8776_set_agc(ice, spec->vol[n].ch1); in se200pci_cont_update()
508 se200pci_WM8776_set_afl(ice, spec->vol[n].ch1); in se200pci_cont_update()
[all …]
/linux/drivers/counter/
H A Drz-mtu3-cnt.c395 struct rz_mtu3_channel *const ch1 = rz_mtu3_get_ch(counter, 0); in rz_mtu3_32bit_cnt_setting() local
399 rz_mtu3_8bit_ch_write(ch1, RZ_MTU3_TMDR1, RZ_MTU3_TMDR1_PH_CNT_MODE_1); in rz_mtu3_32bit_cnt_setting()
401 rz_mtu3_8bit_ch_write(ch1, RZ_MTU3_TCR, RZ_MTU3_TCR_CCLR_TGRA); in rz_mtu3_32bit_cnt_setting()
402 rz_mtu3_8bit_ch_write(ch1, RZ_MTU3_TIOR, RZ_MTU3_TIOR_IC_BOTH); in rz_mtu3_32bit_cnt_setting()
404 rz_mtu3_enable(ch1); in rz_mtu3_32bit_cnt_setting()
423 struct rz_mtu3_channel *const ch1 = rz_mtu3_get_ch(counter, 0); in rz_mtu3_initialize_counter() local
439 if (!rz_mtu3_request_channel(ch1)) in rz_mtu3_initialize_counter()
443 rz_mtu3_release_channel(ch1); in rz_mtu3_initialize_counter()
458 struct rz_mtu3_channel *const ch1 = rz_mtu3_get_ch(counter, 0); in rz_mtu3_terminate_counter() local
463 rz_mtu3_release_channel(ch1); in rz_mtu3_terminate_counter()
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dallwinner,sun4i-a10-tcon-ch0-clk.yaml25 - allwinner,sun4i-a10-tcon-ch1-clk
71 compatible = "allwinner,sun4i-a10-tcon-ch1-clk";
74 clock-output-names = "tcon-ch1-sclk";
/linux/sound/soc/mediatek/mt8183/
H A Dmt8183-dai-tdm.c145 "CH0", "CH1", "CH2", "CH3",
348 {"HDMI_CH0_MUX", "CH1", "HDMI"},
357 {"HDMI_CH1_MUX", "CH1", "HDMI"},
366 {"HDMI_CH2_MUX", "CH1", "HDMI"},
375 {"HDMI_CH3_MUX", "CH1", "HDMI"},
384 {"HDMI_CH4_MUX", "CH1", "HDMI"},
393 {"HDMI_CH5_MUX", "CH1", "HDMI"},
402 {"HDMI_CH6_MUX", "CH1", "HDMI"},
411 {"HDMI_CH7_MUX", "CH1", "HDMI"},
/linux/sound/soc/mediatek/mt8192/
H A Dmt8192-dai-tdm.c137 "CH0", "CH1", "CH2", "CH3",
396 {"HDMI_CH0_MUX", "CH1", "HDMI"},
405 {"HDMI_CH1_MUX", "CH1", "HDMI"},
414 {"HDMI_CH2_MUX", "CH1", "HDMI"},
423 {"HDMI_CH3_MUX", "CH1", "HDMI"},
432 {"HDMI_CH4_MUX", "CH1", "HDMI"},
441 {"HDMI_CH5_MUX", "CH1", "HDMI"},
450 {"HDMI_CH6_MUX", "CH1", "HDMI"},
459 {"HDMI_CH7_MUX", "CH1", "HDMI"},
/linux/include/linux/usb/
H A Dr8a66597.h440 #define CH1STCLR 0x0002 /* b2: Ch1 DMA Status Clear */
444 #define CH1BUFW 0x0200 /* b9: Ch1 DMA Buffer Data Transfer Enable */
446 #define CH1BUFS 0x0002 /* b2: Ch1 DMA Buffer Data Status */
450 #define CH1ERRE 0x0200 /* b9: Ch1 SHwy Res Err Detect Int Enable */
452 #define CH1ENDE 0x0002 /* b2: Ch1 DMA Transfer End Int Enable */
456 #define CH1ERRS 0x0200 /* b9: Ch1 SHwy Res Err Detect Int Status */
458 #define CH1ENDS 0x0002 /* b2: Ch1 DMA Transfer End Int Status */
462 #define CH1ERRC 0x0200 /* b9: Ch1 SHwy Res Err Detect Int Stat Clear */
464 #define CH1ENDC 0x0002 /* b2: Ch1 DMA Transfer End Int Stat Clear */
/linux/drivers/usb/renesas_usbhs/
H A Drza.c21 /* Input Clock Selection (NOTE: ch0 controls both ch0 and ch1) */ in usbhs_rza1_hardware_init()
40 /* Enable USB PLL (NOTE: ch0 controls both ch0 and ch1) */ in usbhs_rza1_hardware_init()
/linux/Documentation/devicetree/bindings/dma/
H A Dloongson,ls1b-apbdma.yaml38 - const: ch1
63 interrupt-names = "ch0", "ch1", "ch2";
H A Drenesas,usb-dmac.yaml50 - pattern: ch1
98 interrupt-names = "ch0", "ch1";
/linux/tools/perf/tests/
H A Dapi-io.c132 __u64 val1, int ch1, in do_test_get_hex() argument
147 EXPECT_EQUAL(ch, ch1); in do_test_get_hex()
213 __u64 val1, int ch1, in do_test_get_dec() argument
228 EXPECT_EQUAL(ch, ch1); in do_test_get_dec()
/linux/Documentation/devicetree/bindings/display/
H A Dallwinner,sun4i-a10-tcon.yaml187 - const: tcon-ch1
206 - const: tcon-ch1
266 - const: tcon-ch1
391 "tcon-ch1";
465 "tcon-ch1",
637 clock-names = "ahb", "tcon-ch1";
/linux/Documentation/devicetree/bindings/sound/
H A Daudio-iio-aux.yaml61 io-channel-names = "CH0", "CH1", "CH2", "CH3";
62 /* Invert CH1 and CH2 */
/linux/sound/soc/amd/
H A Dacp-pcm-dma.c340 ch_acp_sysmem = rtd->ch1; in config_acp_dma()
343 ch_acp_i2s = rtd->ch1; in config_acp_dma()
903 rtd->ch1 = SYSRAM_TO_ACP_BT_INSTANCE_CH_NUM; in acp_dma_hw_params()
923 rtd->ch1 = SYSRAM_TO_ACP_MICSP_INSTANCE_CH_NUM; in acp_dma_hw_params()
945 rtd->ch1 = SYSRAM_TO_ACP_CH_NUM; in acp_dma_hw_params()
961 rtd->ch1 = I2S_TO_ACP_DMA_BT_INSTANCE_CH_NUM; in acp_dma_hw_params()
978 rtd->ch1 = I2S_TO_ACP_DMA_CH_NUM; in acp_dma_hw_params()
1094 ch_acp_sysmem = rtd->ch1; in acp_dma_prepare()
1097 ch_acp_i2s = rtd->ch1; in acp_dma_prepare()
1139 acp_dma_start(rtd->acp_mmio, rtd->ch1, tru in acp_dma_trigger()
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/linux/sound/soc/ti/
H A Domap-mcpdm.h59 #define MCPDM_PDM_UPLINK_EN(x) (1 << (x - 1)) /* ch1 is at bit 0 */
60 #define MCPDM_PDM_DOWNLINK_EN(x) (1 << (x + 2)) /* ch1 is at bit 3 */
/linux/tools/perf/pmu-events/arch/x86/emeraldrapids/
H A Duncore-memory.json777 "BriefDescription": "UNC_M2HBM_IMC_READS.CH1.ALL",
780 "EventName": "UNC_M2HBM_IMC_READS.CH1.ALL",
787 "BriefDescription": "UNC_M2HBM_IMC_READS.CH1.NORMAL",
790 "EventName": "UNC_M2HBM_IMC_READS.CH1.NORMAL",
809 "BriefDescription": "From TGR - Ch1",
819 "BriefDescription": "Critical Priority - Ch1",
998 "BriefDescription": "All Writes - Ch1",
1001 "EventName": "UNC_M2HBM_IMC_WRITES.CH1.ALL",
1008 "BriefDescription": "Full Line Non-ISOCH - Ch1",
1011 "EventName": "UNC_M2HBM_IMC_WRITES.CH1.FULL",
[all …]
/linux/tools/perf/pmu-events/arch/x86/sapphirerapids/
H A Duncore-memory.json777 "BriefDescription": "UNC_M2HBM_IMC_READS.CH1.ALL",
780 "EventName": "UNC_M2HBM_IMC_READS.CH1.ALL",
787 "BriefDescription": "UNC_M2HBM_IMC_READS.CH1.NORMAL",
790 "EventName": "UNC_M2HBM_IMC_READS.CH1.NORMAL",
809 "BriefDescription": "From TGR - Ch1",
819 "BriefDescription": "Critical Priority - Ch1",
998 "BriefDescription": "All Writes - Ch1",
1001 "EventName": "UNC_M2HBM_IMC_WRITES.CH1.ALL",
1008 "BriefDescription": "Full Line Non-ISOCH - Ch1",
1011 "EventName": "UNC_M2HBM_IMC_WRITES.CH1.FULL",
[all …]
/linux/drivers/gpu/drm/i915/display/
H A Ddvo_tfp410.c161 u8 ch1, ch2; in tfp410_getid() local
163 if (tfp410_readb(dvo, addr+0, &ch1) && in tfp410_getid()
165 return ((ch2 << 8) & 0xFF00) | (ch1 & 0x00FF); in tfp410_getid()

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