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/freebsd/sys/contrib/device-tree/Bindings/media/cec/
H A Dst,stih-cec.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/media/cec/st,stih-cec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STIH4xx HDMI CEC
10 - Alain Volmat <alain.volmat@foss.st.com>
13 - $ref: cec-common.yaml#
17 const: st,stih-cec
22 clock-names:
24 - const: cec-clk
[all …]
/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dstih-cec.txt1 STMicroelectronics STIH4xx HDMI CEC driver
4 - compatible : value should be "st,stih-cec"
5 - reg : Physical base address of the IP registers and length of memory
7 - clocks : from common clock binding: handle to HDMI CEC clock
8 - interrupts : HDMI CEC interrupt number to the CPU.
9 - pinctrl-names: Contains only one value - "default"
10 - pinctrl-0: Specifies the pin control groups used for CEC hardware.
11 - resets: Reference to a reset controller
12 - hdmi-phandle: Phandle to the HDMI controller, see also cec.txt.
16 sti-cec@94a087c {
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/freebsd/sys/contrib/device-tree/Bindings/display/mediatek/
H A Dmediatek,cec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,cec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek HDMI CEC Controller
10 - CK Hu <ck.hu@mediatek.com>
11 - Jitao shi <jitao.shi@mediatek.com>
14 The HDMI CEC controller handles hotplug detection and CEC communication.
19 - mediatek,mt7623-cec
20 - mediatek,mt8167-cec
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/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dstm32f746.dtsi2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32fx-clock.h>
45 #include <dt-bindings/mfd/stm32f7-rcc.h>
48 #address-cells = <1>;
49 #size-cells = <1>;
52 clk_hse: clk
340 cec: cec@40006c00 { global() label
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H A Dstih410.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "stih410-clock.dtsi"
7 #include "stih407-family.dtsi"
8 #include "stih410-pinctrl.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
16 compatible = "st,stih407-usb2-phy";
17 #phy-cells = <0>;
21 reset-names = "global", "port";
27 compatible = "st,stih407-usb2-phy";
28 #phy-cells = <0>;
[all …]
H A Dstm32f7-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
7 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
8 #include <dt-bindings/mfd/stm32f7-rc
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H A Dstm32mp15xx-dhcor-avenger96.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
9 #include "stm32mp15xx-dhcor-io1v8.dtsi"
22 cec_clock: clk-ce
[all...]
H A Dstm32mp151.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-binding
582 cec: cec@40016000 { global() label
[all...]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam335x-boneblack.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
8 #include "am335x-bone-common.dtsi"
9 #include "am335x-boneblack-commo
[all...]
/freebsd/sys/contrib/device-tree/src/arm64/amlogic/
H A Dmeson-gxl-s905x-khadas-vim.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-gxl-s905x-p212.dtsi"
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/sound/meson-ai
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H A Dmeson-gxbb-nanopi-k2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-gxbb.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/sound/meson-aiu.h>
13 compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxb
[all...]
H A Dmeson-gxl-s805x-libretech-ac.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/sound/meson-aiu.h>
13 #include "meson-gxl-s805x.dtsi"
16 compatible = "libretech,aml-s805
[all...]
H A Dmeson-gxbb-odroidc2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "meson-gxbb.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/sound/meson-aiu.h>
15 compatible = "hardkernel,odroid-c2", "amlogic,meson-gxb
[all...]
H A Dmeson-gxl-s905x-libretech-cc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/sound/meson-aiu.h>
13 #include "meson-gxl-s905x.dtsi"
16 compatible = "libretech,aml-s905
[all...]
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dnvidia,tegra124-pinmux.txt4 pinctrl binding, as described in nvidia,tegra20-pinmux.txt and
5 nvidia,tegra30-pinmux.txt. In fact, this document assumes that binding as
9 - compatible: For Tegra124, must contain "nvidia,tegra124-pinmux". For
10 Tegra132, must contain '"nvidia,tegra132-pinmux", "nvidia-tegra124-pinmux"'.
11 - reg: Should contain a list of base address and size pairs for:
12 -- first entry - the drive strength and pad control registers.
13 -- second entry - the pinmux registers
14 -- third entry - the MIPI_PAD_CTRL register
18 include/dt-binding/pinctrl/pinctrl-tegra.h.
19 - nvidia,enable-input: Integer. Enable the pin's input path.
[all …]
H A Dnvidia,tegra210-pinmux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra210-pinmu
[all...]
H A Dnvidia,tegra124-pinmux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra124-pinmu
[all...]
/freebsd/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cell
[all...]
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3588s-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include "rockchip-pinconf.dtsi"
15 /omit-if-no-ref/
16 auddsm_pins: auddsm-pins {
30 /omit-i
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/freebsd/sys/arm/nvidia/tegra124/
H A Dtegra124_clk_per.c1 /*-
36 #include <dev/clk/clk.h>
38 #include <dt-bindings/clock/tegra124-car.h>
213 /* bank L -> 0-31 */
241 /* bank H -> 32-63 */
270 /* bank U -> 64-95 */
299 /* bank V -> 96-127 */
325 /* bank W -> 128-159*/
334 /* GATE(CEC, "cec", "clk_m", W(8)), */
354 /* bank X -> 160-191*/
[all …]
/freebsd/sys/arm64/nvidia/tegra210/
H A Dtegra210_clk_per.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
37 #include <dev/clk/clk.h>
39 #include <dt-bindings/clock/tegra210-car.h>
40 #include <dt-bindings/reset/tegra210-car.h>
308 /* bank L -> 0-31 */
332 /* bank H -> 32-63 */
353 /* bank U -> 64-95 */
378 /* bank V -> 96-127 */
398 /* bank W -> 128-159*/
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mm-evk.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
9 #include <dt-bindings/usb/pd.h>
14 stdout-path = &uart2;
22 hdmi-connecto
[all...]
/freebsd/sys/contrib/device-tree/src/arm/nvidia/
H A Dtegra124.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-binding
[all...]
H A Dtegra30-apalis-v1.1.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
16 avdd-pexa-supply = <&vdd2_reg>;
17 avdd-pexb-supply = <&vdd2_reg>;
18 avdd-pex-pll-suppl
[all...]
H A Dtegra30-apalis.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 avdd-pexa-supply = <&vdd2_reg>;
16 avdd-pexb-supply = <&vdd2_reg>;
17 avdd-pex-pll-suppl
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