Searched full:cdce925 (Results 1 – 4 of 4) sorted by relevance
| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | ti,cdce925.yaml | 4 $id: http://devicetree.org/schemas/clock/ti,cdce925.yaml#
16 - CDCE(L)925: 2-PLL, 5 Outputs https://www.ti.com/product/cdce925
24 - ti,cdce925
89 cdce925: clock-controller@64 {
90 compatible = "ti,cdce925";
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| /linux/drivers/clk/ |
| H A D | clk-cdce925.c | 602 /* The CDCE925 uses a funky way to read/write registers. Bulk mode is
822 { "cdce925", (kernel_ulong_t)&clk_cdce925_info },
831 { .compatible = "ti,cdce925", .data = &clk_cdce925_info },
840 .name = "cdce925",
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| H A D | Makefile | 39 obj-$(CONFIG_COMMON_CLK_CDCE925) += clk-cdce925.o
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| H A D | Kconfig | 196 For example, the CDCE925 contains two PLLs with spread-spectrum
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