| /linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-v1/ |
| H A D | tlb.json | 8 … refill, then this event only counts once. This event counts for refills caused by preload instruc…
12 …"PublicDescription": "Counts level 1 data TLB accesses caused by any memory load or store operatio…
20 …n": "Counts level 2 TLB refills caused by memory operations from both data and instruction fetch, …
24 …"PublicDescription": "Counts level 2 TLB accesses except those caused by TLB maintenance operation…
28 …caused by a miss in the L2 TLB driven by a memory access. Note that partial translations that also…
32 …caused by a miss in the L2 TLB driven by a memory access. Partial translations that also cause a t…
36 …caused by memory read operations. If there are multiple misses in the TLB that are resolved by the…
40 …caused by data side memory write operations. If there are multiple misses in the TLB that are reso…
44 …"PublicDescription": "Counts level 1 data TLB accesses caused by memory read operations. This even…
48 …"PublicDescription": "Counts any L1 data side TLB accesses caused by memory write operations. This…
[all …]
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| H A D | l1d_cache.json | 4 …"PublicDescription": "Counts level 1 data cache refills caused by speculatively executed load or s…
8 …. Each access to a cache line is counted including the multiple accesses caused by single instruct…
24 … accesses generated by store operations. This event also counts accesses caused by a DC ZVA (data …
28 …"PublicDescription": "Counts level 1 data cache refills caused by speculatively executed load inst…
32 …"PublicDescription": "Counts level 1 data cache refills caused by speculatively executed store ins…
44 …ictions from the level 1 data cache caused by a new cache line allocation. This event does not cou…
52 …nts each explicit invalidation of a cache line in the level 1 data cache caused by:\n\n- Cache Mai…
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| H A D | exception.json | 20 …"PublicDescription": "Counts synchronous exceptions that are taken locally and caused by Instructi…
24 …"PublicDescription": "Counts exceptions that are taken locally and are caused by data aborts or SE…
44 …"PublicDescription": "Counts exceptions which are traps not taken locally and are caused by Instru…
48 …"PublicDescription": "Counts exceptions which are traps not taken locally and are caused by Data A…
|
| /linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/ |
| H A D | tlb.json | 8 "PublicDescription": "Counts level 1 data TLB accesses that resulted in TLB refills. If there are multiple misses in the TLB that are resolved by the refill, then this event only counts once. This event counts for refills caused by preload instructions or hardware prefetch accesses. This event counts regardless of whether the miss hits in L2 or results in a translation table walk. This event will not count if the translation table walk results in a fault (such as a translation or access fault), since there is no new translation created for the TLB. This event will not count on an access from an AT(address translation) instruction."
12 "PublicDescription": "Counts level 1 data TLB accesses caused by any memory load or store operation. Note that load or store instructions can be broken up into multiple memory operations. This event does not count TLB maintenance operations."
20 "PublicDescription": "Counts level 2 TLB refills caused by memory operations from both data and instruction fetch, except for those caused by TLB maintenance operations and hardware prefetches."
24 "PublicDescription": "Counts level 2 TLB accesses except those caused by TLB maintenance operations."
28 "PublicDescription": "Counts number of demand data translation table walks caused by a miss in the L2 TLB and performing at least one memory access. Translation table walks are counted even if the translation ended up taking a translation fault for reasons different than EPD, E0PD and NFD. Note that partial translations that cause a translation table walk are also counted. Also note that this event counts walks triggered by software preloads, but not walks triggered by hardware prefetchers, and that this event does not count walks triggered by TLB maintenance operations."
32 "PublicDescription": "Counts number of instruction translation table walks caused by a miss in the L2 TLB and performing at least one memory access. Translation table walks are counted even if the translation ended up taking a translation fault for reasons different than EPD, E0PD and NFD. Note that partial translations that cause a translation table walk are also counted. Also note that this event does not count walks triggered by TLB maintenance operations."
36 "PublicDescription": "Counts level 1 data TLB refills caused by memory read operations. If there are multiple misses in the TLB that are resolved by the refill, then this event only counts once. This event counts for refills caused by preload instructions or hardware prefetch accesses. This event counts regardless of whether the miss hits in L2 or results in a translation table walk. This event will not count if the translation table walk results in a fault (such as a translation or access fault), since there is no new translation created for the TLB. This event will not count on an access from an Address Translation (AT) instruction."
40 "PublicDescription": "Counts level 1 data TLB refills caused b
[all...] |
| H A D | l1d_cache.json | 4 "PublicDescription": "Counts level 1 data cache refills caused by speculatively executed load or store operations that missed in the level 1 data cache. This event only counts one event per cache line."
8 "PublicDescription": "Counts level 1 data cache accesses from any load/store operations. Atomic operations that resolve in the CPUs caches (near atomic operations) counts as both a write access and read access. Each access to a cache line is counted including the multiple accesses caused by single instructions such as LDM or STM. Each access to other level 1 data or unified memory structures, for example refill buffers, write buffers, and write-back buffers, are also counted."
24 "PublicDescription": "Counts level 1 data cache accesses generated by store operations. This event also counts accesses caused by a DC ZVA (data cache zero, specified by virtual address) instruction. Near atomic operations that resolve in the CPUs caches count as a write access and read access."
28 "PublicDescription": "Counts level 1 data cache refills caused by speculatively executed load instructions where the memory read operation misses in the level 1 data cache. This event only counts one event per cache line."
32 "PublicDescription": "Counts level 1 data cache refills caused by speculatively executed store instructions where the memory write operation misses in the level 1 data cache. This event only counts one event per cache line."
44 "PublicDescription": "Counts dirty cache line evictions from the level 1 data cache caused by a new cache line allocation. This event does not count evictions caused by cache maintenance operations."
52 "PublicDescription": "Counts each explicit invalidation of a cache line in the level 1 data cache caused by:\n\n- Cache Maintenance Operations (CMO) that operate by a virtual address.\n- Broadcast cache coherency operations from another CPU in the system.\n\nThis event does not count for the following conditions:\n\n1. A cache refill invalidates a cache line.\n2. A CMO which is executed on that CPU and invalidates a cache line specified by set/way.\n\nNote that CMOs that operate by set/way cannot be broadcast from one CPU to another."
|
| /linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-n1/ |
| H A D | tlb.json | 8 … refill, then this event only counts once. This event counts for refills caused by preload instruc…
12 …"PublicDescription": "Counts level 1 data TLB accesses caused by any memory load or store operatio…
20 …n": "Counts level 2 TLB refills caused by memory operations from both data and instruction fetch, …
24 …"PublicDescription": "Counts level 2 TLB accesses except those caused by TLB maintenance operation…
28 …caused by a miss in the L2 TLB driven by a memory access. Note that partial translations that also…
32 …caused by a miss in the L2 TLB driven by a memory access. Partial translations that also cause a t…
36 …caused by memory read operations. If there are multiple misses in the TLB that are resolved by the…
40 …caused by data side memory write operations. If there are multiple misses in the TLB that are reso…
44 …"PublicDescription": "Counts level 1 data TLB accesses caused by memory read operations. This even…
48 …"PublicDescription": "Counts any L1 data side TLB accesses caused by memory write operations. This…
[all …]
|
| H A D | l1d_cache.json | 4 …"PublicDescription": "Counts level 1 data cache refills caused by speculatively executed load or s…
8 …. Each access to a cache line is counted including the multiple accesses caused by single instruct…
20 … accesses generated by store operations. This event also counts accesses caused by a DC ZVA (data …
24 …"PublicDescription": "Counts level 1 data cache refills caused by speculatively executed load inst…
28 …"PublicDescription": "Counts level 1 data cache refills caused by speculatively executed store ins…
40 …ictions from the level 1 data cache caused by a new cache line allocation. This event does not cou…
48 …nts each explicit invalidation of a cache line in the level 1 data cache caused by:\n\n- Cache Mai…
|
| H A D | exception.json | 20 …"PublicDescription": "Counts synchronous exceptions that are taken locally and caused by Instructi…
24 …"PublicDescription": "Counts exceptions that are taken locally and are caused by data aborts or SE…
44 …"PublicDescription": "Counts exceptions which are traps not taken locally and are caused by Instru…
48 …"PublicDescription": "Counts exceptions which are traps not taken locally and are caused by Data A…
|
| /linux/tools/perf/pmu-events/arch/arm64/fujitsu/a64fx/ |
| H A D | cache.json | 45 …"PublicDescription": "This event counts L1D_CACHE_REFILL caused by software or hardware prefetch.",
48 … "BriefDescription": "This event counts L1D_CACHE_REFILL caused by software or hardware prefetch."
51 …"PublicDescription": "This event counts L2D_CACHE_REFILL caused by software or hardware prefetch.",
54 … "BriefDescription": "This event counts L2D_CACHE_REFILL caused by software or hardware prefetch."
57 "PublicDescription": "This event counts L1D_CACHE_REFILL caused by demand access.",
60 "BriefDescription": "This event counts L1D_CACHE_REFILL caused by demand access."
63 "PublicDescription": "This event counts L1D_CACHE_REFILL caused by hardware prefetch.",
66 "BriefDescription": "This event counts L1D_CACHE_REFILL caused by hardware prefetch."
81 "PublicDescription": "This event counts L2D_CACHE_REFILL caused by demand access.",
84 "BriefDescription": "This event counts L2D_CACHE_REFILL caused by demand access."
[all …]
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| /linux/tools/perf/pmu-events/arch/x86/skylake/ |
| H A D | virtual-memory.json | 7 …"PublicDescription": "Counts demand data loads that caused a page walk of any page size (4K/2M/4M/…
35 …"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. T…
44 …"PublicDescription": "Counts completed page walks (1G sizes) caused by demand data loads. This im…
53 …"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data loads. This…
62 …"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data loads. This im…
80 …"PublicDescription": "Counts demand data stores that caused a page walk of any page size (4K/2M/4M…
108 …"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data stores. …
117 …"PublicDescription": "Counts completed page walks (1G sizes) caused by demand data stores. This i…
126 …"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data stores. Thi…
135 …"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data stores. This i…
[all …]
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| /linux/tools/perf/pmu-events/arch/x86/skylakex/ |
| H A D | virtual-memory.json | 7 …"PublicDescription": "Counts demand data loads that caused a page walk of any page size (4K/2M/4M/…
35 …"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. T…
44 …"PublicDescription": "Counts completed page walks (1G sizes) caused by demand data loads. This im…
53 …"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data loads. This…
62 …"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data loads. This im…
80 …"PublicDescription": "Counts demand data stores that caused a page walk of any page size (4K/2M/4M…
108 …"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data stores. …
117 …"PublicDescription": "Counts completed page walks (1G sizes) caused by demand data stores. This i…
126 …"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data stores. Thi…
135 …"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data stores. This i…
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/cascadelakex/ |
| H A D | virtual-memory.json | 7 …"PublicDescription": "Counts demand data loads that caused a page walk of any page size (4K/2M/4M/…
35 …"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. T…
44 …"PublicDescription": "Counts completed page walks (1G sizes) caused by demand data loads. This im…
53 …"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data loads. This…
62 …"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data loads. This im…
80 …"PublicDescription": "Counts demand data stores that caused a page walk of any page size (4K/2M/4M…
108 …"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data stores. …
117 …"PublicDescription": "Counts completed page walks (1G sizes) caused by demand data stores. This i…
126 …"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data stores. Thi…
135 …"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data stores. This i…
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/emeraldrapids/ |
| H A D | virtual-memory.json | 26 …"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. T…
35 …"PublicDescription": "Counts completed page walks (1G sizes) caused by demand data loads. This im…
44 …"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data loads. This…
53 …"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data loads. This im…
90 …"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data stores. …
99 …"PublicDescription": "Counts completed page walks (1G sizes) caused by demand data stores. This i…
108 …"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data stores. Thi…
117 …"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data stores. This i…
154 …"PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This im…
163 …"PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This …
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/sapphirerapids/ |
| H A D | virtual-memory.json | 26 …"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. T…
35 …"PublicDescription": "Counts completed page walks (1G sizes) caused by demand data loads. This im…
44 …"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data loads. This…
53 …"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data loads. This im…
90 …"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data stores. …
99 …"PublicDescription": "Counts completed page walks (1G sizes) caused by demand data stores. This i…
108 …"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data stores. Thi…
117 …"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data stores. This i…
154 …"PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This im…
163 …"PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This …
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/graniterapids/ |
| H A D | virtual-memory.json | 26 …"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. T…
35 …"PublicDescription": "Counts completed page walks (1G sizes) caused by demand data loads. This im…
44 …"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data loads. This…
53 …"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data loads. This im…
90 …"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data stores. …
99 …"PublicDescription": "Counts completed page walks (1G sizes) caused by demand data stores. This i…
108 …"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data stores. Thi…
117 …"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data stores. This i…
154 …"PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This im…
163 …"PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This …
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/icelakex/ |
| H A D | virtual-memory.json | 26 …"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. T…
35 …"PublicDescription": "Counts completed page walks (1G sizes) caused by demand data loads. This im…
44 …"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data loads. This…
53 …"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data loads. This im…
90 …"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data stores. …
99 …"PublicDescription": "Counts completed page walks (1G sizes) caused by demand data stores. This i…
108 …"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data stores. Thi…
117 …"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data stores. This i…
154 …"PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This im…
163 …"PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This …
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/rocketlake/ |
| H A D | virtual-memory.json | 26 …"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. T…
35 …"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data loads. This…
44 …"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data loads. This im…
81 …"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data stores. …
90 …"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data stores. Thi…
99 …"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data stores. This i…
136 …"PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This im…
145 …"PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This …
154 …"PublicDescription": "Counts completed page walks (4K page sizes) caused by a code fetch. This imp…
|
| /linux/tools/perf/pmu-events/arch/x86/icelake/ |
| H A D | virtual-memory.json | 26 …"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. T…
35 …"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data loads. This…
44 …"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data loads. This im…
81 …"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data stores. …
90 …"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data stores. Thi…
99 …"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data stores. This i…
136 …"PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This im…
145 …"PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This …
154 …"PublicDescription": "Counts completed page walks (4K page sizes) caused by a code fetch. This imp…
|
| /linux/tools/perf/pmu-events/arch/x86/alderlake/ |
| H A D | virtual-memory.json | 38 …"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. T…
48 …"PublicDescription": "Counts completed page walks (1G sizes) caused by demand data loads. This im…
58 …"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data loads. This…
68 …"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data loads. This im…
119 …"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data stores. …
129 …"PublicDescription": "Counts completed page walks (1G sizes) caused by demand data stores. This i…
139 …"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data stores. Thi…
149 …"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data stores. This i…
218 …"PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This im…
228 …"PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This …
[all …]
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| /linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a73/ |
| H A D | pipeline.json | 3 "PublicDescription": "A linefill caused an instruction side stall",
6 "BriefDescription": "A linefill caused an instruction side stall"
9 "PublicDescription": "A translation table walk caused an instruction side stall",
12 "BriefDescription": "A translation table walk caused an instruction side stall"
|
| /linux/tools/testing/selftests/kvm/s390x/ |
| H A D | debug_test.c | |
| /linux/tools/perf/pmu-events/arch/powerpc/power10/ |
| H A D | pmc.json | 15 "BriefDescription": "The event selected for PMC4 caused the event counter to overflow."
40 "BriefDescription": "The event selected for PMC5 caused the event counter to overflow."
85 "BriefDescription": "The event selected for PMC1 caused the event counter to overflow."
115 "BriefDescription": "The event selected for PMC2 caused the event counter to overflow."
130 "BriefDescription": "The event selected for PMC6 caused the event counter to overflow."
155 "BriefDescription": "The event selected for PMC3 caused the event counter to overflow."
|
| /linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a75/ |
| H A D | pipeline.json | 9 "PublicDescription": "A linefill caused an instruction side stall",
12 "BriefDescription": "A linefill caused an instruction side stall"
15 "PublicDescription": "A translation table walk caused an instruction side stall",
18 "BriefDescription": "A translation table walk caused an instruction side stall"
|
| /linux/tools/perf/pmu-events/arch/x86/tigerlake/ |
| H A D | virtual-memory.json | 26 …"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. T…
35 …"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data loads. This…
44 …"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data loads. This im…
81 …"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data stores. …
136 …"PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This im…
145 …"PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This …
154 …"PublicDescription": "Counts completed page walks (4K page sizes) caused by a code fetch. This imp…
|
| /linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/ |
| H A D | pipeline.json | 45 …d there is an interlock on an address operand. This type of interlock is caused by a load/store in…
48 …d there is an interlock on an address operand. This type of interlock is caused by a load/store in…
51 … event counts every cycle where there is a stall or an interlock that is caused by a VPU instructi…
54 … event counts every cycle where there is a stall or an interlock that is caused by a VPU instructi…
69 … to a load that is waiting on data. The event counts for stalls that are caused by missing the cac…
72 … to a load that is waiting on data. The event counts for stalls that are caused by missing the cac…
|