| /linux/drivers/gpio/ | 
| H A D | gpio-exar.c | 41 	 * The offset to the cascaded device's (if existing)51 	unsigned int cascaded = offset / 16;  in exar_offset_to_sel_addr()  local
 54 	return addr + (cascaded ? exar_gpio->cascaded_offset : 0);  in exar_offset_to_sel_addr()
 61 	unsigned int cascaded = offset / 16;  in exar_offset_to_lvl_addr()  local
 64 	return addr + (cascaded ? exar_gpio->cascaded_offset : 0);  in exar_offset_to_lvl_addr()
 181 	 * If cascaded, secondary xr17v354 or xr17v358 have the same amount  in gpio_exar_probe()
 
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| /linux/include/linux/comedi/ | 
| H A D | comedi_8254.h | 82  * @osc_base:		cascaded oscillator speed in ns84  * @divisor1:		divisor loaded into first cascaded counter
 85  * @divisor2:		divisor loaded into second cascaded counter
 87  * @next_div1:		next divisor to use for first cascaded counter
 88  * @next_div2:		next divisor to use for second cascaded counter
 
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| /linux/arch/powerpc/platforms/52xx/ | 
| H A D | media5200.c | 13  * a cascaded interrupt controller driver which attaches itself to the85 	/* Mask off the cascaded IRQ */  in media5200_irq_cascade()
 164 	pr_debug("%s: cascaded on virq=%i\n", __func__, cascade_virq);  in media5200_init_irq()
 
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| /linux/arch/m68k/include/asm/ | 
| H A D | macints.h | 106 /* Nubus interrupts (cascaded to VIA2) */115 /* Baboon interrupts (cascaded to nubus slot $C) */
 
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| /linux/drivers/comedi/drivers/ | 
| H A D | comedi_8254.c | 78  * provided to handle the cascaded counters:92  *	Programs the mode of the cascaded counters and writes the current
 103  *	counters that are used for the cascaded 32-bit pacer.
 341  * comedi_8254_pacer_enable - set the mode and load the cascaded counters
 378  * comedi_8254_update_divisors - update the divisors for the cascaded counters
 391  * comedi_8254_cascade_ns_to_timer - calculate the cascaded divisor values
 
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| /linux/arch/powerpc/platforms/powermac/ | 
| H A D | pic.c | 302 		/* We might have a second cascaded ohare */  in pmac_pic_probe_oldstyle()309 		/* We might have a second cascaded heathrow */  in pmac_pic_probe_oldstyle()
 352 	/* Map interrupts of cascaded controller */  in pmac_pic_probe_oldstyle()
 477 	/* We can have up to 2 MPICs cascaded */  in pmac_pic_probe_mpic()
 511 	/* Set up a cascaded controller, if present */  in pmac_pic_probe_mpic()
 
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| /linux/arch/xtensa/platforms/xt2000/include/platform/ | 
| H A D | hardware.h | 31 /* The XT2000 uses the V3 as a cascaded interrupt controller for the PCI bus */
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| /linux/arch/arm/boot/dts/ti/omap/ | 
| H A D | omap4-duovero.dtsi | 168 		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;		/* IRQ_SYS_1N cascaded to gic */175 		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;		/* IRQ_SYS_2N cascaded to gic */
 
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| H A D | omap4-var-som-om44.dtsi | 176 		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */188 		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
 
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| H A D | omap2430-sdp.dts | 24 		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
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| H A D | omap3-cm-t3x30.dtsi | 69 		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
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| H A D | am3517-craneboard.dts | 86 	interrupts = <7>; /* SYS_NIRQ cascaded to intc */
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| /linux/drivers/irqchip/ | 
| H A D | irq-bcm2835.c | 18  * In a proper cascaded interrupt controller, the interrupt lines with19  * cascaded interrupt controllers on them are just normal interrupt lines.
 
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| H A D | irq-goldfish-pic.c | 20 /* 8..39 Cascaded Goldfish PIC interrupts */
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| /linux/arch/hexagon/kernel/ | 
| H A D | irq_cpu.c | 58  * controllers that are cascaded into one or more of the first-level
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| /linux/tools/perf/arch/x86/tests/ | 
| H A D | amd-ibs-period.c | 376 			 * the failure status is not cascaded up because, we  in ibs_config_test()398 			 * the failure status is not cascaded up because, we  in ibs_config_test()
 566 			 * the failure status is not cascaded up because, we  in ibs_period_constraint_test()
 590 			 * the failure status is not cascaded up because, we  in ibs_period_constraint_test()
 861 			 * the failure status is not cascaded up because, we  in ibs_l3missonly_test()
 879 			 * the failure status is not cascaded up because, we  in ibs_l3missonly_test()
 
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| /linux/arch/mips/include/asm/ | 
| H A D | i8259.h | 68 		 * Interrupt is cascaded so perform interrupt  in i8259_irq()
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| /linux/arch/mips/dec/ | 
| H A D | ioasic-irq.c | 82  * ASIC is cascaded to, are level-triggered it is recommended that error
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| /linux/arch/powerpc/sysdev/ | 
| H A D | tsi108_pci.c | 354  * Interrupt controller descriptor for cascaded PCI interrupt controller.399  * PCI block has to be treated as a cascaded interrupt controller connected
 
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| /linux/drivers/scsi/csiostor/ | 
| H A D | csio_mb.c | 479  * because this IQ write request can be cascaded with a previous481  * that request. This logic will work even in a non-cascaded case, since the
 498 	 * If this IQ write is cascaded with IQ alloc request, do not  in csio_mb_iq_write()
 688  * because this EQ write request can be cascaded with a previous
 690  * that request. This logic will work even in a non-cascaded case, since the
 706 	 * If this EQ write is cascaded with EQ alloc request, do not  in csio_mb_eq_ofld_write()
 
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| /linux/arch/mips/alchemy/devboards/ | 
| H A D | bcsr.c | 27 static int bcsr_csc_base;	/* linux-irq of first cascaded irq */
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| /linux/arch/powerpc/platforms/86xx/ | 
| H A D | gef_sbc310.c | 57 	 * to be cascaded into the MPIC  in gef_sbc310_init_irq()
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| H A D | gef_sbc610.c | 57 	 * to be cascaded into the MPIC  in gef_sbc610_init_irq()
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| /linux/Documentation/devicetree/bindings/interrupt-controller/ | 
| H A D | interrupts.txt | 64 		interrupts = <31>; /* Cascaded to vic */
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| /linux/arch/arc/kernel/ | 
| H A D | intc-compact.c | 60  * Platforms with external intc, hence cascaded IRQs, are free to over-ride
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