xref: /linux/Documentation/devicetree/bindings/interrupt-controller/interrupts.txt (revision c95baf12f5077419db01313ab61c2aac007d40cd)
1acc20979SThierry RedingSpecifying interrupt information for devices
2acc20979SThierry Reding============================================
3acc20979SThierry Reding
4acc20979SThierry Reding1) Interrupt client nodes
5acc20979SThierry Reding-------------------------
6acc20979SThierry Reding
7a9ecdc0fSFlorian FainelliNodes that describe devices which generate interrupts must contain an
8a9ecdc0fSFlorian Fainelli"interrupts" property, an "interrupts-extended" property, or both. If both are
9a9ecdc0fSFlorian Fainellipresent, the latter should take precedence; the former may be provided simply
10a9ecdc0fSFlorian Fainellifor compatibility with software that does not recognize the latter. These
11a9ecdc0fSFlorian Fainelliproperties contain a list of interrupt specifiers, one per output interrupt. The
12a9ecdc0fSFlorian Fainelliformat of the interrupt specifier is determined by the interrupt controller to
13a9ecdc0fSFlorian Fainelliwhich the interrupts are routed; see section 2 below for details.
1479d97015SGrant Likely
1579d97015SGrant Likely  Example:
1679d97015SGrant Likely	interrupt-parent = <&intc1>;
1779d97015SGrant Likely	interrupts = <5 0>, <6 0>;
18acc20979SThierry Reding
19acc20979SThierry RedingThe "interrupt-parent" property is used to specify the controller to which
20acc20979SThierry Redinginterrupts are routed and contains a single phandle referring to the interrupt
21acc20979SThierry Redingcontroller node. This property is inherited, so it may be specified in an
2279d97015SGrant Likelyinterrupt client node or in any of its parent nodes. Interrupts listed in the
2379d97015SGrant Likely"interrupts" property are always in reference to the node's interrupt parent.
2479d97015SGrant Likely
256df58e48SStephen BoydThe "interrupts-extended" property is a special form; useful when a node needs
266df58e48SStephen Boydto reference multiple interrupt parents or a different interrupt parent than
276df58e48SStephen Boydthe inherited one. Each entry in this property contains both the parent phandle
286df58e48SStephen Boydand the interrupt specifier.
2979d97015SGrant Likely
3079d97015SGrant Likely  Example:
3179d97015SGrant Likely	interrupts-extended = <&intc1 5 1>, <&intc2 1 0>;
3279d97015SGrant Likely
33acc20979SThierry Reding2) Interrupt controller nodes
34acc20979SThierry Reding-----------------------------
35acc20979SThierry Reding
36acc20979SThierry RedingA device is marked as an interrupt controller with the "interrupt-controller"
37acc20979SThierry Redingproperty. This is a empty, boolean property. An additional "#interrupt-cells"
38acc20979SThierry Redingproperty defines the number of cells needed to specify a single interrupt.
39acc20979SThierry Reding
40acc20979SThierry RedingIt is the responsibility of the interrupt controller's binding to define the
41acc20979SThierry Redinglength and format of the interrupt specifier. The following two variants are
42acc20979SThierry Redingcommonly used:
43acc20979SThierry Reding
44acc20979SThierry Reding  a) one cell
45acc20979SThierry Reding  -----------
46acc20979SThierry Reding  The #interrupt-cells property is set to 1 and the single cell defines the
47acc20979SThierry Reding  index of the interrupt within the controller.
48acc20979SThierry Reding
49acc20979SThierry Reding  Example:
50acc20979SThierry Reding
51acc20979SThierry Reding	vic: intc@10140000 {
52acc20979SThierry Reding		compatible = "arm,versatile-vic";
53acc20979SThierry Reding		interrupt-controller;
54acc20979SThierry Reding		#interrupt-cells = <1>;
55acc20979SThierry Reding		reg = <0x10140000 0x1000>;
56acc20979SThierry Reding	};
57acc20979SThierry Reding
58acc20979SThierry Reding	sic: intc@10003000 {
59acc20979SThierry Reding		compatible = "arm,versatile-sic";
60acc20979SThierry Reding		interrupt-controller;
61acc20979SThierry Reding		#interrupt-cells = <1>;
62acc20979SThierry Reding		reg = <0x10003000 0x1000>;
63acc20979SThierry Reding		interrupt-parent = <&vic>;
64acc20979SThierry Reding		interrupts = <31>; /* Cascaded to vic */
65acc20979SThierry Reding	};
66acc20979SThierry Reding
67acc20979SThierry Reding  b) two cells
68acc20979SThierry Reding  ------------
69acc20979SThierry Reding  The #interrupt-cells property is set to 2 and the first cell defines the
70acc20979SThierry Reding  index of the interrupt within the controller, while the second cell is used
71acc20979SThierry Reding  to specify any of the following flags:
72acc20979SThierry Reding    - bits[3:0] trigger type and level flags
73acc20979SThierry Reding        1 = low-to-high edge triggered
74acc20979SThierry Reding        2 = high-to-low edge triggered
75acc20979SThierry Reding        4 = active high level-sensitive
76acc20979SThierry Reding        8 = active low level-sensitive
77acc20979SThierry Reding
78acc20979SThierry Reding  Example:
79acc20979SThierry Reding
80acc20979SThierry Reding	i2c@7000c000 {
81acc20979SThierry Reding		gpioext: gpio-adnp@41 {
82acc20979SThierry Reding			compatible = "ad,gpio-adnp";
83acc20979SThierry Reding			reg = <0x41>;
84acc20979SThierry Reding
85acc20979SThierry Reding			interrupt-parent = <&gpio>;
86acc20979SThierry Reding			interrupts = <160 1>;
87acc20979SThierry Reding
88acc20979SThierry Reding			gpio-controller;
89acc20979SThierry Reding			#gpio-cells = <1>;
90acc20979SThierry Reding
91acc20979SThierry Reding			interrupt-controller;
92acc20979SThierry Reding			#interrupt-cells = <2>;
93acc20979SThierry Reding
94acc20979SThierry Reding			nr-gpios = <64>;
95acc20979SThierry Reding		};
96acc20979SThierry Reding
97acc20979SThierry Reding		sx8634@2b {
98acc20979SThierry Reding			compatible = "smtc,sx8634";
99acc20979SThierry Reding			reg = <0x2b>;
100acc20979SThierry Reding
101acc20979SThierry Reding			interrupt-parent = <&gpioext>;
102acc20979SThierry Reding			interrupts = <3 0x8>;
103acc20979SThierry Reding
104acc20979SThierry Reding			#address-cells = <1>;
105acc20979SThierry Reding			#size-cells = <0>;
106acc20979SThierry Reding
107acc20979SThierry Reding			threshold = <0x40>;
108acc20979SThierry Reding			sensitivity = <7>;
109acc20979SThierry Reding		};
110acc20979SThierry Reding	};
111*09d31567SLina Iyer
112*09d31567SLina Iyer3) Interrupt wakeup parent
113*09d31567SLina Iyer--------------------------
114*09d31567SLina Iyer
115*09d31567SLina IyerSome interrupt controllers in a SoC, are always powered on and have a select
116*09d31567SLina Iyerinterrupts routed to them, so that they can wakeup the SoC from suspend. These
117*09d31567SLina Iyerinterrupt controllers do not fall into the category of a parent interrupt
118*09d31567SLina Iyercontroller and can be specified by the "wakeup-parent" property and contain a
119*09d31567SLina Iyersingle phandle referring to the wakeup capable interrupt controller.
120*09d31567SLina Iyer
121*09d31567SLina Iyer   Example:
122*09d31567SLina Iyer	wakeup-parent = <&pdc_intc>;
123