/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8mn-ddr3l-evk.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 6 #include "imx8mn-evk.dtsi" 7 #include <dt-bindings/interrupt-controller/irq.h> 11 compatible = "fsl,imx8mn-ddr3l-evk", "fsl,imx8mn"; 15 cpu-supply = <&buck1>; 19 cpu-supply = <&buck1>; 23 cpu-supply = <&buck1>; 27 cpu-supply = <&buck1>; 34 pinctrl-names = "default"; [all …]
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H A D | imx8mn-evk.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 9 #include "imx8mn-evk.dtsi" 10 #include <dt-bindings/interrupt-controller/irq.h> 14 compatible = "fsl,imx8mn-evk", "fsl,imx8mn"; 18 cpu-supply = <&buck2>; 22 cpu-supply = <&buck2>; 26 cpu-supply = <&buck2>; 30 cpu-supply = <&buck2>; 37 pinctrl-names = "default"; [all …]
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H A D | imx93-tqma9352.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright (c) 2022 TQ-Systems GmbH <linux@ew.tq-group.com>, 4 * D-82229 Seefeld, Germany. 11 model = "TQ-Systems i.MX93 TQMa93xxLA/TQMa93xxCA SOM"; 12 compatible = "tq,imx93-tqma9352", "fsl,imx93"; 14 reserved-memory { 15 #address-cells = <2>; 16 #size-cells = <2>; 20 compatible = "shared-dma-pool"; 22 alloc-ranges = <0 0x80000000 0 0x40000000>; [all …]
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H A D | imx8mn-ddr4-evk.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 9 #include "imx8mn-evk.dtsi" 13 compatible = "fsl,imx8mn-ddr4-evk", "fsl,imx8mn"; 17 cpu-supply = <&buck2_reg>; 21 cpu-supply = <&buck2_reg>; 25 cpu-supply = <&buck2_reg>; 29 cpu-supply = <&buck2_reg>; 33 operating-points-v2 = <&ddrc_opp_table>; 35 ddrc_opp_table: opp-table { [all …]
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H A D | imx8mp-icore-mx8mp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 9 compatible = "engicam,icore-mx8mp", "fsl,imx8mp"; 13 cpu-supply = <&buck2>; 17 cpu-supply = <&buck2>; 21 cpu-supply = <&buck2>; 25 cpu-supply = <&buck2>; 29 clock-frequency = <100000>; 30 pinctrl-names = "default"; 31 pinctrl-0 = <&pinctrl_i2c1>; 36 interrupt-parent = <&gpio3>; [all …]
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H A D | imx8mm-emtop-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/leds/common.h> 10 #include <dt-bindings/usb/pd.h> 15 model = "Emtop Embedded Solutions i.MX8M Mini SOM-IMX8MMLPD4 SoM"; 16 compatible = "ees,imx8mm-emtop-som", "fsl,imx8mm"; 19 stdout-path = &uart2; 23 compatible = "gpio-leds"; 24 pinctrl-names = "default"; [all …]
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H A D | imx8mp-beacon-kit.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include <dt-bindings/usb/pd.h> 9 #include <dt-bindings/phy/phy-imx8-pcie.h> 11 #include "imx8mp-beacon-som.dtsi" 15 compatible = "beacon,imx8mp-beacon-kit", "fsl,imx8mp"; 23 stdout-path = &uart2; 26 clk_xtal25: clock-xtal25 { 27 compatible = "fixed-clock"; 28 #clock-cells = <0>; [all …]
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H A D | imx8mp-phycore-som.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 7 #include <dt-bindings/net/ti-dp83867.h> 11 model = "PHYTEC phyCORE-i.MX8MP"; 12 compatible = "phytec,imx8mp-phycore-som", "fsl,imx8mp"; 24 reg_vdd_io: regulator-vdd-io { 25 compatible = "regulator-fixed"; 26 regulator-always-on; 27 regulator-boot-on; 28 regulator-max-microvolt = <3300000>; 29 regulator-min-microvolt = <3300000>; [all …]
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H A D | imx8mp-debix-som-a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 9 #include <dt-bindings/leds/common.h> 13 compatible = "polyhex,imx8mp-debix-som-a", "fsl,imx8mp"; 15 reg_usdhc2_vmmc: regulator-usdhc2 { 16 compatible = "regulator-fixed"; 17 pinctrl-names = "default"; 18 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; 19 regulator-name = "VSD_3V3"; 20 regulator-min-microvolt = <3300000>; 21 regulator-max-microvolt = <3300000>; [all …]
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H A D | imx8mp-var-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include <dt-bindings/phy/phy-imx8-pcie.h> 11 #include <dt-bindings/leds/common.h> 12 #include <dt-bindings/usb/pd.h> 16 model = "Variscite VAR-SOM-MX8M Plus module"; 19 stdout-path = &uart2; 22 gpio-leds { 23 compatible = "gpio-leds"; 25 led-0 { [all …]
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H A D | imx8mn-beacon-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 #include "imx8mn-overdrive.dtsi" 16 compatible = "mmc-pwrseq-simple"; 17 pinctrl-names = "default"; 18 pinctrl-0 = <&pinctrl_usdhc1_gpio>; 19 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; 21 clock-names = "ext_clock"; 22 post-power-on-delay-ms = <80>; 32 cpu-supply = <&buck2_reg>; 36 cpu-supply = <&buck2_reg>; [all …]
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H A D | imx8mm-innocomm-wb15.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/phy/phy-imx8-pcie.h> 10 reg_modem: regulator-modem { 11 compatible = "regulator-fixed"; 12 pinctrl-names = "default"; 13 pinctrl-0 = <&pinctrl_modem_regulator>; 14 regulator-min-microvolt = <3300000>; 15 regulator-max-microvolt = <3300000>; 16 regulator-name = "epdev_on"; 18 enable-active-high; [all …]
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H A D | imx8mp-beacon-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 18 reg_wl_bt: regulator-wifi-bt { 19 compatible = "regulator-fixed"; 20 pinctrl-names = "default"; 21 pinctrl-0 = <&pinctrl_reg_wl_bt>; 22 regulator-name = "wl-bt-pow-dwn"; 23 regulator-min-microvolt = <3300000>; 24 regulator-max-microvolt = <3300000>; 26 startup-delay-us = <70000>; 27 regulator-always-on; [all …]
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H A D | imx8mq-phanbell.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 * Copyright 2017-2019 NXP 6 /dts-v1/; 9 #include <dt-bindings/interrupt-controller/irq.h> 13 compatible = "google,imx8mq-phanbell", "fsl,imx8mq"; 16 stdout-path = &uart1; 24 pmic_osc: clock-pmic { 25 compatible = "fixed-clock"; 26 #clock-cells = <0>; 27 clock-frequency = <32768>; [all …]
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H A D | imx8mp-debix-model-a.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/leds/common.h> 11 #include <dt-bindings/usb/pd.h> 17 compatible = "polyhex,imx8mp-debix-model-a", "polyhex,imx8mp-debix", "fsl,imx8mp"; 20 stdout-path = &uart2; 23 hdmi-connector { 24 compatible = "hdmi-connector"; 30 remote-endpoint = <&hdmi_tx_out>; [all …]
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H A D | imx8mm-kontron-sl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 10 compatible = "kontron,imx8mm-sl", "fsl,imx8mm"; 23 stdout-path = &uart3; 28 cpu-supply = <®_vdd_arm>; 32 cpu-supply = <®_vdd_arm>; 36 cpu-supply = <®_vdd_arm>; 40 cpu-supply = <®_vdd_arm>; 44 operating-points-v2 = <&ddrc_opp_table>; 46 ddrc_opp_table: opp-table { 47 compatible = "operating-points-v2"; [all …]
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H A D | imx8mm-beacon-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 #include "imx8mm-overdrive.dtsi" 15 compatible = "mmc-pwrseq-simple"; 16 pinctrl-names = "default"; 17 pinctrl-0 = <&pinctrl_usdhc1_gpio>; 18 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; 20 clock-names = "ext_clock"; 21 post-power-on-delay-ms = <80>; 31 cpu-supply = <&buck2_reg>; 35 cpu-supply = <&buck2_reg>; [all …]
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H A D | imx8mp-tqma8mpql.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 * Copyright 2021-2025 TQ-Systems GmbH <linux@ew.tq-group.com>, 4 * D-82229 Seefeld, Germany. 11 model = "TQ-Systems i.MX8MPlus TQMa8MPxL"; 12 compatible = "tq,imx8mp-tqma8mpql", "fsl,imx8mp"; 20 reg_vcc3v3: regulator-vcc3v3 { 21 compatible = "regulator-fixed"; 22 regulator-name = "VCC3V3"; 23 regulator-min-microvolt = <3300000>; 24 regulator-max-microvolt = <3300000>; [all …]
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H A D | imx8mn-tqma8mqnl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright 2020-2021 TQ-Systems GmbH 9 model = "TQ-Systems i.MX8MN TQMa8MxNL"; 10 compatible = "tq,imx8mn-tqma8mqnl", "fsl,imx8mn"; 18 /* e-MMC IO, needed for HS modes */ 19 reg_vcc1v8: regulator-vcc1v8 { 20 compatible = "regulator-fixed"; 21 regulator-name = "TQMA8MXNL_VCC1V8"; 22 regulator-min-microvolt = <1800000>; 23 regulator-max-microvolt = <1800000>; [all …]
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H A D | imx8mn-bsh-smm-s2-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 7 /dts-v1/; 10 #include "imx8mn-bsh-smm-s2-display.dtsi" 14 stdout-path = &uart4; 17 fec_supply: fec-supply-en { 18 compatible = "regulator-fixed"; 19 vin-supply = <&buck4_reg>; 20 regulator-name = "tja1101_en"; 21 regulator-min-microvolt = <3300000>; 22 regulator-max-microvolt = <3300000>; [all …]
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H A D | imx8mm-tqma8mqml.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright 2020-2021 TQ-Systems GmbH 6 #include <dt-bindings/phy/phy-imx8-pcie.h> 10 model = "TQ-Systems GmbH i.MX8MM TQMa8MxML"; 11 compatible = "tq,imx8mm-tqma8mqml", "fsl,imx8mm"; 19 /* e-MMC IO, needed for HS modes */ 20 reg_vcc1v8: regulator-vcc1v8 { 21 compatible = "regulator-fixed"; 22 regulator-name = "TQMA8MXML_VCC1V8"; 23 regulator-min-microvolt = <1800000>; [all …]
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/linux/Documentation/devicetree/bindings/regulator/ |
H A D | maxim,max8997.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzk@kernel.org> 15 motor driver, flash LED driver and Micro-USB Interface Controller. 22 const: maxim,max8997-pmic 24 charger-supply: 30 - description: irq1 interrupt 31 - description: alert interrupt 33 max8997,pmic-buck1-dvs-voltage: [all …]
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/linux/arch/arm64/boot/dts/ti/ |
H A D | k3-j721s2-som-p0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 /dts-v1/; 10 #include "k3-j721s2.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 16 bootph-all; 23 reserved_memory: reserved-memory { 24 #address-cells = <2>; 25 #size-cells = <2>; 31 no-map; [all …]
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H A D | k3-j721e-som-p0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Copyright (C) 2019-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 /dts-v1/; 10 #include "k3-j721e.dtsi" 15 bootph-all; 21 reserved_memory: reserved-memory { 22 #address-cells = <2>; 23 #size-cells = <2>; 29 no-map; 32 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { [all …]
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/linux/arch/arm/boot/dts/samsung/ |
H A D | exynos4210-trats.dts | 1 // SPDX-License-Identifier: GPL-2.0 12 /dts-v1/; 14 #include <dt-bindings/gpio/gpio.h> 19 chassis-type = "handset"; 37 stdout-path = "serial2:115200n8"; 40 vemmc_reg: regulator-0 { 41 compatible = "regulator-fixed"; 42 regulator-name = "VMEM_VDD_2.8V"; 43 regulator-min-microvolt = <2800000>; 44 regulator-max-microvolt = <2800000>; [all …]
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