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Searched +full:brcmstb +full:- +full:reset (Results 1 – 11 of 11) sorted by relevance

/linux/Documentation/devicetree/bindings/arm/bcm/
H A Dbrcm,brcmstb.txt2 -----------------------------------------------
3 Boards with Broadcom Brahma15 ARM-based BCMxxxx (generally BCM7xxx variants)
7 - compatible: "brcm,bcm<chip_id>", "brcm,brcmstb"
11 #address-cells = <2>;
12 #size-cells = <2>;
14 compatible = "brcm,bcm7445", "brcm,brcmstb";
16 Further, syscon nodes that map platform-specific registers used for general
19 - compatible: "brcm,bcm<chip_id>-sun-top-ctrl", "syscon"
20 - compatible: "brcm,bcm<chip_id>-cpu-biu-ctrl",
21 "brcm,brcmstb-cpu-biu-ctrl",
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/linux/Documentation/devicetree/bindings/reset/
H A Dbrcm,brcmstb-reset.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/brcm,brcmstb-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom STB SW_INIT-style reset controller
10 Broadcom STB SoCs have a SW_INIT-style reset controller with separate
12 reset lines.
14 Please also refer to reset.txt in this directory for common reset
18 - Florian Fainelli <f.fainelli@gmail.com>
22 const: brcm,brcmstb-reset
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/linux/drivers/reset/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-y += core.o
3 obj-y += amlogic/
4 obj-y += hisilicon/
5 obj-y += starfive/
6 obj-y += sti/
7 obj-y += tegra/
8 obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
9 obj-$(CONFIG_RESET_ASPEED) += reset-aspeed.o
10 obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
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H A Dreset-brcmstb.c1 // SPDX-License-Identifier: GPL-2.0
3 * Broadcom STB generic reset controller for SW_INIT style reset controller
14 #include <linux/reset-controller.h>
46 writel_relaxed(SW_INIT_BIT(id), priv->base + off + SW_INIT_SET); in brcmstb_reset_assert()
57 writel_relaxed(SW_INIT_BIT(id), priv->base + off + SW_INIT_CLEAR); in brcmstb_reset_deassert()
58 /* Maximum reset delay after de-asserting a line and seeing block in brcmstb_reset_deassert()
73 return readl_relaxed(priv->base + off + SW_INIT_STATUS) & in brcmstb_reset_status()
85 struct device *kdev = &pdev->dev; in brcmstb_reset_probe()
91 return -ENOMEM; in brcmstb_reset_probe()
93 priv->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in brcmstb_reset_probe()
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/linux/arch/arm/mach-bcm/
H A Dplatsmp-brcmstb.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-2014 Broadcom Corporation
22 #include <asm/mach-types.h>
116 return -ETIMEDOUT; in pwr_ctrl_wait_tmout()
143 * Set the reset vector to point to the secondary_startup in brcmstb_cpu_boot()
156 * power-on initialization. in brcmstb_cpu_power_on()
159 pwr_ctrl_set(cpu, ZONE_MANUAL_CONTROL_MASK, -1); in brcmstb_cpu_power_on()
160 pwr_ctrl_set(cpu, ZONE_RESERVED_1_MASK, -1); in brcmstb_cpu_power_on()
162 pwr_ctrl_set(cpu, ZONE_MAN_MEM_PWR_MASK, -1); in brcmstb_cpu_power_on()
167 pwr_ctrl_set(cpu, ZONE_MAN_CLKEN_MASK, -1); in brcmstb_cpu_power_on()
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/linux/drivers/phy/broadcom/
H A Dphy-brcm-usb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * phy-brcm-usb.c - Broadcom USB Phy Driver
5 * Copyright (C) 2015-2017 Broadcom
17 #include <linux/soc/brcmstb/brcmstb.h>
18 #include <dt-bindings/phy/phy.h>
22 #include "phy-brcm-usb-init.h"
47 { USB_CTLR_MODE_TYPEC_PD, "typec-pd" }
91 priv->pm_active = true; in brcm_pm_notifier()
96 priv->pm_active = false; in brcm_pm_notifier()
115 container_of(phy, struct brcm_usb_phy_data, phys[phy->id]); in brcm_usb_phy_init()
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H A Dphy-brcm-usb-init-synopsys.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/soc/brcmstb/brcmstb.h>
13 #include "phy-brcm-usb-init.h"
110 void __iomem *usb_mdio = params->regs[BRCM_REGS_USB_MDIO]; in usb_mdio_write_7211b0()
112 addr &= 0x1f; /* 5-bit address */ in usb_mdio_write_7211b0()
128 void __iomem *usb_mdio = params->regs[BRCM_REGS_USB_MDIO]; in usb_mdio_read_7211b0()
130 addr &= 0x1f; /* 5-bit address */ in usb_mdio_read_7211b0()
155 void __iomem *ctrl = params->regs[BRCM_REGS_CTRL]; in xhci_soft_reset()
156 void __iomem *xhci_gbl = params->regs[BRCM_REGS_XHCI_GBL]; in xhci_soft_reset()
158 /* Assert reset */ in xhci_soft_reset()
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/linux/Documentation/devicetree/bindings/pci/
H A Dbrcm,stb-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Brcmstb PCIe Host Controller
10 - Jim Quinlan <james.quinlan@broadcom.com>
15 - enum:
16 - brcm,bcm2711-pcie # The Raspberry Pi 4
17 - brcm,bcm2712-pcie # Raspberry Pi 5
18 - brcm,bcm4908-pcie
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/linux/drivers/memory/
H A Dbrcmstb_dpfe.c1 // SPDX-License-Identifier: GPL-2.0-only
21 * - LE kernel + LE firmware image (the most common case)
22 * - LE kernel + BE firmware image
23 * - BE kernel + LE firmware image
24 * - BE kernel + BE firmware image
38 #define DRVNAME "brcmstb-dpfe"
48 #define DRAM_MSG_ADDR_MASK ((1UL << DRAM_MSG_TYPE_OFFSET) - 1)
50 (BITS_PER_LONG - DRAM_MSG_TYPE_OFFSET)) - 1)
66 #define DRAM_MR4_PPRE 0x4 /* Post-package repair entry/exit */
94 /* Reset register bits & masks */
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/linux/drivers/ata/
H A Dahci_brcm.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright © 2009-2015 Broadcom Corporation
19 #include <linux/reset.h>
24 #define DRV_NAME "brcm-ahci"
28 #define MMIO_ENDIAN_SHIFT 0 /* CPU->AHCI */
29 #define DMADESC_ENDIAN_SHIFT 2 /* AHCI->DDR */
30 #define DMADATA_ENDIAN_SHIFT 4 /* AHCI->DDR */
51 /* On big-endian MIPS, buses are reversed to big endian, so switch them back */
53 #define DATA_ENDIAN 2 /* AHCI->DDR inbound accesses */
54 #define MMIO_ENDIAN 2 /* CPU->AHCI outbound accesses */
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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