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Searched +full:bcm2835 +full:- +full:system +full:- +full:timer (Results 1 – 9 of 9) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/timer/
H A Dbrcm,bcm2835-system-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/brcm,bcm2835-system-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: BCM2835 System Timer
10 - Stefan Wahren <wahrenst@gmx.net>
11 - Raspberry Pi Kernel Maintenance <kernel-list@raspberrypi.com>
14 The System Timer peripheral provides four 32-bit timer channels and a
15 single 64-bit free running counter. Each channel has an output compare
21 const: brcm,bcm2835-system-timer
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H A Dbrcm,bcm2835-system-timer.txt1 BCM2835 System Timer
3 The System Timer peripheral provides four 32-bit timer channels and a
4 single 64-bit free running counter. Each channel has an output compare
10 - compatible : should be "brcm,bcm2835-system-timer"
11 - reg : Specifies base physical address and size of the registers.
12 - interrupts : A list of 4 interrupt sinks; one per timer channel.
13 - clock-frequency : The frequency of the clock that drives the counter, in Hz.
17 timer {
18 compatible = "brcm,bcm2835-system-timer";
21 clock-frequency = <1000000>;
/freebsd/sys/contrib/device-tree/Bindings/soc/bcm/
H A Dbrcm,bcm2835-pm.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/soc/bcm/brcm,bcm2835-pm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: BCM2835 PM (Power domains, watchdog)
11 watchdog timer.
14 - Nicolas Saenz Julienne <nsaenz@kernel.org>
17 - $ref: /schemas/watchdog/watchdog.yaml#
22 - enum:
23 - brcm,bcm2835-pm
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H A Dbrcm,bcm2835-pm.txt1 BCM2835 PM (Power domains, watchdog)
4 a watchdog timer. This binding supersedes the brcm,bcm2835-pm-wdt
9 - compatible: Should be "brcm,bcm2835-pm"
10 - reg: Specifies base physical address and size of the two
13 - clocks: a) v3d: The V3D clock from CPRMAN
17 - #reset-cells: Should be 1. This property follows the reset controller
19 - #power-domain-cells: Should be 1. This property follows the power domain
24 - timeout-sec: Contains the watchdog timeout in seconds
25 - system-power-controller: Whether the watchdog is controlling the
26 system power. This node follows the power controller bindings[3].
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/freebsd/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm283x.dtsi1 #include <dt-bindings/pinctrl/bcm2835.h>
2 #include <dt-bindings/clock/bcm2835.h>
3 #include <dt-bindings/clock/bcm2835-aux.h>
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include <dt-bindings/soc/bcm2835-pm.h>
8 /* firmware-provided startup stubs live here, where the secondary CPUs are
14 * bcm2835 and bcm2836 implementations, leaving the CPU configuration to
15 * bcm2835.dtsi and bcm2836.dtsi.
19 compatible = "brcm,bcm2835";
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H A Dbcm2837.dtsi2 #include "bcm2835-common.dtsi"
10 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
12 local_intc: interrupt-controller@40000000 {
13 compatible = "brcm,bcm2836-l1-intc";
15 interrupt-controller;
16 #interrupt-cells = <2>;
17 interrupt-parent = <&local_intc>;
21 arm-pmu {
22 compatible = "arm,cortex-a53-pmu";
23 interrupt-parent = <&local_intc>;
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H A Dbcm2836.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include "bcm2835-common.dtsi"
11 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
13 local_intc: interrupt-controller@40000000 {
14 compatible = "brcm,bcm2836-l1-intc";
16 interrupt-controller;
17 #interrupt-cells = <2>;
18 interrupt-parent = <&local_intc>;
22 arm-pmu {
23 compatible = "arm,cortex-a7-pmu";
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H A Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
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/freebsd/sys/contrib/device-tree/src/arm64/broadcom/
H A Dbcm2712.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #address-cells = <2>;
8 #size-cells = <2>;
10 interrupt-parent = <&gicv2>;
14 clk_osc: clk-osc {
15 compatible = "fixed-clock";
16 #clock-cells = <0>;
17 clock-output-names = "osc";
18 clock-frequency = <54000000>;
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