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Searched +full:bcm2835 +full:- +full:rng (Results 1 – 7 of 7) sorted by relevance

/linux/Documentation/devicetree/bindings/rng/
H A Dbrcm,bcm2835.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rng/brcm,bcm2835.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: BCM2835/6368 Random number generator
10 - Stefan Wahren <stefan.wahren@i2se.com>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Herbert Xu <herbert@gondor.apana.org.au>
17 - brcm,bcm2835-rng
18 - brcm,bcm-nsp-rng
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/linux/drivers/char/hw_random/
H A Dbcm2835-rng.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2010-2012 Broadcom. All rights reserved.
22 /* enable rng */
31 struct hwrng rng; member
38 static inline struct bcm2835_rng_priv *to_rng_priv(struct hwrng *rng) in to_rng_priv() argument
40 return container_of(rng, struct bcm2835_rng_priv, rng); in to_rng_priv()
46 * peripheral registers for CPU-native byte order. in rng_readl()
49 return __raw_readl(priv->base + offset); in rng_readl()
51 return readl(priv->base + offset); in rng_readl()
58 __raw_writel(val, priv->base + offset); in rng_writel()
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for HW Random Number Generator (RNG) device drivers.
6 obj-$(CONFIG_HW_RANDOM) += rng-core.o
7 rng-core-y := core.o
8 obj-$(CONFIG_HW_RANDOM_TIMERIOMEM) += timeriomem-rng.o
9 obj-$(CONFIG_HW_RANDOM_INTEL) += intel-rng.o
10 obj-$(CONFIG_HW_RANDOM_AMD) += amd-rng.o
11 obj-$(CONFIG_HW_RANDOM_AIROHA) += airoha-trng.o
12 obj-$(CONFIG_HW_RANDOM_ATMEL) += atmel-rng.o
13 obj-$(CONFIG_HW_RANDOM_BA431) += ba431-rng.o
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/linux/arch/arm/boot/dts/broadcom/
H A Dbcm2835-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 * bcm2835, bcm2836 and bcm2837 implementations.
8 interrupt-parent = <&intc>;
11 dma: dma-controller@7e007000 {
12 compatible = "brcm,bcm2835-dma";
25 /* dma channel 11-14 share one irq */
32 interrupt-names = "dma0",
47 "dma-shared-all";
48 #dma-cells = <1>;
49 brcm,dma-channel-mask = <0x7f35>;
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H A Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
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/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dbrcm,bcm2835-armctrl-ic.yaml2 ---
3 $id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm2835-armctrl-ic.yaml#
4 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 title: BCM2835 ARMCTRL Interrupt Controller
9 - Florian Fainelli <florian.fainelli@broadcom.com>
10 - Raspberry Pi Kernel Maintenance <kernel-list@raspberrypi.com>
13 The BCM2835 contains a custom top-level interrupt controller, which supports
14 72 interrupt sources using a 2-level register scheme. The interrupt
19 but the per-CPU interrupt controller is the root, and an interrupt there
62 27: DMA11-14 - shared interrupt for DMA 11 to 14
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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